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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select \3# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s4 5---6name: fcmp_oeq_f327legalized: true8regBankSelected: true9tracksRegLiveness: true10body: |11 bb.1:12 liveins: $f10_f, $f11_f13 14 ; CHECK-LABEL: name: fcmp_oeq_f3215 ; CHECK: liveins: $f10_f, $f11_f16 ; CHECK-NEXT: {{ $}}17 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f18 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f19 ; CHECK-NEXT: [[FEQ_S:%[0-9]+]]:gpr = nofpexcept FEQ_S [[COPY]], [[COPY1]]20 ; CHECK-NEXT: $x10 = COPY [[FEQ_S]]21 ; CHECK-NEXT: PseudoRET implicit $x1022 %0:fprb(s32) = COPY $f10_f23 %1:fprb(s32) = COPY $f11_f24 %4:gprb(s64) = G_FCMP floatpred(oeq), %0(s32), %125 $x10 = COPY %4(s64)26 PseudoRET implicit $x1027 28...29---30name: fcmp_ogt_f3231legalized: true32regBankSelected: true33tracksRegLiveness: true34body: |35 bb.1:36 liveins: $f10_f, $f11_f37 38 ; CHECK-LABEL: name: fcmp_ogt_f3239 ; CHECK: liveins: $f10_f, $f11_f40 ; CHECK-NEXT: {{ $}}41 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f42 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f43 ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = FLT_S [[COPY1]], [[COPY]]44 ; CHECK-NEXT: $x10 = COPY [[FLT_S]]45 ; CHECK-NEXT: PseudoRET implicit $x1046 %0:fprb(s32) = COPY $f10_f47 %1:fprb(s32) = COPY $f11_f48 %4:gprb(s64) = G_FCMP floatpred(ogt), %0(s32), %149 $x10 = COPY %4(s64)50 PseudoRET implicit $x1051 52...53---54name: fcmp_oge_f3255legalized: true56regBankSelected: true57tracksRegLiveness: true58body: |59 bb.1:60 liveins: $f10_f, $f11_f61 62 ; CHECK-LABEL: name: fcmp_oge_f3263 ; CHECK: liveins: $f10_f, $f11_f64 ; CHECK-NEXT: {{ $}}65 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f66 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f67 ; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = FLE_S [[COPY1]], [[COPY]]68 ; CHECK-NEXT: $x10 = COPY [[FLE_S]]69 ; CHECK-NEXT: PseudoRET implicit $x1070 %0:fprb(s32) = COPY $f10_f71 %1:fprb(s32) = COPY $f11_f72 %4:gprb(s64) = G_FCMP floatpred(oge), %0(s32), %173 $x10 = COPY %4(s64)74 PseudoRET implicit $x1075 76...77---78name: fcmp_olt_f3279legalized: true80regBankSelected: true81tracksRegLiveness: true82body: |83 bb.1:84 liveins: $f10_f, $f11_f85 86 ; CHECK-LABEL: name: fcmp_olt_f3287 ; CHECK: liveins: $f10_f, $f11_f88 ; CHECK-NEXT: {{ $}}89 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f90 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f91 ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = nofpexcept FLT_S [[COPY]], [[COPY1]]92 ; CHECK-NEXT: $x10 = COPY [[FLT_S]]93 ; CHECK-NEXT: PseudoRET implicit $x1094 %0:fprb(s32) = COPY $f10_f95 %1:fprb(s32) = COPY $f11_f96 %4:gprb(s64) = G_FCMP floatpred(olt), %0(s32), %197 $x10 = COPY %4(s64)98 PseudoRET implicit $x1099 100...101---102name: fcmp_ole_f32103legalized: true104regBankSelected: true105tracksRegLiveness: true106body: |107 bb.1:108 liveins: $f10_f, $f11_f109 110 ; CHECK-LABEL: name: fcmp_ole_f32111 ; CHECK: liveins: $f10_f, $f11_f112 ; CHECK-NEXT: {{ $}}113 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f114 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f115 ; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = nofpexcept FLE_S [[COPY]], [[COPY1]]116 ; CHECK-NEXT: $x10 = COPY [[FLE_S]]117 ; CHECK-NEXT: PseudoRET implicit $x10118 %0:fprb(s32) = COPY $f10_f119 %1:fprb(s32) = COPY $f11_f120 %4:gprb(s64) = G_FCMP floatpred(ole), %0(s32), %1121 $x10 = COPY %4(s64)122 PseudoRET implicit $x10123 124...125---126name: fcmp_one_f32127legalized: true128regBankSelected: true129tracksRegLiveness: true130body: |131 bb.1:132 liveins: $f10_f, $f11_f133 134 ; CHECK-LABEL: name: fcmp_one_f32135 ; CHECK: liveins: $f10_f, $f11_f136 ; CHECK-NEXT: {{ $}}137 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f138 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f139 ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = FLT_S [[COPY]], [[COPY1]]140 ; CHECK-NEXT: [[FLT_S1:%[0-9]+]]:gpr = FLT_S [[COPY1]], [[COPY]]141 ; CHECK-NEXT: [[OR:%[0-9]+]]:gpr = OR [[FLT_S]], [[FLT_S1]]142 ; CHECK-NEXT: $x10 = COPY [[OR]]143 ; CHECK-NEXT: PseudoRET implicit $x10144 %0:fprb(s32) = COPY $f10_f145 %1:fprb(s32) = COPY $f11_f146 %4:gprb(s64) = G_FCMP floatpred(one), %0(s32), %1147 $x10 = COPY %4(s64)148 PseudoRET implicit $x10149 150...151---152name: fcmp_ord_f32153legalized: true154regBankSelected: true155tracksRegLiveness: true156body: |157 bb.1:158 liveins: $f10_f, $f11_f159 160 ; CHECK-LABEL: name: fcmp_ord_f32161 ; CHECK: liveins: $f10_f, $f11_f162 ; CHECK-NEXT: {{ $}}163 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f164 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f165 ; CHECK-NEXT: [[FEQ_S:%[0-9]+]]:gpr = FEQ_S [[COPY]], [[COPY]]166 ; CHECK-NEXT: [[FEQ_S1:%[0-9]+]]:gpr = FEQ_S [[COPY1]], [[COPY1]]167 ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[FEQ_S]], [[FEQ_S1]]168 ; CHECK-NEXT: $x10 = COPY [[AND]]169 ; CHECK-NEXT: PseudoRET implicit $x10170 %0:fprb(s32) = COPY $f10_f171 %1:fprb(s32) = COPY $f11_f172 %4:gprb(s64) = G_FCMP floatpred(ord), %0(s32), %1173 $x10 = COPY %4(s64)174 PseudoRET implicit $x10175 176...177---178name: fcmp_ueq_f32179legalized: true180regBankSelected: true181tracksRegLiveness: true182body: |183 bb.1:184 liveins: $f10_f, $f11_f185 186 ; CHECK-LABEL: name: fcmp_ueq_f32187 ; CHECK: liveins: $f10_f, $f11_f188 ; CHECK-NEXT: {{ $}}189 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f190 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f191 ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = FLT_S [[COPY]], [[COPY1]]192 ; CHECK-NEXT: [[FLT_S1:%[0-9]+]]:gpr = FLT_S [[COPY1]], [[COPY]]193 ; CHECK-NEXT: [[OR:%[0-9]+]]:gpr = OR [[FLT_S]], [[FLT_S1]]194 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[OR]], 1195 ; CHECK-NEXT: $x10 = COPY [[XORI]]196 ; CHECK-NEXT: PseudoRET implicit $x10197 %0:fprb(s32) = COPY $f10_f198 %1:fprb(s32) = COPY $f11_f199 %4:gprb(s64) = G_FCMP floatpred(ueq), %0(s32), %1200 $x10 = COPY %4(s64)201 PseudoRET implicit $x10202 203...204---205name: fcmp_ugt_f32206legalized: true207regBankSelected: true208tracksRegLiveness: true209body: |210 bb.1:211 liveins: $f10_f, $f11_f212 213 ; CHECK-LABEL: name: fcmp_ugt_f32214 ; CHECK: liveins: $f10_f, $f11_f215 ; CHECK-NEXT: {{ $}}216 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f217 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f218 ; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = FLE_S [[COPY]], [[COPY1]]219 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLE_S]], 1220 ; CHECK-NEXT: $x10 = COPY [[XORI]]221 ; CHECK-NEXT: PseudoRET implicit $x10222 %0:fprb(s32) = COPY $f10_f223 %1:fprb(s32) = COPY $f11_f224 %4:gprb(s64) = G_FCMP floatpred(ugt), %0(s32), %1225 $x10 = COPY %4(s64)226 PseudoRET implicit $x10227 228...229---230name: fcmp_uge_f32231legalized: true232regBankSelected: true233tracksRegLiveness: true234body: |235 bb.1:236 liveins: $f10_f, $f11_f237 238 ; CHECK-LABEL: name: fcmp_uge_f32239 ; CHECK: liveins: $f10_f, $f11_f240 ; CHECK-NEXT: {{ $}}241 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f242 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f243 ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = FLT_S [[COPY]], [[COPY1]]244 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLT_S]], 1245 ; CHECK-NEXT: $x10 = COPY [[XORI]]246 ; CHECK-NEXT: PseudoRET implicit $x10247 %0:fprb(s32) = COPY $f10_f248 %1:fprb(s32) = COPY $f11_f249 %4:gprb(s64) = G_FCMP floatpred(uge), %0(s32), %1250 $x10 = COPY %4(s64)251 PseudoRET implicit $x10252 253...254---255name: fcmp_ult_f32256legalized: true257regBankSelected: true258tracksRegLiveness: true259body: |260 bb.1:261 liveins: $f10_f, $f11_f262 263 ; CHECK-LABEL: name: fcmp_ult_f32264 ; CHECK: liveins: $f10_f, $f11_f265 ; CHECK-NEXT: {{ $}}266 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f267 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f268 ; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = FLE_S [[COPY1]], [[COPY]]269 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLE_S]], 1270 ; CHECK-NEXT: $x10 = COPY [[XORI]]271 ; CHECK-NEXT: PseudoRET implicit $x10272 %0:fprb(s32) = COPY $f10_f273 %1:fprb(s32) = COPY $f11_f274 %4:gprb(s64) = G_FCMP floatpred(ult), %0(s32), %1275 $x10 = COPY %4(s64)276 PseudoRET implicit $x10277 278...279---280name: fcmp_ule_f32281legalized: true282regBankSelected: true283tracksRegLiveness: true284body: |285 bb.1:286 liveins: $f10_f, $f11_f287 288 ; CHECK-LABEL: name: fcmp_ule_f32289 ; CHECK: liveins: $f10_f, $f11_f290 ; CHECK-NEXT: {{ $}}291 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f292 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f293 ; CHECK-NEXT: [[FLT_S:%[0-9]+]]:gpr = FLT_S [[COPY1]], [[COPY]]294 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLT_S]], 1295 ; CHECK-NEXT: $x10 = COPY [[XORI]]296 ; CHECK-NEXT: PseudoRET implicit $x10297 %0:fprb(s32) = COPY $f10_f298 %1:fprb(s32) = COPY $f11_f299 %4:gprb(s64) = G_FCMP floatpred(ule), %0(s32), %1300 $x10 = COPY %4(s64)301 PseudoRET implicit $x10302 303...304---305name: fcmp_une_f32306legalized: true307regBankSelected: true308tracksRegLiveness: true309body: |310 bb.1:311 liveins: $f10_f, $f11_f312 313 ; CHECK-LABEL: name: fcmp_une_f32314 ; CHECK: liveins: $f10_f, $f11_f315 ; CHECK-NEXT: {{ $}}316 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f317 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f318 ; CHECK-NEXT: [[FEQ_S:%[0-9]+]]:gpr = FEQ_S [[COPY]], [[COPY1]]319 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FEQ_S]], 1320 ; CHECK-NEXT: $x10 = COPY [[XORI]]321 ; CHECK-NEXT: PseudoRET implicit $x10322 %0:fprb(s32) = COPY $f10_f323 %1:fprb(s32) = COPY $f11_f324 %4:gprb(s64) = G_FCMP floatpred(une), %0(s32), %1325 $x10 = COPY %4(s64)326 PseudoRET implicit $x10327 328...329---330name: fcmp_uno_f32331legalized: true332regBankSelected: true333tracksRegLiveness: true334body: |335 bb.1:336 liveins: $f10_f, $f11_f337 338 ; CHECK-LABEL: name: fcmp_uno_f32339 ; CHECK: liveins: $f10_f, $f11_f340 ; CHECK-NEXT: {{ $}}341 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f342 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f343 ; CHECK-NEXT: [[FEQ_S:%[0-9]+]]:gpr = FEQ_S [[COPY]], [[COPY]]344 ; CHECK-NEXT: [[FEQ_S1:%[0-9]+]]:gpr = FEQ_S [[COPY1]], [[COPY1]]345 ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[FEQ_S]], [[FEQ_S1]]346 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[AND]], 1347 ; CHECK-NEXT: $x10 = COPY [[XORI]]348 ; CHECK-NEXT: PseudoRET implicit $x10349 %0:fprb(s32) = COPY $f10_f350 %1:fprb(s32) = COPY $f11_f351 %4:gprb(s64) = G_FCMP floatpred(uno), %0(s32), %1352 $x10 = COPY %4(s64)353 PseudoRET implicit $x10354 355...356---357name: fcmp_oeq_f64358legalized: true359regBankSelected: true360tracksRegLiveness: true361body: |362 bb.1:363 liveins: $f10_d, $f11_d364 365 ; CHECK-LABEL: name: fcmp_oeq_f64366 ; CHECK: liveins: $f10_d, $f11_d367 ; CHECK-NEXT: {{ $}}368 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d369 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d370 ; CHECK-NEXT: [[FEQ_D:%[0-9]+]]:gpr = nofpexcept FEQ_D [[COPY]], [[COPY1]]371 ; CHECK-NEXT: $x10 = COPY [[FEQ_D]]372 ; CHECK-NEXT: PseudoRET implicit $x10373 %0:fprb(s64) = COPY $f10_d374 %1:fprb(s64) = COPY $f11_d375 %4:gprb(s64) = G_FCMP floatpred(oeq), %0(s64), %1376 $x10 = COPY %4(s64)377 PseudoRET implicit $x10378 379...380---381name: fcmp_ogt_f64382legalized: true383regBankSelected: true384tracksRegLiveness: true385body: |386 bb.1:387 liveins: $f10_d, $f11_d388 389 ; CHECK-LABEL: name: fcmp_ogt_f64390 ; CHECK: liveins: $f10_d, $f11_d391 ; CHECK-NEXT: {{ $}}392 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d393 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d394 ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = FLT_D [[COPY1]], [[COPY]]395 ; CHECK-NEXT: $x10 = COPY [[FLT_D]]396 ; CHECK-NEXT: PseudoRET implicit $x10397 %0:fprb(s64) = COPY $f10_d398 %1:fprb(s64) = COPY $f11_d399 %4:gprb(s64) = G_FCMP floatpred(ogt), %0(s64), %1400 $x10 = COPY %4(s64)401 PseudoRET implicit $x10402 403...404---405name: fcmp_oge_f64406legalized: true407regBankSelected: true408tracksRegLiveness: true409body: |410 bb.1:411 liveins: $f10_d, $f11_d412 413 ; CHECK-LABEL: name: fcmp_oge_f64414 ; CHECK: liveins: $f10_d, $f11_d415 ; CHECK-NEXT: {{ $}}416 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d417 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d418 ; CHECK-NEXT: [[FLE_D:%[0-9]+]]:gpr = FLE_D [[COPY1]], [[COPY]]419 ; CHECK-NEXT: $x10 = COPY [[FLE_D]]420 ; CHECK-NEXT: PseudoRET implicit $x10421 %0:fprb(s64) = COPY $f10_d422 %1:fprb(s64) = COPY $f11_d423 %4:gprb(s64) = G_FCMP floatpred(oge), %0(s64), %1424 $x10 = COPY %4(s64)425 PseudoRET implicit $x10426 427...428---429name: fcmp_olt_f64430legalized: true431regBankSelected: true432tracksRegLiveness: true433body: |434 bb.1:435 liveins: $f10_d, $f11_d436 437 ; CHECK-LABEL: name: fcmp_olt_f64438 ; CHECK: liveins: $f10_d, $f11_d439 ; CHECK-NEXT: {{ $}}440 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d441 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d442 ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = nofpexcept FLT_D [[COPY]], [[COPY1]]443 ; CHECK-NEXT: $x10 = COPY [[FLT_D]]444 ; CHECK-NEXT: PseudoRET implicit $x10445 %0:fprb(s64) = COPY $f10_d446 %1:fprb(s64) = COPY $f11_d447 %4:gprb(s64) = G_FCMP floatpred(olt), %0(s64), %1448 $x10 = COPY %4(s64)449 PseudoRET implicit $x10450 451...452---453name: fcmp_ole_f64454legalized: true455regBankSelected: true456tracksRegLiveness: true457body: |458 bb.1:459 liveins: $f10_d, $f11_d460 461 ; CHECK-LABEL: name: fcmp_ole_f64462 ; CHECK: liveins: $f10_d, $f11_d463 ; CHECK-NEXT: {{ $}}464 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d465 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d466 ; CHECK-NEXT: [[FLE_D:%[0-9]+]]:gpr = nofpexcept FLE_D [[COPY]], [[COPY1]]467 ; CHECK-NEXT: $x10 = COPY [[FLE_D]]468 ; CHECK-NEXT: PseudoRET implicit $x10469 %0:fprb(s64) = COPY $f10_d470 %1:fprb(s64) = COPY $f11_d471 %4:gprb(s64) = G_FCMP floatpred(ole), %0(s64), %1472 $x10 = COPY %4(s64)473 PseudoRET implicit $x10474 475...476---477name: fcmp_one_f64478legalized: true479regBankSelected: true480tracksRegLiveness: true481body: |482 bb.1:483 liveins: $f10_d, $f11_d484 485 ; CHECK-LABEL: name: fcmp_one_f64486 ; CHECK: liveins: $f10_d, $f11_d487 ; CHECK-NEXT: {{ $}}488 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d489 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d490 ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = FLT_D [[COPY]], [[COPY1]]491 ; CHECK-NEXT: [[FLT_D1:%[0-9]+]]:gpr = FLT_D [[COPY1]], [[COPY]]492 ; CHECK-NEXT: [[OR:%[0-9]+]]:gpr = OR [[FLT_D]], [[FLT_D1]]493 ; CHECK-NEXT: $x10 = COPY [[OR]]494 ; CHECK-NEXT: PseudoRET implicit $x10495 %0:fprb(s64) = COPY $f10_d496 %1:fprb(s64) = COPY $f11_d497 %4:gprb(s64) = G_FCMP floatpred(one), %0(s64), %1498 $x10 = COPY %4(s64)499 PseudoRET implicit $x10500 501...502---503name: fcmp_ord_f64504legalized: true505regBankSelected: true506tracksRegLiveness: true507body: |508 bb.1:509 liveins: $f10_d, $f11_d510 511 ; CHECK-LABEL: name: fcmp_ord_f64512 ; CHECK: liveins: $f10_d, $f11_d513 ; CHECK-NEXT: {{ $}}514 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d515 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d516 ; CHECK-NEXT: [[FEQ_D:%[0-9]+]]:gpr = FEQ_D [[COPY]], [[COPY]]517 ; CHECK-NEXT: [[FEQ_D1:%[0-9]+]]:gpr = FEQ_D [[COPY1]], [[COPY1]]518 ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[FEQ_D]], [[FEQ_D1]]519 ; CHECK-NEXT: $x10 = COPY [[AND]]520 ; CHECK-NEXT: PseudoRET implicit $x10521 %0:fprb(s64) = COPY $f10_d522 %1:fprb(s64) = COPY $f11_d523 %4:gprb(s64) = G_FCMP floatpred(ord), %0(s64), %1524 $x10 = COPY %4(s64)525 PseudoRET implicit $x10526 527...528---529name: fcmp_ueq_f64530legalized: true531regBankSelected: true532tracksRegLiveness: true533body: |534 bb.1:535 liveins: $f10_d, $f11_d536 537 ; CHECK-LABEL: name: fcmp_ueq_f64538 ; CHECK: liveins: $f10_d, $f11_d539 ; CHECK-NEXT: {{ $}}540 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d541 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d542 ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = FLT_D [[COPY]], [[COPY1]]543 ; CHECK-NEXT: [[FLT_D1:%[0-9]+]]:gpr = FLT_D [[COPY1]], [[COPY]]544 ; CHECK-NEXT: [[OR:%[0-9]+]]:gpr = OR [[FLT_D]], [[FLT_D1]]545 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[OR]], 1546 ; CHECK-NEXT: $x10 = COPY [[XORI]]547 ; CHECK-NEXT: PseudoRET implicit $x10548 %0:fprb(s64) = COPY $f10_d549 %1:fprb(s64) = COPY $f11_d550 %4:gprb(s64) = G_FCMP floatpred(ueq), %0(s64), %1551 $x10 = COPY %4(s64)552 PseudoRET implicit $x10553 554...555---556name: fcmp_ugt_f64557legalized: true558regBankSelected: true559tracksRegLiveness: true560body: |561 bb.1:562 liveins: $f10_d, $f11_d563 564 ; CHECK-LABEL: name: fcmp_ugt_f64565 ; CHECK: liveins: $f10_d, $f11_d566 ; CHECK-NEXT: {{ $}}567 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d568 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d569 ; CHECK-NEXT: [[FLE_D:%[0-9]+]]:gpr = FLE_D [[COPY]], [[COPY1]]570 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLE_D]], 1571 ; CHECK-NEXT: $x10 = COPY [[XORI]]572 ; CHECK-NEXT: PseudoRET implicit $x10573 %0:fprb(s64) = COPY $f10_d574 %1:fprb(s64) = COPY $f11_d575 %4:gprb(s64) = G_FCMP floatpred(ugt), %0(s64), %1576 $x10 = COPY %4(s64)577 PseudoRET implicit $x10578 579...580---581name: fcmp_uge_f64582legalized: true583regBankSelected: true584tracksRegLiveness: true585body: |586 bb.1:587 liveins: $f10_d, $f11_d588 589 ; CHECK-LABEL: name: fcmp_uge_f64590 ; CHECK: liveins: $f10_d, $f11_d591 ; CHECK-NEXT: {{ $}}592 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d593 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d594 ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = FLT_D [[COPY]], [[COPY1]]595 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLT_D]], 1596 ; CHECK-NEXT: $x10 = COPY [[XORI]]597 ; CHECK-NEXT: PseudoRET implicit $x10598 %0:fprb(s64) = COPY $f10_d599 %1:fprb(s64) = COPY $f11_d600 %4:gprb(s64) = G_FCMP floatpred(uge), %0(s64), %1601 $x10 = COPY %4(s64)602 PseudoRET implicit $x10603 604...605---606name: fcmp_ult_f64607legalized: true608regBankSelected: true609tracksRegLiveness: true610body: |611 bb.1:612 liveins: $f10_d, $f11_d613 614 ; CHECK-LABEL: name: fcmp_ult_f64615 ; CHECK: liveins: $f10_d, $f11_d616 ; CHECK-NEXT: {{ $}}617 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d618 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d619 ; CHECK-NEXT: [[FLE_D:%[0-9]+]]:gpr = FLE_D [[COPY1]], [[COPY]]620 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLE_D]], 1621 ; CHECK-NEXT: $x10 = COPY [[XORI]]622 ; CHECK-NEXT: PseudoRET implicit $x10623 %0:fprb(s64) = COPY $f10_d624 %1:fprb(s64) = COPY $f11_d625 %4:gprb(s64) = G_FCMP floatpred(ult), %0(s64), %1626 $x10 = COPY %4(s64)627 PseudoRET implicit $x10628 629...630---631name: fcmp_ule_f64632legalized: true633regBankSelected: true634tracksRegLiveness: true635body: |636 bb.1:637 liveins: $f10_d, $f11_d638 639 ; CHECK-LABEL: name: fcmp_ule_f64640 ; CHECK: liveins: $f10_d, $f11_d641 ; CHECK-NEXT: {{ $}}642 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d643 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d644 ; CHECK-NEXT: [[FLT_D:%[0-9]+]]:gpr = FLT_D [[COPY1]], [[COPY]]645 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FLT_D]], 1646 ; CHECK-NEXT: $x10 = COPY [[XORI]]647 ; CHECK-NEXT: PseudoRET implicit $x10648 %0:fprb(s64) = COPY $f10_d649 %1:fprb(s64) = COPY $f11_d650 %4:gprb(s64) = G_FCMP floatpred(ule), %0(s64), %1651 $x10 = COPY %4(s64)652 PseudoRET implicit $x10653 654...655---656name: fcmp_une_f64657legalized: true658regBankSelected: true659tracksRegLiveness: true660body: |661 bb.1:662 liveins: $f10_d, $f11_d663 664 ; CHECK-LABEL: name: fcmp_une_f64665 ; CHECK: liveins: $f10_d, $f11_d666 ; CHECK-NEXT: {{ $}}667 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d668 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d669 ; CHECK-NEXT: [[FEQ_D:%[0-9]+]]:gpr = FEQ_D [[COPY]], [[COPY1]]670 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[FEQ_D]], 1671 ; CHECK-NEXT: $x10 = COPY [[XORI]]672 ; CHECK-NEXT: PseudoRET implicit $x10673 %0:fprb(s64) = COPY $f10_d674 %1:fprb(s64) = COPY $f11_d675 %4:gprb(s64) = G_FCMP floatpred(une), %0(s64), %1676 $x10 = COPY %4(s64)677 PseudoRET implicit $x10678 679...680---681name: fcmp_uno_f64682legalized: true683regBankSelected: true684tracksRegLiveness: true685body: |686 bb.1:687 liveins: $f10_d, $f11_d688 689 ; CHECK-LABEL: name: fcmp_uno_f64690 ; CHECK: liveins: $f10_d, $f11_d691 ; CHECK-NEXT: {{ $}}692 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d693 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d694 ; CHECK-NEXT: [[FEQ_D:%[0-9]+]]:gpr = FEQ_D [[COPY]], [[COPY]]695 ; CHECK-NEXT: [[FEQ_D1:%[0-9]+]]:gpr = FEQ_D [[COPY1]], [[COPY1]]696 ; CHECK-NEXT: [[AND:%[0-9]+]]:gpr = AND [[FEQ_D]], [[FEQ_D1]]697 ; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[AND]], 1698 ; CHECK-NEXT: $x10 = COPY [[XORI]]699 ; CHECK-NEXT: PseudoRET implicit $x10700 %0:fprb(s64) = COPY $f10_d701 %1:fprb(s64) = COPY $f11_d702 %4:gprb(s64) = G_FCMP floatpred(uno), %0(s64), %1703 $x10 = COPY %4(s64)704 PseudoRET implicit $x10705 706...707