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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=instruction-select \3# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s4# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select \5# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s6 7---8name: fadd_f329legalized: true10regBankSelected: true11tracksRegLiveness: true12body: |13 bb.0:14 liveins: $f10_f, $f11_f15 16 ; CHECK-LABEL: name: fadd_f3217 ; CHECK: liveins: $f10_f, $f11_f18 ; CHECK-NEXT: {{ $}}19 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f20 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f21 ; CHECK-NEXT: [[FADD_S:%[0-9]+]]:fpr32 = nofpexcept FADD_S [[COPY]], [[COPY1]], 722 ; CHECK-NEXT: $f10_f = COPY [[FADD_S]]23 ; CHECK-NEXT: PseudoRET implicit $f10_f24 %0:fprb(s32) = COPY $f10_f25 %1:fprb(s32) = COPY $f11_f26 %2:fprb(s32) = G_FADD %0, %127 $f10_f = COPY %2(s32)28 PseudoRET implicit $f10_f29 30...31---32name: fsub_f3233legalized: true34regBankSelected: true35tracksRegLiveness: true36body: |37 bb.0:38 liveins: $f10_f, $f11_f39 40 ; CHECK-LABEL: name: fsub_f3241 ; CHECK: liveins: $f10_f, $f11_f42 ; CHECK-NEXT: {{ $}}43 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f44 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f45 ; CHECK-NEXT: [[FSUB_S:%[0-9]+]]:fpr32 = nofpexcept FSUB_S [[COPY]], [[COPY1]], 746 ; CHECK-NEXT: $f10_f = COPY [[FSUB_S]]47 ; CHECK-NEXT: PseudoRET implicit $f10_f48 %0:fprb(s32) = COPY $f10_f49 %1:fprb(s32) = COPY $f11_f50 %2:fprb(s32) = G_FSUB %0, %151 $f10_f = COPY %2(s32)52 PseudoRET implicit $f10_f53 54...55---56name: fmul_f3257legalized: true58regBankSelected: true59tracksRegLiveness: true60body: |61 bb.0:62 liveins: $f10_f, $f11_f63 64 ; CHECK-LABEL: name: fmul_f3265 ; CHECK: liveins: $f10_f, $f11_f66 ; CHECK-NEXT: {{ $}}67 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f68 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f69 ; CHECK-NEXT: [[FMUL_S:%[0-9]+]]:fpr32 = nofpexcept FMUL_S [[COPY]], [[COPY1]], 770 ; CHECK-NEXT: $f10_f = COPY [[FMUL_S]]71 ; CHECK-NEXT: PseudoRET implicit $f10_f72 %0:fprb(s32) = COPY $f10_f73 %1:fprb(s32) = COPY $f11_f74 %2:fprb(s32) = G_FMUL %0, %175 $f10_f = COPY %2(s32)76 PseudoRET implicit $f10_f77 78...79---80name: fdiv_f3281legalized: true82regBankSelected: true83tracksRegLiveness: true84body: |85 bb.0:86 liveins: $f10_f, $f11_f87 88 ; CHECK-LABEL: name: fdiv_f3289 ; CHECK: liveins: $f10_f, $f11_f90 ; CHECK-NEXT: {{ $}}91 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f92 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f93 ; CHECK-NEXT: [[FDIV_S:%[0-9]+]]:fpr32 = nofpexcept FDIV_S [[COPY]], [[COPY1]], 794 ; CHECK-NEXT: $f10_f = COPY [[FDIV_S]]95 ; CHECK-NEXT: PseudoRET implicit $f10_f96 %0:fprb(s32) = COPY $f10_f97 %1:fprb(s32) = COPY $f11_f98 %2:fprb(s32) = G_FDIV %0, %199 $f10_f = COPY %2(s32)100 PseudoRET implicit $f10_f101 102...103---104name: fma_f32105legalized: true106regBankSelected: true107tracksRegLiveness: true108body: |109 bb.0:110 liveins: $f10_f, $f11_f, $f12_f111 112 ; CHECK-LABEL: name: fma_f32113 ; CHECK: liveins: $f10_f, $f11_f, $f12_f114 ; CHECK-NEXT: {{ $}}115 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f116 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f117 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr32 = COPY $f12_f118 ; CHECK-NEXT: [[FMADD_S:%[0-9]+]]:fpr32 = nofpexcept FMADD_S [[COPY]], [[COPY1]], [[COPY2]], 7119 ; CHECK-NEXT: $f10_f = COPY [[FMADD_S]]120 ; CHECK-NEXT: PseudoRET implicit $f10_f121 %0:fprb(s32) = COPY $f10_f122 %1:fprb(s32) = COPY $f11_f123 %2:fprb(s32) = COPY $f12_f124 %3:fprb(s32) = G_FMA %0, %1, %2125 $f10_f = COPY %3(s32)126 PseudoRET implicit $f10_f127 128...129---130name: fneg_f32131legalized: true132regBankSelected: true133tracksRegLiveness: true134body: |135 bb.0:136 liveins: $f10_f, $f11_f, $f12_f137 138 ; CHECK-LABEL: name: fneg_f32139 ; CHECK: liveins: $f10_f, $f11_f, $f12_f140 ; CHECK-NEXT: {{ $}}141 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f142 ; CHECK-NEXT: [[FSGNJN_S:%[0-9]+]]:fpr32 = FSGNJN_S [[COPY]], [[COPY]]143 ; CHECK-NEXT: $f10_f = COPY [[FSGNJN_S]]144 ; CHECK-NEXT: PseudoRET implicit $f10_f145 %0:fprb(s32) = COPY $f10_f146 %1:fprb(s32) = G_FNEG %0147 $f10_f = COPY %1(s32)148 PseudoRET implicit $f10_f149 150...151---152name: fabs_f32153legalized: true154regBankSelected: true155tracksRegLiveness: true156body: |157 bb.0:158 liveins: $f10_f, $f11_f, $f12_f159 160 ; CHECK-LABEL: name: fabs_f32161 ; CHECK: liveins: $f10_f, $f11_f, $f12_f162 ; CHECK-NEXT: {{ $}}163 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f164 ; CHECK-NEXT: [[FSGNJX_S:%[0-9]+]]:fpr32 = FSGNJX_S [[COPY]], [[COPY]]165 ; CHECK-NEXT: $f10_f = COPY [[FSGNJX_S]]166 ; CHECK-NEXT: PseudoRET implicit $f10_f167 %0:fprb(s32) = COPY $f10_f168 %1:fprb(s32) = G_FABS %0169 $f10_f = COPY %1(s32)170 PseudoRET implicit $f10_f171 172...173---174name: fsqrt_f32175legalized: true176regBankSelected: true177tracksRegLiveness: true178body: |179 bb.0:180 liveins: $f10_f, $f11_f, $f12_f181 182 ; CHECK-LABEL: name: fsqrt_f32183 ; CHECK: liveins: $f10_f, $f11_f, $f12_f184 ; CHECK-NEXT: {{ $}}185 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f186 ; CHECK-NEXT: [[FSQRT_S:%[0-9]+]]:fpr32 = nofpexcept FSQRT_S [[COPY]], 7187 ; CHECK-NEXT: $f10_f = COPY [[FSQRT_S]]188 ; CHECK-NEXT: PseudoRET implicit $f10_f189 %0:fprb(s32) = COPY $f10_f190 %1:fprb(s32) = G_FSQRT %0191 $f10_f = COPY %1(s32)192 PseudoRET implicit $f10_f193 194...195---196name: fmaxnum_f32197legalized: true198regBankSelected: true199tracksRegLiveness: true200body: |201 bb.0:202 liveins: $f10_f, $f11_f203 204 ; CHECK-LABEL: name: fmaxnum_f32205 ; CHECK: liveins: $f10_f, $f11_f206 ; CHECK-NEXT: {{ $}}207 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f208 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f209 ; CHECK-NEXT: [[FMAX_S:%[0-9]+]]:fpr32 = nofpexcept FMAX_S [[COPY]], [[COPY1]]210 ; CHECK-NEXT: $f10_f = COPY [[FMAX_S]]211 ; CHECK-NEXT: PseudoRET implicit $f10_f212 %0:fprb(s32) = COPY $f10_f213 %1:fprb(s32) = COPY $f11_f214 %2:fprb(s32) = G_FMAXNUM %0, %1215 $f10_f = COPY %2(s32)216 PseudoRET implicit $f10_f217 218...219---220name: fminnum_f32221legalized: true222regBankSelected: true223tracksRegLiveness: true224body: |225 bb.0:226 liveins: $f10_f, $f11_f227 228 ; CHECK-LABEL: name: fminnum_f32229 ; CHECK: liveins: $f10_f, $f11_f230 ; CHECK-NEXT: {{ $}}231 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f232 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f233 ; CHECK-NEXT: [[FMIN_S:%[0-9]+]]:fpr32 = nofpexcept FMIN_S [[COPY]], [[COPY1]]234 ; CHECK-NEXT: $f10_f = COPY [[FMIN_S]]235 ; CHECK-NEXT: PseudoRET implicit $f10_f236 %0:fprb(s32) = COPY $f10_f237 %1:fprb(s32) = COPY $f11_f238 %2:fprb(s32) = G_FMINNUM %0, %1239 $f10_f = COPY %2(s32)240 PseudoRET implicit $f10_f241 242...243---244name: fcopysign_f32_f32245legalized: true246regBankSelected: true247tracksRegLiveness: true248body: |249 bb.0:250 liveins: $f10_f, $f11_f251 252 ; CHECK-LABEL: name: fcopysign_f32_f32253 ; CHECK: liveins: $f10_f, $f11_f254 ; CHECK-NEXT: {{ $}}255 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f256 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f257 ; CHECK-NEXT: [[FSGNJ_S:%[0-9]+]]:fpr32 = FSGNJ_S [[COPY]], [[COPY1]]258 ; CHECK-NEXT: $f10_f = COPY [[FSGNJ_S]]259 ; CHECK-NEXT: PseudoRET implicit $f10_f260 %0:fprb(s32) = COPY $f10_f261 %1:fprb(s32) = COPY $f11_f262 %2:fprb(s32) = G_FCOPYSIGN %0, %1263 $f10_f = COPY %2(s32)264 PseudoRET implicit $f10_f265 266...267---268name: fcopysign_f32_f64269legalized: true270regBankSelected: true271tracksRegLiveness: true272body: |273 bb.0:274 liveins: $f10_f, $f11_d275 276 ; CHECK-LABEL: name: fcopysign_f32_f64277 ; CHECK: liveins: $f10_f, $f11_d278 ; CHECK-NEXT: {{ $}}279 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f280 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d281 ; CHECK-NEXT: [[FCVT_S_D:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_D [[COPY1]], 7282 ; CHECK-NEXT: [[FSGNJ_S:%[0-9]+]]:fpr32 = FSGNJ_S [[COPY]], [[FCVT_S_D]]283 ; CHECK-NEXT: $f10_f = COPY [[FSGNJ_S]]284 ; CHECK-NEXT: PseudoRET implicit $f10_f285 %0:fprb(s32) = COPY $f10_f286 %1:fprb(s64) = COPY $f11_d287 %2:fprb(s32) = G_FCOPYSIGN %0, %1288 $f10_f = COPY %2(s32)289 PseudoRET implicit $f10_f290 291...292---293name: fadd_f64294legalized: true295regBankSelected: true296tracksRegLiveness: true297body: |298 bb.0:299 liveins: $f10_d, $f11_d300 301 ; CHECK-LABEL: name: fadd_f64302 ; CHECK: liveins: $f10_d, $f11_d303 ; CHECK-NEXT: {{ $}}304 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d305 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d306 ; CHECK-NEXT: [[FADD_D:%[0-9]+]]:fpr64 = nofpexcept FADD_D [[COPY]], [[COPY1]], 7307 ; CHECK-NEXT: $f10_d = COPY [[FADD_D]]308 ; CHECK-NEXT: PseudoRET implicit $f10_d309 %0:fprb(s64) = COPY $f10_d310 %1:fprb(s64) = COPY $f11_d311 %2:fprb(s64) = G_FADD %0, %1312 $f10_d = COPY %2(s64)313 PseudoRET implicit $f10_d314 315...316---317name: fsub_f64318legalized: true319regBankSelected: true320tracksRegLiveness: true321body: |322 bb.0:323 liveins: $f10_d, $f11_d324 325 ; CHECK-LABEL: name: fsub_f64326 ; CHECK: liveins: $f10_d, $f11_d327 ; CHECK-NEXT: {{ $}}328 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d329 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d330 ; CHECK-NEXT: [[FSUB_D:%[0-9]+]]:fpr64 = nofpexcept FSUB_D [[COPY]], [[COPY1]], 7331 ; CHECK-NEXT: $f10_d = COPY [[FSUB_D]]332 ; CHECK-NEXT: PseudoRET implicit $f10_d333 %0:fprb(s64) = COPY $f10_d334 %1:fprb(s64) = COPY $f11_d335 %2:fprb(s64) = G_FSUB %0, %1336 $f10_d = COPY %2(s64)337 PseudoRET implicit $f10_d338 339...340---341name: fmul_f64342legalized: true343regBankSelected: true344tracksRegLiveness: true345body: |346 bb.0:347 liveins: $f10_d, $f11_d348 349 ; CHECK-LABEL: name: fmul_f64350 ; CHECK: liveins: $f10_d, $f11_d351 ; CHECK-NEXT: {{ $}}352 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d353 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d354 ; CHECK-NEXT: [[FMUL_D:%[0-9]+]]:fpr64 = nofpexcept FMUL_D [[COPY]], [[COPY1]], 7355 ; CHECK-NEXT: $f10_d = COPY [[FMUL_D]]356 ; CHECK-NEXT: PseudoRET implicit $f10_d357 %0:fprb(s64) = COPY $f10_d358 %1:fprb(s64) = COPY $f11_d359 %2:fprb(s64) = G_FMUL %0, %1360 $f10_d = COPY %2(s64)361 PseudoRET implicit $f10_d362 363...364---365name: fdiv_f64366legalized: true367regBankSelected: true368tracksRegLiveness: true369body: |370 bb.0:371 liveins: $f10_d, $f11_d372 373 ; CHECK-LABEL: name: fdiv_f64374 ; CHECK: liveins: $f10_d, $f11_d375 ; CHECK-NEXT: {{ $}}376 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d377 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d378 ; CHECK-NEXT: [[FDIV_D:%[0-9]+]]:fpr64 = nofpexcept FDIV_D [[COPY]], [[COPY1]], 7379 ; CHECK-NEXT: $f10_d = COPY [[FDIV_D]]380 ; CHECK-NEXT: PseudoRET implicit $f10_d381 %0:fprb(s64) = COPY $f10_d382 %1:fprb(s64) = COPY $f11_d383 %2:fprb(s64) = G_FDIV %0, %1384 $f10_d = COPY %2(s64)385 PseudoRET implicit $f10_d386 387...388---389name: fma_f64390legalized: true391regBankSelected: true392tracksRegLiveness: true393body: |394 bb.0:395 liveins: $f10_d, $f11_d, $f12_d396 397 ; CHECK-LABEL: name: fma_f64398 ; CHECK: liveins: $f10_d, $f11_d, $f12_d399 ; CHECK-NEXT: {{ $}}400 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d401 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d402 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $f12_d403 ; CHECK-NEXT: [[FMADD_D:%[0-9]+]]:fpr64 = nofpexcept FMADD_D [[COPY]], [[COPY1]], [[COPY2]], 7404 ; CHECK-NEXT: $f10_d = COPY [[FMADD_D]]405 ; CHECK-NEXT: PseudoRET implicit $f10_d406 %0:fprb(s64) = COPY $f10_d407 %1:fprb(s64) = COPY $f11_d408 %2:fprb(s64) = COPY $f12_d409 %3:fprb(s64) = G_FMA %0, %1, %2410 $f10_d = COPY %3(s64)411 PseudoRET implicit $f10_d412 413...414---415name: fneg_f64416legalized: true417regBankSelected: true418tracksRegLiveness: true419body: |420 bb.0:421 liveins: $f10_d422 423 ; CHECK-LABEL: name: fneg_f64424 ; CHECK: liveins: $f10_d425 ; CHECK-NEXT: {{ $}}426 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d427 ; CHECK-NEXT: [[FSGNJN_D:%[0-9]+]]:fpr64 = FSGNJN_D [[COPY]], [[COPY]]428 ; CHECK-NEXT: $f10_d = COPY [[FSGNJN_D]]429 ; CHECK-NEXT: PseudoRET implicit $f10_d430 %0:fprb(s64) = COPY $f10_d431 %1:fprb(s64) = G_FNEG %0432 $f10_d = COPY %1(s64)433 PseudoRET implicit $f10_d434 435...436---437name: fabs_f64438legalized: true439regBankSelected: true440tracksRegLiveness: true441body: |442 bb.0:443 liveins: $f10_d444 445 ; CHECK-LABEL: name: fabs_f64446 ; CHECK: liveins: $f10_d447 ; CHECK-NEXT: {{ $}}448 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d449 ; CHECK-NEXT: [[FSGNJX_D:%[0-9]+]]:fpr64 = FSGNJX_D [[COPY]], [[COPY]]450 ; CHECK-NEXT: $f10_d = COPY [[FSGNJX_D]]451 ; CHECK-NEXT: PseudoRET implicit $f10_d452 %0:fprb(s64) = COPY $f10_d453 %1:fprb(s64) = G_FABS %0454 $f10_d = COPY %1(s64)455 PseudoRET implicit $f10_d456 457...458---459name: fsqrt_f64460legalized: true461regBankSelected: true462tracksRegLiveness: true463body: |464 bb.0:465 liveins: $f10_d466 467 ; CHECK-LABEL: name: fsqrt_f64468 ; CHECK: liveins: $f10_d469 ; CHECK-NEXT: {{ $}}470 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d471 ; CHECK-NEXT: [[FSQRT_D:%[0-9]+]]:fpr64 = nofpexcept FSQRT_D [[COPY]], 7472 ; CHECK-NEXT: $f10_d = COPY [[FSQRT_D]]473 ; CHECK-NEXT: PseudoRET implicit $f10_d474 %0:fprb(s64) = COPY $f10_d475 %1:fprb(s64) = G_FSQRT %0476 $f10_d = COPY %1(s64)477 PseudoRET implicit $f10_d478 479...480---481name: fmaxnum_f64482legalized: true483regBankSelected: true484tracksRegLiveness: true485body: |486 bb.0:487 liveins: $f10_d, $f11_d488 489 ; CHECK-LABEL: name: fmaxnum_f64490 ; CHECK: liveins: $f10_d, $f11_d491 ; CHECK-NEXT: {{ $}}492 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d493 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d494 ; CHECK-NEXT: [[FMAX_D:%[0-9]+]]:fpr64 = nofpexcept FMAX_D [[COPY]], [[COPY1]]495 ; CHECK-NEXT: $f10_d = COPY [[FMAX_D]]496 ; CHECK-NEXT: PseudoRET implicit $f10_d497 %0:fprb(s64) = COPY $f10_d498 %1:fprb(s64) = COPY $f11_d499 %2:fprb(s64) = G_FMAXNUM %0, %1500 $f10_d = COPY %2(s64)501 PseudoRET implicit $f10_d502 503...504---505name: fminnum_f64506legalized: true507regBankSelected: true508tracksRegLiveness: true509body: |510 bb.0:511 liveins: $f10_d, $f11_d512 513 ; CHECK-LABEL: name: fminnum_f64514 ; CHECK: liveins: $f10_d, $f11_d515 ; CHECK-NEXT: {{ $}}516 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d517 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d518 ; CHECK-NEXT: [[FMIN_D:%[0-9]+]]:fpr64 = nofpexcept FMIN_D [[COPY]], [[COPY1]]519 ; CHECK-NEXT: $f10_d = COPY [[FMIN_D]]520 ; CHECK-NEXT: PseudoRET implicit $f10_d521 %0:fprb(s64) = COPY $f10_d522 %1:fprb(s64) = COPY $f11_d523 %2:fprb(s64) = G_FMINNUM %0, %1524 $f10_d = COPY %2(s64)525 PseudoRET implicit $f10_d526 527...528---529name: fcopysign_f64_f64530legalized: true531regBankSelected: true532tracksRegLiveness: true533body: |534 bb.0:535 liveins: $f10_d, $f11_d536 537 ; CHECK-LABEL: name: fcopysign_f64_f64538 ; CHECK: liveins: $f10_d, $f11_d539 ; CHECK-NEXT: {{ $}}540 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d541 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f11_d542 ; CHECK-NEXT: [[FSGNJ_D:%[0-9]+]]:fpr64 = FSGNJ_D [[COPY]], [[COPY1]]543 ; CHECK-NEXT: $f10_d = COPY [[FSGNJ_D]]544 ; CHECK-NEXT: PseudoRET implicit $f10_d545 %0:fprb(s64) = COPY $f10_d546 %1:fprb(s64) = COPY $f11_d547 %2:fprb(s64) = G_FCOPYSIGN %0, %1548 $f10_d = COPY %2(s64)549 PseudoRET implicit $f10_d550 551...552---553name: fcopysign_f64_f32554legalized: true555regBankSelected: true556tracksRegLiveness: true557body: |558 bb.0:559 liveins: $f10_d, $f11_f560 561 ; CHECK-LABEL: name: fcopysign_f64_f32562 ; CHECK: liveins: $f10_d, $f11_f563 ; CHECK-NEXT: {{ $}}564 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d565 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f11_f566 ; CHECK-NEXT: [[FCVT_D_S:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_S [[COPY1]], 0567 ; CHECK-NEXT: [[FSGNJ_D:%[0-9]+]]:fpr64 = FSGNJ_D [[COPY]], [[FCVT_D_S]]568 ; CHECK-NEXT: $f10_d = COPY [[FSGNJ_D]]569 ; CHECK-NEXT: PseudoRET implicit $f10_d570 %0:fprb(s64) = COPY $f10_d571 %1:fprb(s32) = COPY $f11_f572 %2:fprb(s64) = G_FCOPYSIGN %0, %1573 $f10_d = COPY %2(s64)574 PseudoRET implicit $f10_d575 576...577