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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=instruction-select -verify-machineinstrs %s -o - | \3# RUN: FileCheck %s4 5---6name: is_fpclass_f327legalized: true8regBankSelected: true9body: |10 bb.0:11 liveins: $f10_f12 13 ; CHECK-LABEL: name: is_fpclass_f3214 ; CHECK: liveins: $f10_f15 ; CHECK-NEXT: {{ $}}16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f17 ; CHECK-NEXT: [[FCLASS_S:%[0-9]+]]:gpr = FCLASS_S [[COPY]]18 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_S]], 15219 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]20 ; CHECK-NEXT: $x10 = COPY [[SLTU]]21 ; CHECK-NEXT: PseudoRET implicit $x1022 %0:fprb(s32) = COPY $f10_f23 %3:gprb(s32) = G_CONSTANT i32 15224 %4:gprb(s32) = G_CONSTANT i32 025 %5:gprb(s32) = G_FCLASS %0(s32)26 %6:gprb(s32) = G_AND %5, %327 %7:gprb(s32) = G_ICMP intpred(ne), %6(s32), %428 $x10 = COPY %7(s32)29 PseudoRET implicit $x1030...31---32name: is_fpclass_f32_onehot33legalized: true34regBankSelected: true35body: |36 bb.0:37 liveins: $f10_f38 39 ; CHECK-LABEL: name: is_fpclass_f32_onehot40 ; CHECK: liveins: $f10_f41 ; CHECK-NEXT: {{ $}}42 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f43 ; CHECK-NEXT: [[FCLASS_S:%[0-9]+]]:gpr = FCLASS_S [[COPY]]44 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_S]], 25645 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]46 ; CHECK-NEXT: $x10 = COPY [[SLTU]]47 ; CHECK-NEXT: PseudoRET implicit $x1048 %0:fprb(s32) = COPY $f10_f49 %3:gprb(s32) = G_CONSTANT i32 25650 %4:gprb(s32) = G_CONSTANT i32 051 %5:gprb(s32) = G_FCLASS %0(s32)52 %6:gprb(s32) = G_AND %5, %353 %7:gprb(s32) = G_ICMP intpred(ne), %6(s32), %454 $x10 = COPY %7(s32)55 PseudoRET implicit $x1056...57---58name: is_fpclass_f32_one59legalized: true60regBankSelected: true61body: |62 bb.0:63 liveins: $f10_f64 65 ; CHECK-LABEL: name: is_fpclass_f32_one66 ; CHECK: liveins: $f10_f67 ; CHECK-NEXT: {{ $}}68 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f69 ; CHECK-NEXT: [[FCLASS_S:%[0-9]+]]:gpr = FCLASS_S [[COPY]]70 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_S]], 171 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]72 ; CHECK-NEXT: $x10 = COPY [[SLTU]]73 ; CHECK-NEXT: PseudoRET implicit $x1074 %0:fprb(s32) = COPY $f10_f75 %3:gprb(s32) = G_CONSTANT i32 176 %4:gprb(s32) = G_CONSTANT i32 077 %5:gprb(s32) = G_FCLASS %0(s32)78 %6:gprb(s32) = G_AND %5, %379 %7:gprb(s32) = G_ICMP intpred(ne), %6(s32), %480 $x10 = COPY %7(s32)81 PseudoRET implicit $x1082...83---84name: is_fpclass_f6485legalized: true86regBankSelected: true87body: |88 bb.0:89 liveins: $f10_d90 91 ; CHECK-LABEL: name: is_fpclass_f6492 ; CHECK: liveins: $f10_d93 ; CHECK-NEXT: {{ $}}94 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d95 ; CHECK-NEXT: [[FCLASS_D:%[0-9]+]]:gpr = FCLASS_D [[COPY]]96 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_D]], 15297 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]98 ; CHECK-NEXT: $x10 = COPY [[SLTU]]99 ; CHECK-NEXT: PseudoRET implicit $x10100 %0:fprb(s64) = COPY $f10_d101 %3:gprb(s32) = G_CONSTANT i32 152102 %4:gprb(s32) = G_CONSTANT i32 0103 %5:gprb(s32) = G_FCLASS %0(s64)104 %6:gprb(s32) = G_AND %5, %3105 %7:gprb(s32) = G_ICMP intpred(ne), %6(s32), %4106 $x10 = COPY %7(s32)107 PseudoRET implicit $x10108...109---110name: is_fpclass_f64_onehot111legalized: true112regBankSelected: true113body: |114 bb.0:115 liveins: $f10_d116 117 ; CHECK-LABEL: name: is_fpclass_f64_onehot118 ; CHECK: liveins: $f10_d119 ; CHECK-NEXT: {{ $}}120 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d121 ; CHECK-NEXT: [[FCLASS_D:%[0-9]+]]:gpr = FCLASS_D [[COPY]]122 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_D]], 256123 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]124 ; CHECK-NEXT: $x10 = COPY [[SLTU]]125 ; CHECK-NEXT: PseudoRET implicit $x10126 %0:fprb(s64) = COPY $f10_d127 %3:gprb(s32) = G_CONSTANT i32 256128 %4:gprb(s32) = G_CONSTANT i32 0129 %5:gprb(s32) = G_FCLASS %0(s64)130 %6:gprb(s32) = G_AND %5, %3131 %7:gprb(s32) = G_ICMP intpred(ne), %6(s32), %4132 $x10 = COPY %7(s32)133 PseudoRET implicit $x10134...135---136name: is_fpclass_f64_one137legalized: true138regBankSelected: true139body: |140 bb.0:141 liveins: $f10_d142 143 ; CHECK-LABEL: name: is_fpclass_f64_one144 ; CHECK: liveins: $f10_d145 ; CHECK-NEXT: {{ $}}146 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d147 ; CHECK-NEXT: [[FCLASS_D:%[0-9]+]]:gpr = FCLASS_D [[COPY]]148 ; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[FCLASS_D]], 1149 ; CHECK-NEXT: [[SLTU:%[0-9]+]]:gpr = SLTU $x0, [[ANDI]]150 ; CHECK-NEXT: $x10 = COPY [[SLTU]]151 ; CHECK-NEXT: PseudoRET implicit $x10152 %0:fprb(s64) = COPY $f10_d153 %3:gprb(s32) = G_CONSTANT i32 1154 %4:gprb(s32) = G_CONSTANT i32 0155 %5:gprb(s32) = G_FCLASS %0(s64)156 %6:gprb(s32) = G_AND %5, %3157 %7:gprb(s32) = G_ICMP intpred(ne), %6(s32), %4158 $x10 = COPY %7(s32)159 PseudoRET implicit $x10160...161