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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+zfh -run-pass=instruction-select \3# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s4 5---6name: sitofp_s16_s327legalized: true8regBankSelected: true9tracksRegLiveness: true10body: |11 bb.0:12 liveins: $x1013 14 ; CHECK-LABEL: name: sitofp_s16_s3215 ; CHECK: liveins: $x1016 ; CHECK-NEXT: {{ $}}17 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1018 ; CHECK-NEXT: [[FCVT_H_W:%[0-9]+]]:fpr16 = nofpexcept FCVT_H_W [[COPY]], 719 ; CHECK-NEXT: $f10_h = COPY [[FCVT_H_W]]20 ; CHECK-NEXT: PseudoRET implicit $f10_h21 %0:gprb(s32) = COPY $x1022 %1:fprb(s16) = G_SITOFP %0(s32)23 $f10_h = COPY %1(s16)24 PseudoRET implicit $f10_h25 26...27---28name: uitofp_s16_s3229legalized: true30regBankSelected: true31tracksRegLiveness: true32body: |33 bb.0:34 liveins: $x1035 36 ; CHECK-LABEL: name: uitofp_s16_s3237 ; CHECK: liveins: $x1038 ; CHECK-NEXT: {{ $}}39 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1040 ; CHECK-NEXT: [[FCVT_H_WU:%[0-9]+]]:fpr16 = nofpexcept FCVT_H_WU [[COPY]], 741 ; CHECK-NEXT: $f10_h = COPY [[FCVT_H_WU]]42 ; CHECK-NEXT: PseudoRET implicit $f10_h43 %0:gprb(s32) = COPY $x1044 %1:fprb(s16) = G_UITOFP %0(s32)45 $f10_h = COPY %1(s16)46 PseudoRET implicit $f10_h47 48...49