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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -run-pass=instruction-select %s -o - \3# RUN: -disable-gisel-legality-check | FileCheck %s4 5---6name: load_i8_i647legalized: true8regBankSelected: true9tracksRegLiveness: true10body: |11 bb.0:12 liveins: $x1013 14 ; CHECK-LABEL: name: load_i8_i6415 ; CHECK: liveins: $x1016 ; CHECK-NEXT: {{ $}}17 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1018 ; CHECK-NEXT: [[LBU:%[0-9]+]]:gpr = LBU [[COPY]], 0 :: (load (s8))19 ; CHECK-NEXT: $x10 = COPY [[LBU]]20 ; CHECK-NEXT: PseudoRET implicit $x1021 %0:gprb(p0) = COPY $x1022 %1:gprb(s64) = G_LOAD %0(p0) :: (load (s8))23 $x10 = COPY %1(s64)24 PseudoRET implicit $x1025 26...27---28name: load_i16_i6429legalized: true30regBankSelected: true31tracksRegLiveness: true32body: |33 bb.0:34 liveins: $x1035 36 ; CHECK-LABEL: name: load_i16_i6437 ; CHECK: liveins: $x1038 ; CHECK-NEXT: {{ $}}39 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1040 ; CHECK-NEXT: [[LH:%[0-9]+]]:gpr = LH [[COPY]], 0 :: (load (s16))41 ; CHECK-NEXT: $x10 = COPY [[LH]]42 ; CHECK-NEXT: PseudoRET implicit $x1043 %0:gprb(p0) = COPY $x1044 %1:gprb(s64) = G_LOAD %0(p0) :: (load (s16))45 $x10 = COPY %1(s64)46 PseudoRET implicit $x1047 48...49---50name: load_i8_i1651legalized: true52regBankSelected: true53tracksRegLiveness: true54body: |55 bb.0:56 liveins: $x1057 58 ; CHECK-LABEL: name: load_i8_i1659 ; CHECK: liveins: $x1060 ; CHECK-NEXT: {{ $}}61 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1062 ; CHECK-NEXT: [[LBU:%[0-9]+]]:gpr = LBU [[COPY]], 0 :: (load (s8))63 ; CHECK-NEXT: $x10 = COPY [[LBU]]64 ; CHECK-NEXT: PseudoRET implicit $x1065 %0:gprb(p0) = COPY $x1066 %1:gprb(s16) = G_LOAD %0(p0) :: (load (s8))67 %2:gprb(s64) = G_ANYEXT %168 $x10 = COPY %2(s64)69 PseudoRET implicit $x1070 71...72---73name: load_i16_i1674legalized: true75regBankSelected: true76tracksRegLiveness: true77body: |78 bb.0:79 liveins: $x1080 81 ; CHECK-LABEL: name: load_i16_i1682 ; CHECK: liveins: $x1083 ; CHECK-NEXT: {{ $}}84 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1085 ; CHECK-NEXT: [[LH:%[0-9]+]]:gpr = LH [[COPY]], 0 :: (load (s16))86 ; CHECK-NEXT: $x10 = COPY [[LH]]87 ; CHECK-NEXT: PseudoRET implicit $x1088 %0:gprb(p0) = COPY $x1089 %1:gprb(s16) = G_LOAD %0(p0) :: (load (s16))90 %2:gprb(s64) = G_ANYEXT %191 $x10 = COPY %2(s64)92 PseudoRET implicit $x1093 94...95---96name: load_i32_i6497legalized: true98regBankSelected: true99tracksRegLiveness: true100body: |101 bb.0:102 liveins: $x10103 104 ; CHECK-LABEL: name: load_i32_i64105 ; CHECK: liveins: $x10106 ; CHECK-NEXT: {{ $}}107 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10108 ; CHECK-NEXT: [[LW:%[0-9]+]]:gpr = LW [[COPY]], 0 :: (load (s32))109 ; CHECK-NEXT: $x10 = COPY [[LW]]110 ; CHECK-NEXT: PseudoRET implicit $x10111 %0:gprb(p0) = COPY $x10112 %1:gprb(s64) = G_LOAD %0(p0) :: (load (s32))113 $x10 = COPY %1(s64)114 PseudoRET implicit $x10115 116...117---118name: load_i64_i64119legalized: true120regBankSelected: true121tracksRegLiveness: true122body: |123 bb.0:124 liveins: $x10125 126 ; CHECK-LABEL: name: load_i64_i64127 ; CHECK: liveins: $x10128 ; CHECK-NEXT: {{ $}}129 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10130 ; CHECK-NEXT: [[LD:%[0-9]+]]:gpr = LD [[COPY]], 0 :: (load (s64))131 ; CHECK-NEXT: $x10 = COPY [[LD]]132 ; CHECK-NEXT: PseudoRET implicit $x10133 %0:gprb(p0) = COPY $x10134 %1:gprb(s64) = G_LOAD %0(p0) :: (load (s64))135 $x10 = COPY %1(s64)136 PseudoRET implicit $x10137 138...139---140name: load_p0141legalized: true142regBankSelected: true143tracksRegLiveness: true144body: |145 bb.0:146 liveins: $x10147 148 ; CHECK-LABEL: name: load_p0149 ; CHECK: liveins: $x10150 ; CHECK-NEXT: {{ $}}151 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10152 ; CHECK-NEXT: [[LD:%[0-9]+]]:gpr = LD [[COPY]], 0 :: (load (p0))153 ; CHECK-NEXT: $x10 = COPY [[LD]]154 ; CHECK-NEXT: PseudoRET implicit $x10155 %0:gprb(p0) = COPY $x10156 %1:gprb(p0) = G_LOAD %0(p0) :: (load (p0))157 $x10 = COPY %1(p0)158 PseudoRET implicit $x10159 160...161---162name: zextload_i8_i64163legalized: true164regBankSelected: true165tracksRegLiveness: true166body: |167 bb.0:168 liveins: $x10169 170 ; CHECK-LABEL: name: zextload_i8_i64171 ; CHECK: liveins: $x10172 ; CHECK-NEXT: {{ $}}173 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10174 ; CHECK-NEXT: [[LBU:%[0-9]+]]:gpr = LBU [[COPY]], 0 :: (load (s8))175 ; CHECK-NEXT: $x10 = COPY [[LBU]]176 ; CHECK-NEXT: PseudoRET implicit $x10177 %0:gprb(p0) = COPY $x10178 %1:gprb(s64) = G_ZEXTLOAD %0(p0) :: (load (s8))179 $x10 = COPY %1(s64)180 PseudoRET implicit $x10181 182...183---184name: zextload_i16_i64185legalized: true186regBankSelected: true187tracksRegLiveness: true188body: |189 bb.0:190 liveins: $x10191 192 ; CHECK-LABEL: name: zextload_i16_i64193 ; CHECK: liveins: $x10194 ; CHECK-NEXT: {{ $}}195 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10196 ; CHECK-NEXT: [[LHU:%[0-9]+]]:gpr = LHU [[COPY]], 0 :: (load (s16))197 ; CHECK-NEXT: $x10 = COPY [[LHU]]198 ; CHECK-NEXT: PseudoRET implicit $x10199 %0:gprb(p0) = COPY $x10200 %1:gprb(s64) = G_ZEXTLOAD %0(p0) :: (load (s16))201 $x10 = COPY %1(s64)202 PseudoRET implicit $x10203 204...205---206name: zextload_i32_i64207legalized: true208regBankSelected: true209tracksRegLiveness: true210body: |211 bb.0:212 liveins: $x10213 214 ; CHECK-LABEL: name: zextload_i32_i64215 ; CHECK: liveins: $x10216 ; CHECK-NEXT: {{ $}}217 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10218 ; CHECK-NEXT: [[LWU:%[0-9]+]]:gpr = LWU [[COPY]], 0 :: (load (s32))219 ; CHECK-NEXT: $x10 = COPY [[LWU]]220 ; CHECK-NEXT: PseudoRET implicit $x10221 %0:gprb(p0) = COPY $x10222 %1:gprb(s64) = G_ZEXTLOAD %0(p0) :: (load (s32))223 $x10 = COPY %1(s64)224 PseudoRET implicit $x10225 226...227---228name: sextload_i8_i64229legalized: true230regBankSelected: true231tracksRegLiveness: true232body: |233 bb.0:234 liveins: $x10235 236 ; CHECK-LABEL: name: sextload_i8_i64237 ; CHECK: liveins: $x10238 ; CHECK-NEXT: {{ $}}239 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10240 ; CHECK-NEXT: [[LB:%[0-9]+]]:gpr = LB [[COPY]], 0 :: (load (s8))241 ; CHECK-NEXT: $x10 = COPY [[LB]]242 ; CHECK-NEXT: PseudoRET implicit $x10243 %0:gprb(p0) = COPY $x10244 %1:gprb(s64) = G_SEXTLOAD %0(p0) :: (load (s8))245 $x10 = COPY %1(s64)246 PseudoRET implicit $x10247 248...249---250name: sextload_i16_i64251legalized: true252regBankSelected: true253tracksRegLiveness: true254body: |255 bb.0:256 liveins: $x10257 258 ; CHECK-LABEL: name: sextload_i16_i64259 ; CHECK: liveins: $x10260 ; CHECK-NEXT: {{ $}}261 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10262 ; CHECK-NEXT: [[LH:%[0-9]+]]:gpr = LH [[COPY]], 0 :: (load (s16))263 ; CHECK-NEXT: $x10 = COPY [[LH]]264 ; CHECK-NEXT: PseudoRET implicit $x10265 %0:gprb(p0) = COPY $x10266 %1:gprb(s64) = G_SEXTLOAD %0(p0) :: (load (s16))267 $x10 = COPY %1(s64)268 PseudoRET implicit $x10269 270...271---272name: sextload_i32_i64273legalized: true274regBankSelected: true275tracksRegLiveness: true276body: |277 bb.0:278 liveins: $x10279 280 ; CHECK-LABEL: name: sextload_i32_i64281 ; CHECK: liveins: $x10282 ; CHECK-NEXT: {{ $}}283 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10284 ; CHECK-NEXT: [[LW:%[0-9]+]]:gpr = LW [[COPY]], 0 :: (load (s32))285 ; CHECK-NEXT: $x10 = COPY [[LW]]286 ; CHECK-NEXT: PseudoRET implicit $x10287 %0:gprb(p0) = COPY $x10288 %1:gprb(s64) = G_SEXTLOAD %0(p0) :: (load (s32))289 $x10 = COPY %1(s64)290 PseudoRET implicit $x10291 292...293---294name: load_i8_i32295legalized: true296regBankSelected: true297tracksRegLiveness: true298body: |299 bb.0:300 liveins: $x10301 ; CHECK-LABEL: name: load_i8_i32302 ; CHECK: liveins: $x10303 ; CHECK-NEXT: {{ $}}304 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10305 ; CHECK-NEXT: [[LBU:%[0-9]+]]:gpr = LBU [[COPY]], 0 :: (load (s8))306 ; CHECK-NEXT: $x10 = COPY [[LBU]]307 ; CHECK-NEXT: PseudoRET implicit $x10308 %0:gprb(p0) = COPY $x10309 %9:gprb(s32) = G_LOAD %0(p0) :: (load (s8))310 %5:gprb(s64) = G_ANYEXT %9(s32)311 $x10 = COPY %5(s64)312 PseudoRET implicit $x10313 314...315---316name: load_i16_i32317legalized: true318regBankSelected: true319tracksRegLiveness: true320body: |321 bb.0:322 liveins: $x10323 ; CHECK-LABEL: name: load_i16_i32324 ; CHECK: liveins: $x10325 ; CHECK-NEXT: {{ $}}326 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10327 ; CHECK-NEXT: [[LH:%[0-9]+]]:gpr = LH [[COPY]], 0 :: (load (s16))328 ; CHECK-NEXT: $x10 = COPY [[LH]]329 ; CHECK-NEXT: PseudoRET implicit $x10330 %0:gprb(p0) = COPY $x10331 %9:gprb(s32) = G_LOAD %0(p0) :: (load (s16))332 %5:gprb(s64) = G_ANYEXT %9(s32)333 $x10 = COPY %5(s64)334 PseudoRET implicit $x10335 336...337---338name: load_i32_i32339legalized: true340regBankSelected: true341tracksRegLiveness: true342body: |343 bb.0:344 liveins: $x10345 ; CHECK-LABEL: name: load_i32_i32346 ; CHECK: liveins: $x10347 ; CHECK-NEXT: {{ $}}348 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10349 ; CHECK-NEXT: [[LW:%[0-9]+]]:gpr = LW [[COPY]], 0 :: (load (s32))350 ; CHECK-NEXT: $x10 = COPY [[LW]]351 ; CHECK-NEXT: PseudoRET implicit $x10352 %0:gprb(p0) = COPY $x10353 %9:gprb(s32) = G_LOAD %0(p0) :: (load (s32))354 %5:gprb(s64) = G_ANYEXT %9(s32)355 $x10 = COPY %5(s64)356 PseudoRET implicit $x10357 358...359---360name: load_fi_i64361legalized: true362regBankSelected: true363tracksRegLiveness: true364 365stack:366 - { id: 0, offset: 0, size: 8, alignment: 8 }367 368body: |369 bb.0:370 ; CHECK-LABEL: name: load_fi_i64371 ; CHECK: [[LD:%[0-9]+]]:gpr = LD %stack.0, 0 :: (load (s64))372 ; CHECK-NEXT: $x10 = COPY [[LD]]373 ; CHECK-NEXT: PseudoRET implicit $x10374 %0:gprb(p0) = G_FRAME_INDEX %stack.0375 %1:gprb(s64) = G_LOAD %0(p0) :: (load (s64))376 $x10 = COPY %1(s64)377 PseudoRET implicit $x10378 379...380---381name: load_fi_gep_i64_i64382legalized: true383regBankSelected: true384tracksRegLiveness: true385 386stack:387 - { id: 0, offset: 0, size: 16, alignment: 8 }388 389body: |390 bb.0:391 ; CHECK-LABEL: name: load_fi_gep_i64_i64392 ; CHECK: [[LD:%[0-9]+]]:gpr = LD %stack.0, 8 :: (load (s64))393 ; CHECK-NEXT: $x10 = COPY [[LD]]394 ; CHECK-NEXT: PseudoRET implicit $x10395 %0:gprb(p0) = G_FRAME_INDEX %stack.0396 %1:gprb(s64) = G_CONSTANT i64 8397 %2:gprb(p0) = G_PTR_ADD %0(p0), %1(s64)398 %3:gprb(s64) = G_LOAD %2(p0) :: (load (s64))399 $x10 = COPY %3(s64)400 PseudoRET implicit $x10401 402...403---404name: load_gep_i64_i64405legalized: true406regBankSelected: true407tracksRegLiveness: true408body: |409 bb.0:410 liveins: $x10411 412 ; CHECK-LABEL: name: load_gep_i64_i64413 ; CHECK: liveins: $x10414 ; CHECK-NEXT: {{ $}}415 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10416 ; CHECK-NEXT: [[LD:%[0-9]+]]:gpr = LD [[COPY]], 8 :: (load (s64))417 ; CHECK-NEXT: $x10 = COPY [[LD]]418 ; CHECK-NEXT: PseudoRET implicit $x10419 %0:gprb(p0) = COPY $x10420 %1:gprb(s64) = G_CONSTANT i64 8421 %2:gprb(p0) = G_PTR_ADD %0(p0), %1(s64)422 %3:gprb(s64) = G_LOAD %2(p0) :: (load (s64))423 $x10 = COPY %3(s64)424 PseudoRET implicit $x10425 426...427