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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -run-pass=instruction-select -simplify-mir \3# RUN: -verify-machineinstrs %s -o - | FileCheck %s4---5name: add_i646legalized: true7regBankSelected: true8tracksRegLiveness: true9body: |10 bb.0.entry:11 liveins: $x10, $x1112 13 ; CHECK-LABEL: name: add_i6414 ; CHECK: liveins: $x10, $x1115 ; CHECK-NEXT: {{ $}}16 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1017 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x1118 ; CHECK-NEXT: [[ADD:%[0-9]+]]:gpr = ADD [[COPY]], [[COPY1]]19 ; CHECK-NEXT: $x10 = COPY [[ADD]]20 ; CHECK-NEXT: PseudoRET implicit $x1021 %0:gprb(p0) = COPY $x1022 %1:gprb(s64) = COPY $x1123 %2:gprb(p0) = G_PTR_ADD %0, %124 $x10 = COPY %2(p0)25 PseudoRET implicit $x1026 27...28---29name: addi_i6430legalized: true31regBankSelected: true32tracksRegLiveness: true33body: |34 bb.0.entry:35 liveins: $x10, $x1136 37 ; CHECK-LABEL: name: addi_i6438 ; CHECK: liveins: $x10, $x1139 ; CHECK-NEXT: {{ $}}40 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1041 ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[COPY]], 2042 ; CHECK-NEXT: $x10 = COPY [[ADDI]]43 ; CHECK-NEXT: PseudoRET implicit $x1044 %0:gprb(p0) = COPY $x1045 %1:gprb(s64) = G_CONSTANT i64 2046 %2:gprb(p0) = G_PTR_ADD %0, %147 $x10 = COPY %2(p0)48 PseudoRET implicit $x1049 50...51