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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -mattr=+zbb -run-pass=instruction-select \3# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s4# RUN: llc -mtriple=riscv64 -mattr=+zbkb -run-pass=instruction-select \5# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s6 7---8name: rotl_i329legalized: true10regBankSelected: true11tracksRegLiveness: true12body: |13 bb.0:14 liveins: $x10, $x1115 16 ; CHECK-LABEL: name: rotl_i3217 ; CHECK: liveins: $x10, $x1118 ; CHECK-NEXT: {{ $}}19 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1020 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x1121 ; CHECK-NEXT: [[ROLW:%[0-9]+]]:gpr = ROLW [[COPY]], [[COPY1]]22 ; CHECK-NEXT: $x10 = COPY [[ROLW]]23 ; CHECK-NEXT: PseudoRET implicit $x1024 %0:gprb(s64) = COPY $x1025 %1:gprb(s64) = COPY $x1126 %2:gprb(s64) = G_ROLW %0, %1(s64)27 $x10 = COPY %2(s64)28 PseudoRET implicit $x1029 30...31---32name: rotl_i6433legalized: true34regBankSelected: true35tracksRegLiveness: true36body: |37 bb.0:38 liveins: $x10, $x1139 40 ; CHECK-LABEL: name: rotl_i6441 ; CHECK: liveins: $x10, $x1142 ; CHECK-NEXT: {{ $}}43 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1044 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x1145 ; CHECK-NEXT: [[ROL:%[0-9]+]]:gpr = ROL [[COPY]], [[COPY1]]46 ; CHECK-NEXT: $x10 = COPY [[ROL]]47 ; CHECK-NEXT: PseudoRET implicit $x1048 %0:gprb(s64) = COPY $x1049 %1:gprb(s64) = COPY $x1150 %2:gprb(s64) = G_ROTL %0, %1(s64)51 $x10 = COPY %2(s64)52 PseudoRET implicit $x1053 54...55---56name: rotr_i3257legalized: true58regBankSelected: true59body: |60 bb.0:61 liveins: $x10, $x1162 63 ; CHECK-LABEL: name: rotr_i3264 ; CHECK: liveins: $x10, $x1165 ; CHECK-NEXT: {{ $}}66 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1067 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x1168 ; CHECK-NEXT: [[RORW:%[0-9]+]]:gpr = RORW [[COPY]], [[COPY1]]69 ; CHECK-NEXT: $x10 = COPY [[RORW]]70 ; CHECK-NEXT: PseudoRET implicit $x1071 %0:gprb(s64) = COPY $x1072 %1:gprb(s64) = COPY $x1173 %2:gprb(s64) = G_RORW %0, %1(s64)74 $x10 = COPY %2(s64)75 PseudoRET implicit $x1076 77...78---79name: rotr_i6480legalized: true81regBankSelected: true82body: |83 bb.0:84 liveins: $x10, $x1185 86 ; CHECK-LABEL: name: rotr_i6487 ; CHECK: liveins: $x10, $x1188 ; CHECK-NEXT: {{ $}}89 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x1090 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x1191 ; CHECK-NEXT: [[ROR:%[0-9]+]]:gpr = ROR [[COPY]], [[COPY1]]92 ; CHECK-NEXT: $x10 = COPY [[ROR]]93 ; CHECK-NEXT: PseudoRET implicit $x1094 %0:gprb(s64) = COPY $x1095 %1:gprb(s64) = COPY $x1196 %2:gprb(s64) = G_ROTR %0, %1(s64)97 $x10 = COPY %2(s64)98 PseudoRET implicit $x1099 100...101---102name: rotl_imm_i32103legalized: true104regBankSelected: true105tracksRegLiveness: true106body: |107 bb.0:108 liveins: $x10109 110 ; CHECK-LABEL: name: rotl_imm_i32111 ; CHECK: liveins: $x10112 ; CHECK-NEXT: {{ $}}113 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10114 ; CHECK-NEXT: [[RORIW:%[0-9]+]]:gpr = RORIW [[COPY]], 17115 ; CHECK-NEXT: $x10 = COPY [[RORIW]]116 ; CHECK-NEXT: PseudoRET implicit $x10117 %0:gprb(s64) = COPY $x10118 %1:gprb(s64) = G_CONSTANT i64 15119 %2:gprb(s64) = G_ROLW %0, %1(s64)120 $x10 = COPY %2(s64)121 PseudoRET implicit $x10122 123...124---125name: rotl_imm_i64126legalized: true127regBankSelected: true128tracksRegLiveness: true129body: |130 bb.0:131 liveins: $x10132 133 ; CHECK-LABEL: name: rotl_imm_i64134 ; CHECK: liveins: $x10135 ; CHECK-NEXT: {{ $}}136 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10137 ; CHECK-NEXT: [[RORI:%[0-9]+]]:gpr = RORI [[COPY]], 31138 ; CHECK-NEXT: $x10 = COPY [[RORI]]139 ; CHECK-NEXT: PseudoRET implicit $x10140 %0:gprb(s64) = COPY $x10141 %1:gprb(s64) = G_CONSTANT i64 33142 %2:gprb(s64) = G_ROTL %0, %1(s64)143 $x10 = COPY %2(s64)144 PseudoRET implicit $x10145 146...147---148name: rotr_imm_i32149legalized: true150regBankSelected: true151tracksRegLiveness: true152body: |153 bb.0:154 liveins: $x10155 156 ; CHECK-LABEL: name: rotr_imm_i32157 ; CHECK: liveins: $x10158 ; CHECK-NEXT: {{ $}}159 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10160 ; CHECK-NEXT: [[RORIW:%[0-9]+]]:gpr = RORIW [[COPY]], 15161 ; CHECK-NEXT: $x10 = COPY [[RORIW]]162 ; CHECK-NEXT: PseudoRET implicit $x10163 %0:gprb(s64) = COPY $x10164 %1:gprb(s64) = G_CONSTANT i64 15165 %2:gprb(s64) = G_RORW %0, %1(s64)166 $x10 = COPY %2(s64)167 PseudoRET implicit $x10168 169...170---171name: rotr_imm_i64172legalized: true173regBankSelected: true174tracksRegLiveness: true175body: |176 bb.0:177 liveins: $x10178 179 ; CHECK-LABEL: name: rotr_imm_i64180 ; CHECK: liveins: $x10181 ; CHECK-NEXT: {{ $}}182 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10183 ; CHECK-NEXT: [[RORI:%[0-9]+]]:gpr = RORI [[COPY]], 33184 ; CHECK-NEXT: $x10 = COPY [[RORI]]185 ; CHECK-NEXT: PseudoRET implicit $x10186 %0:gprb(s64) = COPY $x10187 %1:gprb(s64) = G_CONSTANT i64 33188 %2:gprb(s64) = G_ROTR %0, %1(s64)189 $x10 = COPY %2(s64)190 PseudoRET implicit $x10191 192...193