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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+v -run-pass=instruction-select -simplify-mir \3# RUN: -verify-machineinstrs %s -o - | FileCheck -check-prefix=RV32I %s4# RUN: llc -mtriple=riscv64 -mattr=+v -run-pass=instruction-select -simplify-mir \5# RUN: -verify-machineinstrs %s -o - | FileCheck -check-prefix=RV64I %s6 7---8name: anyext_nxv1i16_nxv1i89legalized: true10regBankSelected: true11tracksRegLiveness: true12body: |13 bb.0.entry:14 liveins: $v815 16 ; RV32I-LABEL: name: anyext_nxv1i16_nxv1i817 ; RV32I: liveins: $v818 ; RV32I-NEXT: {{ $}}19 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v820 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF21 ; RV32I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_MF4 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */22 ; RV32I-NEXT: $v8 = COPY %123 ; RV32I-NEXT: PseudoRET implicit $v824 ;25 ; RV64I-LABEL: name: anyext_nxv1i16_nxv1i826 ; RV64I: liveins: $v827 ; RV64I-NEXT: {{ $}}28 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v829 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF30 ; RV64I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_MF4 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */31 ; RV64I-NEXT: $v8 = COPY %132 ; RV64I-NEXT: PseudoRET implicit $v833 %0:vrb(<vscale x 1 x s8>) = COPY $v834 %1:vrb(<vscale x 1 x s16>) = G_ANYEXT %0(<vscale x 1 x s8>)35 $v8 = COPY %1(<vscale x 1 x s16>)36 PseudoRET implicit $v837 38...39---40name: anyext_nxv1i32_nxv1i841legalized: true42regBankSelected: true43tracksRegLiveness: true44body: |45 bb.0.entry:46 liveins: $v847 48 ; RV32I-LABEL: name: anyext_nxv1i32_nxv1i849 ; RV32I: liveins: $v850 ; RV32I-NEXT: {{ $}}51 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v852 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF53 ; RV32I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF4_MF2 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */54 ; RV32I-NEXT: $v8 = COPY %155 ; RV32I-NEXT: PseudoRET implicit $v856 ;57 ; RV64I-LABEL: name: anyext_nxv1i32_nxv1i858 ; RV64I: liveins: $v859 ; RV64I-NEXT: {{ $}}60 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v861 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF62 ; RV64I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF4_MF2 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */63 ; RV64I-NEXT: $v8 = COPY %164 ; RV64I-NEXT: PseudoRET implicit $v865 %0:vrb(<vscale x 1 x s8>) = COPY $v866 %1:vrb(<vscale x 1 x s32>) = G_ANYEXT %0(<vscale x 1 x s8>)67 $v8 = COPY %1(<vscale x 1 x s32>)68 PseudoRET implicit $v869 70...71---72name: anyext_nxv1i64_nxv1i873legalized: true74regBankSelected: true75tracksRegLiveness: true76body: |77 bb.0.entry:78 liveins: $v879 80 ; RV32I-LABEL: name: anyext_nxv1i64_nxv1i881 ; RV32I: liveins: $v882 ; RV32I-NEXT: {{ $}}83 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v884 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF85 ; RV32I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF8_M1 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */86 ; RV32I-NEXT: $v8 = COPY %187 ; RV32I-NEXT: PseudoRET implicit $v888 ;89 ; RV64I-LABEL: name: anyext_nxv1i64_nxv1i890 ; RV64I: liveins: $v891 ; RV64I-NEXT: {{ $}}92 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v893 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF94 ; RV64I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF8_M1 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */95 ; RV64I-NEXT: $v8 = COPY %196 ; RV64I-NEXT: PseudoRET implicit $v897 %0:vrb(<vscale x 1 x s8>) = COPY $v898 %1:vrb(<vscale x 1 x s64>) = G_ANYEXT %0(<vscale x 1 x s8>)99 $v8 = COPY %1(<vscale x 1 x s64>)100 PseudoRET implicit $v8101 102...103---104name: anyext_nxv2i16_nxv2i8105legalized: true106regBankSelected: true107tracksRegLiveness: true108body: |109 bb.0.entry:110 liveins: $v8111 112 ; RV32I-LABEL: name: anyext_nxv2i16_nxv2i8113 ; RV32I: liveins: $v8114 ; RV32I-NEXT: {{ $}}115 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8116 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF117 ; RV32I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_MF2 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */118 ; RV32I-NEXT: $v8 = COPY %1119 ; RV32I-NEXT: PseudoRET implicit $v8120 ;121 ; RV64I-LABEL: name: anyext_nxv2i16_nxv2i8122 ; RV64I: liveins: $v8123 ; RV64I-NEXT: {{ $}}124 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8125 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF126 ; RV64I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_MF2 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */127 ; RV64I-NEXT: $v8 = COPY %1128 ; RV64I-NEXT: PseudoRET implicit $v8129 %0:vrb(<vscale x 2 x s8>) = COPY $v8130 %1:vrb(<vscale x 2 x s16>) = G_ANYEXT %0(<vscale x 2 x s8>)131 $v8 = COPY %1(<vscale x 2 x s16>)132 PseudoRET implicit $v8133 134...135---136name: anyext_nxv2i32_nxv2i8137legalized: true138regBankSelected: true139tracksRegLiveness: true140body: |141 bb.0.entry:142 liveins: $v8143 144 ; RV32I-LABEL: name: anyext_nxv2i32_nxv2i8145 ; RV32I: liveins: $v8146 ; RV32I-NEXT: {{ $}}147 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8148 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF149 ; RV32I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF4_M1 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */150 ; RV32I-NEXT: $v8 = COPY %1151 ; RV32I-NEXT: PseudoRET implicit $v8152 ;153 ; RV64I-LABEL: name: anyext_nxv2i32_nxv2i8154 ; RV64I: liveins: $v8155 ; RV64I-NEXT: {{ $}}156 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8157 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF158 ; RV64I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF4_M1 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */159 ; RV64I-NEXT: $v8 = COPY %1160 ; RV64I-NEXT: PseudoRET implicit $v8161 %0:vrb(<vscale x 2 x s8>) = COPY $v8162 %1:vrb(<vscale x 2 x s32>) = G_ANYEXT %0(<vscale x 2 x s8>)163 $v8 = COPY %1(<vscale x 2 x s32>)164 PseudoRET implicit $v8165 166...167---168name: anyext_nxv2i64_nxv2i8169legalized: true170regBankSelected: true171tracksRegLiveness: true172body: |173 bb.0.entry:174 liveins: $v8175 176 ; RV32I-LABEL: name: anyext_nxv2i64_nxv2i8177 ; RV32I: liveins: $v8178 ; RV32I-NEXT: {{ $}}179 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8180 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF181 ; RV32I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF8_M2 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */182 ; RV32I-NEXT: $v8m2 = COPY %1183 ; RV32I-NEXT: PseudoRET implicit $v8m2184 ;185 ; RV64I-LABEL: name: anyext_nxv2i64_nxv2i8186 ; RV64I: liveins: $v8187 ; RV64I-NEXT: {{ $}}188 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8189 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF190 ; RV64I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF8_M2 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */191 ; RV64I-NEXT: $v8m2 = COPY %1192 ; RV64I-NEXT: PseudoRET implicit $v8m2193 %0:vrb(<vscale x 2 x s8>) = COPY $v8194 %1:vrb(<vscale x 2 x s64>) = G_ANYEXT %0(<vscale x 2 x s8>)195 $v8m2 = COPY %1(<vscale x 2 x s64>)196 PseudoRET implicit $v8m2197 198...199---200name: anyext_nxv4i16_nxv4i8201legalized: true202regBankSelected: true203tracksRegLiveness: true204body: |205 bb.0.entry:206 liveins: $v8207 208 ; RV32I-LABEL: name: anyext_nxv4i16_nxv4i8209 ; RV32I: liveins: $v8210 ; RV32I-NEXT: {{ $}}211 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8212 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF213 ; RV32I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_M1 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */214 ; RV32I-NEXT: $v8 = COPY %1215 ; RV32I-NEXT: PseudoRET implicit $v8216 ;217 ; RV64I-LABEL: name: anyext_nxv4i16_nxv4i8218 ; RV64I: liveins: $v8219 ; RV64I-NEXT: {{ $}}220 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8221 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF222 ; RV64I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_M1 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */223 ; RV64I-NEXT: $v8 = COPY %1224 ; RV64I-NEXT: PseudoRET implicit $v8225 %0:vrb(<vscale x 4 x s8>) = COPY $v8226 %1:vrb(<vscale x 4 x s16>) = G_ANYEXT %0(<vscale x 4 x s8>)227 $v8 = COPY %1(<vscale x 4 x s16>)228 PseudoRET implicit $v8229 230...231---232name: anyext_nxv4i32_nxv4i8233legalized: true234regBankSelected: true235tracksRegLiveness: true236body: |237 bb.0.entry:238 liveins: $v8239 240 ; RV32I-LABEL: name: anyext_nxv4i32_nxv4i8241 ; RV32I: liveins: $v8242 ; RV32I-NEXT: {{ $}}243 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8244 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF245 ; RV32I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF4_M2 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */246 ; RV32I-NEXT: $v8m2 = COPY %1247 ; RV32I-NEXT: PseudoRET implicit $v8m2248 ;249 ; RV64I-LABEL: name: anyext_nxv4i32_nxv4i8250 ; RV64I: liveins: $v8251 ; RV64I-NEXT: {{ $}}252 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8253 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF254 ; RV64I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF4_M2 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */255 ; RV64I-NEXT: $v8m2 = COPY %1256 ; RV64I-NEXT: PseudoRET implicit $v8m2257 %0:vrb(<vscale x 4 x s8>) = COPY $v8258 %1:vrb(<vscale x 4 x s32>) = G_ANYEXT %0(<vscale x 4 x s8>)259 $v8m2 = COPY %1(<vscale x 4 x s32>)260 PseudoRET implicit $v8m2261 262...263---264name: anyext_nxv4i64_nxv4i8265legalized: true266regBankSelected: true267tracksRegLiveness: true268body: |269 bb.0.entry:270 liveins: $v8271 272 ; RV32I-LABEL: name: anyext_nxv4i64_nxv4i8273 ; RV32I: liveins: $v8274 ; RV32I-NEXT: {{ $}}275 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8276 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF277 ; RV32I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF8_M4 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */278 ; RV32I-NEXT: $v8m4 = COPY %1279 ; RV32I-NEXT: PseudoRET implicit $v8m4280 ;281 ; RV64I-LABEL: name: anyext_nxv4i64_nxv4i8282 ; RV64I: liveins: $v8283 ; RV64I-NEXT: {{ $}}284 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8285 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF286 ; RV64I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF8_M4 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */287 ; RV64I-NEXT: $v8m4 = COPY %1288 ; RV64I-NEXT: PseudoRET implicit $v8m4289 %0:vrb(<vscale x 4 x s8>) = COPY $v8290 %1:vrb(<vscale x 4 x s64>) = G_ANYEXT %0(<vscale x 4 x s8>)291 $v8m4 = COPY %1(<vscale x 4 x s64>)292 PseudoRET implicit $v8m4293 294...295---296name: anyext_nxv8i16_nxv8i8297legalized: true298regBankSelected: true299tracksRegLiveness: true300body: |301 bb.0.entry:302 liveins: $v8303 304 ; RV32I-LABEL: name: anyext_nxv8i16_nxv8i8305 ; RV32I: liveins: $v8306 ; RV32I-NEXT: {{ $}}307 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8308 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF309 ; RV32I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF2_M2 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */310 ; RV32I-NEXT: $v8m2 = COPY %1311 ; RV32I-NEXT: PseudoRET implicit $v8m2312 ;313 ; RV64I-LABEL: name: anyext_nxv8i16_nxv8i8314 ; RV64I: liveins: $v8315 ; RV64I-NEXT: {{ $}}316 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8317 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF318 ; RV64I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF2_M2 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */319 ; RV64I-NEXT: $v8m2 = COPY %1320 ; RV64I-NEXT: PseudoRET implicit $v8m2321 %0:vrb(<vscale x 8 x s8>) = COPY $v8322 %1:vrb(<vscale x 8 x s16>) = G_ANYEXT %0(<vscale x 8 x s8>)323 $v8m2 = COPY %1(<vscale x 8 x s16>)324 PseudoRET implicit $v8m2325 326...327---328name: anyext_nxv8i32_nxv8i8329legalized: true330regBankSelected: true331tracksRegLiveness: true332body: |333 bb.0.entry:334 liveins: $v8335 336 ; RV32I-LABEL: name: anyext_nxv8i32_nxv8i8337 ; RV32I: liveins: $v8338 ; RV32I-NEXT: {{ $}}339 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8340 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF341 ; RV32I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF4_M4 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */342 ; RV32I-NEXT: $v8m4 = COPY %1343 ; RV32I-NEXT: PseudoRET implicit $v8m4344 ;345 ; RV64I-LABEL: name: anyext_nxv8i32_nxv8i8346 ; RV64I: liveins: $v8347 ; RV64I-NEXT: {{ $}}348 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8349 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF350 ; RV64I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF4_M4 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */351 ; RV64I-NEXT: $v8m4 = COPY %1352 ; RV64I-NEXT: PseudoRET implicit $v8m4353 %0:vrb(<vscale x 8 x s8>) = COPY $v8354 %1:vrb(<vscale x 8 x s32>) = G_ANYEXT %0(<vscale x 8 x s8>)355 $v8m4 = COPY %1(<vscale x 8 x s32>)356 PseudoRET implicit $v8m4357 358...359---360name: anyext_nxv8i64_nxv8i8361legalized: true362regBankSelected: true363tracksRegLiveness: true364body: |365 bb.0.entry:366 liveins: $v8367 368 ; RV32I-LABEL: name: anyext_nxv8i64_nxv8i8369 ; RV32I: liveins: $v8370 ; RV32I-NEXT: {{ $}}371 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8372 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF373 ; RV32I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF8_M8 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */374 ; RV32I-NEXT: $v8m8 = COPY %1375 ; RV32I-NEXT: PseudoRET implicit $v8m8376 ;377 ; RV64I-LABEL: name: anyext_nxv8i64_nxv8i8378 ; RV64I: liveins: $v8379 ; RV64I-NEXT: {{ $}}380 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8381 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF382 ; RV64I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF8_M8 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */383 ; RV64I-NEXT: $v8m8 = COPY %1384 ; RV64I-NEXT: PseudoRET implicit $v8m8385 %0:vrb(<vscale x 8 x s8>) = COPY $v8386 %1:vrb(<vscale x 8 x s64>) = G_ANYEXT %0(<vscale x 8 x s8>)387 $v8m8 = COPY %1(<vscale x 8 x s64>)388 PseudoRET implicit $v8m8389 390...391---392name: anyext_nxv16i16_nxv16i8393legalized: true394regBankSelected: true395tracksRegLiveness: true396body: |397 bb.0.entry:398 liveins: $v8m2399 400 ; RV32I-LABEL: name: anyext_nxv16i16_nxv16i8401 ; RV32I: liveins: $v8m2402 ; RV32I-NEXT: {{ $}}403 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vrm2 = COPY $v8m2404 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF405 ; RV32I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF2_M4 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */406 ; RV32I-NEXT: $v8m4 = COPY %1407 ; RV32I-NEXT: PseudoRET implicit $v8m4408 ;409 ; RV64I-LABEL: name: anyext_nxv16i16_nxv16i8410 ; RV64I: liveins: $v8m2411 ; RV64I-NEXT: {{ $}}412 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vrm2 = COPY $v8m2413 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF414 ; RV64I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF2_M4 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */415 ; RV64I-NEXT: $v8m4 = COPY %1416 ; RV64I-NEXT: PseudoRET implicit $v8m4417 %0:vrb(<vscale x 16 x s8>) = COPY $v8m2418 %1:vrb(<vscale x 16 x s16>) = G_ANYEXT %0(<vscale x 16 x s8>)419 $v8m4 = COPY %1(<vscale x 16 x s16>)420 PseudoRET implicit $v8m4421 422...423---424name: anyext_nxv16i32_nxv16i8425legalized: true426regBankSelected: true427tracksRegLiveness: true428body: |429 bb.0.entry:430 liveins: $v8m2431 432 ; RV32I-LABEL: name: anyext_nxv16i32_nxv16i8433 ; RV32I: liveins: $v8m2434 ; RV32I-NEXT: {{ $}}435 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vrm2 = COPY $v8m2436 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF437 ; RV32I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF4_M8 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */438 ; RV32I-NEXT: $v8m8 = COPY %1439 ; RV32I-NEXT: PseudoRET implicit $v8m8440 ;441 ; RV64I-LABEL: name: anyext_nxv16i32_nxv16i8442 ; RV64I: liveins: $v8m2443 ; RV64I-NEXT: {{ $}}444 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vrm2 = COPY $v8m2445 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF446 ; RV64I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF4_M8 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */447 ; RV64I-NEXT: $v8m8 = COPY %1448 ; RV64I-NEXT: PseudoRET implicit $v8m8449 %0:vrb(<vscale x 16 x s8>) = COPY $v8m2450 %1:vrb(<vscale x 16 x s32>) = G_ANYEXT %0(<vscale x 16 x s8>)451 $v8m8 = COPY %1(<vscale x 16 x s32>)452 PseudoRET implicit $v8m8453 454...455---456name: anyext_nxv32i16_nxv32i8457legalized: true458regBankSelected: true459tracksRegLiveness: true460body: |461 bb.0.entry:462 liveins: $v8m4463 464 ; RV32I-LABEL: name: anyext_nxv32i16_nxv32i8465 ; RV32I: liveins: $v8m4466 ; RV32I-NEXT: {{ $}}467 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vrm4 = COPY $v8m4468 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF469 ; RV32I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF2_M8 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */470 ; RV32I-NEXT: $v8m8 = COPY %1471 ; RV32I-NEXT: PseudoRET implicit $v8m8472 ;473 ; RV64I-LABEL: name: anyext_nxv32i16_nxv32i8474 ; RV64I: liveins: $v8m4475 ; RV64I-NEXT: {{ $}}476 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vrm4 = COPY $v8m4477 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF478 ; RV64I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF2_M8 [[DEF]], [[COPY]], -1, 4 /* e16 */, 3 /* ta, ma */479 ; RV64I-NEXT: $v8m8 = COPY %1480 ; RV64I-NEXT: PseudoRET implicit $v8m8481 %0:vrb(<vscale x 32 x s8>) = COPY $v8m4482 %1:vrb(<vscale x 32 x s16>) = G_ANYEXT %0(<vscale x 32 x s8>)483 $v8m8 = COPY %1(<vscale x 32 x s16>)484 PseudoRET implicit $v8m8485 486...487---488name: anyext_nxv1i32_nxv1i16489legalized: true490regBankSelected: true491tracksRegLiveness: true492body: |493 bb.0.entry:494 liveins: $v8495 496 ; RV32I-LABEL: name: anyext_nxv1i32_nxv1i16497 ; RV32I: liveins: $v8498 ; RV32I-NEXT: {{ $}}499 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8500 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF501 ; RV32I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_MF2 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */502 ; RV32I-NEXT: $v8 = COPY %1503 ; RV32I-NEXT: PseudoRET implicit $v8504 ;505 ; RV64I-LABEL: name: anyext_nxv1i32_nxv1i16506 ; RV64I: liveins: $v8507 ; RV64I-NEXT: {{ $}}508 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8509 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF510 ; RV64I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_MF2 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */511 ; RV64I-NEXT: $v8 = COPY %1512 ; RV64I-NEXT: PseudoRET implicit $v8513 %0:vrb(<vscale x 1 x s16>) = COPY $v8514 %1:vrb(<vscale x 1 x s32>) = G_ANYEXT %0(<vscale x 1 x s16>)515 $v8 = COPY %1(<vscale x 1 x s32>)516 PseudoRET implicit $v8517 518...519---520name: anyext_nxv1i64_nxv1i16521legalized: true522regBankSelected: true523tracksRegLiveness: true524body: |525 bb.0.entry:526 liveins: $v8527 528 ; RV32I-LABEL: name: anyext_nxv1i64_nxv1i16529 ; RV32I: liveins: $v8530 ; RV32I-NEXT: {{ $}}531 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8532 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF533 ; RV32I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF4_M1 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */534 ; RV32I-NEXT: $v8 = COPY %1535 ; RV32I-NEXT: PseudoRET implicit $v8536 ;537 ; RV64I-LABEL: name: anyext_nxv1i64_nxv1i16538 ; RV64I: liveins: $v8539 ; RV64I-NEXT: {{ $}}540 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8541 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF542 ; RV64I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF4_M1 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */543 ; RV64I-NEXT: $v8 = COPY %1544 ; RV64I-NEXT: PseudoRET implicit $v8545 %0:vrb(<vscale x 1 x s16>) = COPY $v8546 %1:vrb(<vscale x 1 x s64>) = G_ANYEXT %0(<vscale x 1 x s16>)547 $v8 = COPY %1(<vscale x 1 x s64>)548 PseudoRET implicit $v8549 550...551---552name: anyext_nxv2i32_nxv2i16553legalized: true554regBankSelected: true555tracksRegLiveness: true556body: |557 bb.0.entry:558 liveins: $v8559 560 ; RV32I-LABEL: name: anyext_nxv2i32_nxv2i16561 ; RV32I: liveins: $v8562 ; RV32I-NEXT: {{ $}}563 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8564 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF565 ; RV32I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_M1 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */566 ; RV32I-NEXT: $v8 = COPY %1567 ; RV32I-NEXT: PseudoRET implicit $v8568 ;569 ; RV64I-LABEL: name: anyext_nxv2i32_nxv2i16570 ; RV64I: liveins: $v8571 ; RV64I-NEXT: {{ $}}572 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8573 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF574 ; RV64I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_M1 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */575 ; RV64I-NEXT: $v8 = COPY %1576 ; RV64I-NEXT: PseudoRET implicit $v8577 %0:vrb(<vscale x 2 x s16>) = COPY $v8578 %1:vrb(<vscale x 2 x s32>) = G_ANYEXT %0(<vscale x 2 x s16>)579 $v8 = COPY %1(<vscale x 2 x s32>)580 PseudoRET implicit $v8581 582...583---584name: anyext_nxv2i64_nxv2i16585legalized: true586regBankSelected: true587tracksRegLiveness: true588body: |589 bb.0.entry:590 liveins: $v8591 592 ; RV32I-LABEL: name: anyext_nxv2i64_nxv2i16593 ; RV32I: liveins: $v8594 ; RV32I-NEXT: {{ $}}595 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8596 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF597 ; RV32I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF4_M2 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */598 ; RV32I-NEXT: $v8m2 = COPY %1599 ; RV32I-NEXT: PseudoRET implicit $v8m2600 ;601 ; RV64I-LABEL: name: anyext_nxv2i64_nxv2i16602 ; RV64I: liveins: $v8603 ; RV64I-NEXT: {{ $}}604 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8605 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF606 ; RV64I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF4_M2 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */607 ; RV64I-NEXT: $v8m2 = COPY %1608 ; RV64I-NEXT: PseudoRET implicit $v8m2609 %0:vrb(<vscale x 2 x s16>) = COPY $v8610 %1:vrb(<vscale x 2 x s64>) = G_ANYEXT %0(<vscale x 2 x s16>)611 $v8m2 = COPY %1(<vscale x 2 x s64>)612 PseudoRET implicit $v8m2613 614...615---616name: anyext_nxv4i32_nxv4i16617legalized: true618regBankSelected: true619tracksRegLiveness: true620body: |621 bb.0.entry:622 liveins: $v8623 624 ; RV32I-LABEL: name: anyext_nxv4i32_nxv4i16625 ; RV32I: liveins: $v8626 ; RV32I-NEXT: {{ $}}627 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8628 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF629 ; RV32I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF2_M2 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */630 ; RV32I-NEXT: $v8m2 = COPY %1631 ; RV32I-NEXT: PseudoRET implicit $v8m2632 ;633 ; RV64I-LABEL: name: anyext_nxv4i32_nxv4i16634 ; RV64I: liveins: $v8635 ; RV64I-NEXT: {{ $}}636 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8637 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF638 ; RV64I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF2_M2 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */639 ; RV64I-NEXT: $v8m2 = COPY %1640 ; RV64I-NEXT: PseudoRET implicit $v8m2641 %0:vrb(<vscale x 4 x s16>) = COPY $v8642 %1:vrb(<vscale x 4 x s32>) = G_ANYEXT %0(<vscale x 4 x s16>)643 $v8m2 = COPY %1(<vscale x 4 x s32>)644 PseudoRET implicit $v8m2645 646...647---648name: anyext_nxv4i64_nxv4i16649legalized: true650regBankSelected: true651tracksRegLiveness: true652body: |653 bb.0.entry:654 liveins: $v8655 656 ; RV32I-LABEL: name: anyext_nxv4i64_nxv4i16657 ; RV32I: liveins: $v8658 ; RV32I-NEXT: {{ $}}659 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8660 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF661 ; RV32I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF4_M4 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */662 ; RV32I-NEXT: $v8m4 = COPY %1663 ; RV32I-NEXT: PseudoRET implicit $v8m4664 ;665 ; RV64I-LABEL: name: anyext_nxv4i64_nxv4i16666 ; RV64I: liveins: $v8667 ; RV64I-NEXT: {{ $}}668 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8669 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF670 ; RV64I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF4_M4 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */671 ; RV64I-NEXT: $v8m4 = COPY %1672 ; RV64I-NEXT: PseudoRET implicit $v8m4673 %0:vrb(<vscale x 4 x s16>) = COPY $v8674 %1:vrb(<vscale x 4 x s64>) = G_ANYEXT %0(<vscale x 4 x s16>)675 $v8m4 = COPY %1(<vscale x 4 x s64>)676 PseudoRET implicit $v8m4677 678...679---680name: anyext_nxv8i32_nxv8i16681legalized: true682regBankSelected: true683tracksRegLiveness: true684body: |685 bb.0.entry:686 liveins: $v8m2687 688 ; RV32I-LABEL: name: anyext_nxv8i32_nxv8i16689 ; RV32I: liveins: $v8m2690 ; RV32I-NEXT: {{ $}}691 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vrm2 = COPY $v8m2692 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF693 ; RV32I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF2_M4 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */694 ; RV32I-NEXT: $v8m4 = COPY %1695 ; RV32I-NEXT: PseudoRET implicit $v8m4696 ;697 ; RV64I-LABEL: name: anyext_nxv8i32_nxv8i16698 ; RV64I: liveins: $v8m2699 ; RV64I-NEXT: {{ $}}700 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vrm2 = COPY $v8m2701 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF702 ; RV64I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF2_M4 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */703 ; RV64I-NEXT: $v8m4 = COPY %1704 ; RV64I-NEXT: PseudoRET implicit $v8m4705 %0:vrb(<vscale x 8 x s16>) = COPY $v8m2706 %1:vrb(<vscale x 8 x s32>) = G_ANYEXT %0(<vscale x 8 x s16>)707 $v8m4 = COPY %1(<vscale x 8 x s32>)708 PseudoRET implicit $v8m4709 710...711---712name: anyext_nxv8i64_nxv8i16713legalized: true714regBankSelected: true715tracksRegLiveness: true716body: |717 bb.0.entry:718 liveins: $v8m2719 720 ; RV32I-LABEL: name: anyext_nxv8i64_nxv8i16721 ; RV32I: liveins: $v8m2722 ; RV32I-NEXT: {{ $}}723 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vrm2 = COPY $v8m2724 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF725 ; RV32I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF4_M8 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */726 ; RV32I-NEXT: $v8m8 = COPY %1727 ; RV32I-NEXT: PseudoRET implicit $v8m8728 ;729 ; RV64I-LABEL: name: anyext_nxv8i64_nxv8i16730 ; RV64I: liveins: $v8m2731 ; RV64I-NEXT: {{ $}}732 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vrm2 = COPY $v8m2733 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF734 ; RV64I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF4_M8 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */735 ; RV64I-NEXT: $v8m8 = COPY %1736 ; RV64I-NEXT: PseudoRET implicit $v8m8737 %0:vrb(<vscale x 8 x s16>) = COPY $v8m2738 %1:vrb(<vscale x 8 x s64>) = G_ANYEXT %0(<vscale x 8 x s16>)739 $v8m8 = COPY %1(<vscale x 8 x s64>)740 PseudoRET implicit $v8m8741 742...743---744name: anyext_nxv16i32_nxv16i16745legalized: true746regBankSelected: true747tracksRegLiveness: true748body: |749 bb.0.entry:750 liveins: $v8m4751 752 ; RV32I-LABEL: name: anyext_nxv16i32_nxv16i16753 ; RV32I: liveins: $v8m4754 ; RV32I-NEXT: {{ $}}755 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vrm4 = COPY $v8m4756 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF757 ; RV32I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF2_M8 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */758 ; RV32I-NEXT: $v8m8 = COPY %1759 ; RV32I-NEXT: PseudoRET implicit $v8m8760 ;761 ; RV64I-LABEL: name: anyext_nxv16i32_nxv16i16762 ; RV64I: liveins: $v8m4763 ; RV64I-NEXT: {{ $}}764 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vrm4 = COPY $v8m4765 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF766 ; RV64I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF2_M8 [[DEF]], [[COPY]], -1, 5 /* e32 */, 3 /* ta, ma */767 ; RV64I-NEXT: $v8m8 = COPY %1768 ; RV64I-NEXT: PseudoRET implicit $v8m8769 %0:vrb(<vscale x 16 x s16>) = COPY $v8m4770 %1:vrb(<vscale x 16 x s32>) = G_ANYEXT %0(<vscale x 16 x s16>)771 $v8m8 = COPY %1(<vscale x 16 x s32>)772 PseudoRET implicit $v8m8773 774...775---776name: anyext_nxv1i64_nxv1i32777legalized: true778regBankSelected: true779tracksRegLiveness: true780body: |781 bb.0.entry:782 liveins: $v8783 784 ; RV32I-LABEL: name: anyext_nxv1i64_nxv1i32785 ; RV32I: liveins: $v8786 ; RV32I-NEXT: {{ $}}787 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8788 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF789 ; RV32I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_M1 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */790 ; RV32I-NEXT: $v8 = COPY %1791 ; RV32I-NEXT: PseudoRET implicit $v8792 ;793 ; RV64I-LABEL: name: anyext_nxv1i64_nxv1i32794 ; RV64I: liveins: $v8795 ; RV64I-NEXT: {{ $}}796 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8797 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF798 ; RV64I-NEXT: early-clobber %1:vr = PseudoVZEXT_VF2_M1 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */799 ; RV64I-NEXT: $v8 = COPY %1800 ; RV64I-NEXT: PseudoRET implicit $v8801 %0:vrb(<vscale x 1 x s32>) = COPY $v8802 %1:vrb(<vscale x 1 x s64>) = G_ANYEXT %0(<vscale x 1 x s32>)803 $v8 = COPY %1(<vscale x 1 x s64>)804 PseudoRET implicit $v8805 806...807---808name: anyext_nxv2i64_nxv2i32809legalized: true810regBankSelected: true811tracksRegLiveness: true812body: |813 bb.0.entry:814 liveins: $v8815 816 ; RV32I-LABEL: name: anyext_nxv2i64_nxv2i32817 ; RV32I: liveins: $v8818 ; RV32I-NEXT: {{ $}}819 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8820 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF821 ; RV32I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF2_M2 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */822 ; RV32I-NEXT: $v8m2 = COPY %1823 ; RV32I-NEXT: PseudoRET implicit $v8m2824 ;825 ; RV64I-LABEL: name: anyext_nxv2i64_nxv2i32826 ; RV64I: liveins: $v8827 ; RV64I-NEXT: {{ $}}828 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vr = COPY $v8829 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm2 = IMPLICIT_DEF830 ; RV64I-NEXT: early-clobber %1:vrm2 = PseudoVZEXT_VF2_M2 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */831 ; RV64I-NEXT: $v8m2 = COPY %1832 ; RV64I-NEXT: PseudoRET implicit $v8m2833 %0:vrb(<vscale x 2 x s32>) = COPY $v8834 %1:vrb(<vscale x 2 x s64>) = G_ANYEXT %0(<vscale x 2 x s32>)835 $v8m2 = COPY %1(<vscale x 2 x s64>)836 PseudoRET implicit $v8m2837 838...839---840name: anyext_nxv4i64_nxv4i32841legalized: true842regBankSelected: true843tracksRegLiveness: true844body: |845 bb.0.entry:846 liveins: $v8m2847 848 ; RV32I-LABEL: name: anyext_nxv4i64_nxv4i32849 ; RV32I: liveins: $v8m2850 ; RV32I-NEXT: {{ $}}851 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vrm2 = COPY $v8m2852 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF853 ; RV32I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF2_M4 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */854 ; RV32I-NEXT: $v8m4 = COPY %1855 ; RV32I-NEXT: PseudoRET implicit $v8m4856 ;857 ; RV64I-LABEL: name: anyext_nxv4i64_nxv4i32858 ; RV64I: liveins: $v8m2859 ; RV64I-NEXT: {{ $}}860 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vrm2 = COPY $v8m2861 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm4 = IMPLICIT_DEF862 ; RV64I-NEXT: early-clobber %1:vrm4 = PseudoVZEXT_VF2_M4 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */863 ; RV64I-NEXT: $v8m4 = COPY %1864 ; RV64I-NEXT: PseudoRET implicit $v8m4865 %0:vrb(<vscale x 4 x s32>) = COPY $v8m2866 %1:vrb(<vscale x 4 x s64>) = G_ANYEXT %0(<vscale x 4 x s32>)867 $v8m4 = COPY %1(<vscale x 4 x s64>)868 PseudoRET implicit $v8m4869 870...871---872name: anyext_nxv8i64_nxv8i32873legalized: true874regBankSelected: true875tracksRegLiveness: true876body: |877 bb.0.entry:878 liveins: $v8m4879 880 ; RV32I-LABEL: name: anyext_nxv8i64_nxv8i32881 ; RV32I: liveins: $v8m4882 ; RV32I-NEXT: {{ $}}883 ; RV32I-NEXT: [[COPY:%[0-9]+]]:vrm4 = COPY $v8m4884 ; RV32I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF885 ; RV32I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF2_M8 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */886 ; RV32I-NEXT: $v8m8 = COPY %1887 ; RV32I-NEXT: PseudoRET implicit $v8m8888 ;889 ; RV64I-LABEL: name: anyext_nxv8i64_nxv8i32890 ; RV64I: liveins: $v8m4891 ; RV64I-NEXT: {{ $}}892 ; RV64I-NEXT: [[COPY:%[0-9]+]]:vrm4 = COPY $v8m4893 ; RV64I-NEXT: [[DEF:%[0-9]+]]:vrm8 = IMPLICIT_DEF894 ; RV64I-NEXT: early-clobber %1:vrm8 = PseudoVZEXT_VF2_M8 [[DEF]], [[COPY]], -1, 6 /* e64 */, 3 /* ta, ma */895 ; RV64I-NEXT: $v8m8 = COPY %1896 ; RV64I-NEXT: PseudoRET implicit $v8m8897 %0:vrb(<vscale x 8 x s32>) = COPY $v8m4898 %1:vrb(<vscale x 8 x s64>) = G_ANYEXT %0(<vscale x 8 x s32>)899 $v8m8 = COPY %1(<vscale x 8 x s64>)900 PseudoRET implicit $v8m8901 902...903