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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2; RUN: llc -mtriple=riscv32 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32I %s4; RUN: llc -mtriple=riscv64 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefix=RV64I %s6 7define void @test_args_i8(i8 %a) {8 9 ; RV32I-LABEL: name: test_args_i810 ; RV32I: bb.1.entry:11 ; RV32I-NEXT: liveins: $x1012 ; RV32I-NEXT: {{ $}}13 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x1014 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)15 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 116 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[C]]17 ; RV32I-NEXT: PseudoRET18 ; RV64I-LABEL: name: test_args_i819 ; RV64I: bb.1.entry:20 ; RV64I-NEXT: liveins: $x1021 ; RV64I-NEXT: {{ $}}22 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1023 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s64)24 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 125 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[C]]26 ; RV64I-NEXT: PseudoRET27entry:28 %0 = add i8 %a, 129 ret void30}31 32define void @test_args_i16(i16 %a) {33 34 ; RV32I-LABEL: name: test_args_i1635 ; RV32I: bb.1.entry:36 ; RV32I-NEXT: liveins: $x1037 ; RV32I-NEXT: {{ $}}38 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x1039 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)40 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 141 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s16) = G_ADD [[TRUNC]], [[C]]42 ; RV32I-NEXT: PseudoRET43 ; RV64I-LABEL: name: test_args_i1644 ; RV64I: bb.1.entry:45 ; RV64I-NEXT: liveins: $x1046 ; RV64I-NEXT: {{ $}}47 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1048 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)49 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 150 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s16) = G_ADD [[TRUNC]], [[C]]51 ; RV64I-NEXT: PseudoRET52entry:53 %0 = add i16 %a, 154 ret void55}56 57define void @test_args_i32(i32 %a) {58 59 ; RV32I-LABEL: name: test_args_i3260 ; RV32I: bb.1.entry:61 ; RV32I-NEXT: liveins: $x1062 ; RV32I-NEXT: {{ $}}63 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x1064 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 165 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C]]66 ; RV32I-NEXT: PseudoRET67 ; RV64I-LABEL: name: test_args_i3268 ; RV64I: bb.1.entry:69 ; RV64I-NEXT: liveins: $x1070 ; RV64I-NEXT: {{ $}}71 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1072 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)73 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 174 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[C]]75 ; RV64I-NEXT: PseudoRET76entry:77 %0 = add i32 %a, 178 ret void79}80 81define void @test_args_i64(i64 %a) {82 83 ; RV32I-LABEL: name: test_args_i6484 ; RV32I: bb.1.entry:85 ; RV32I-NEXT: liveins: $x10, $x1186 ; RV32I-NEXT: {{ $}}87 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x1088 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x1189 ; RV32I-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)90 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 191 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[MV]], [[C]]92 ; RV32I-NEXT: PseudoRET93 ; RV64I-LABEL: name: test_args_i6494 ; RV64I: bb.1.entry:95 ; RV64I-NEXT: liveins: $x1096 ; RV64I-NEXT: {{ $}}97 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1098 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 199 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[C]]100 ; RV64I-NEXT: PseudoRET101entry:102 %0 = add i64 %a, 1103 ret void104}105 106define void @test_args_i8_ptr(ptr %a) {107 108 ; RV32I-LABEL: name: test_args_i8_ptr109 ; RV32I: bb.1.entry:110 ; RV32I-NEXT: liveins: $x10111 ; RV32I-NEXT: {{ $}}112 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10113 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (load (s8) from %ir.a)114 ; RV32I-NEXT: PseudoRET115 ; RV64I-LABEL: name: test_args_i8_ptr116 ; RV64I: bb.1.entry:117 ; RV64I-NEXT: liveins: $x10118 ; RV64I-NEXT: {{ $}}119 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10120 ; RV64I-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (load (s8) from %ir.a)121 ; RV64I-NEXT: PseudoRET122entry:123 %0 = load i8, ptr %a124 ret void125}126 127define void @test_args_2xi8(i8 %a, i8 %b) {128 129 ; RV32I-LABEL: name: test_args_2xi8130 ; RV32I: bb.1.entry:131 ; RV32I-NEXT: liveins: $x10, $x11132 ; RV32I-NEXT: {{ $}}133 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10134 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)135 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11136 ; RV32I-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)137 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]]138 ; RV32I-NEXT: PseudoRET139 ; RV64I-LABEL: name: test_args_2xi8140 ; RV64I: bb.1.entry:141 ; RV64I-NEXT: liveins: $x10, $x11142 ; RV64I-NEXT: {{ $}}143 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10144 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s64)145 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11146 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s64)147 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s8) = G_ADD [[TRUNC]], [[TRUNC1]]148 ; RV64I-NEXT: PseudoRET149entry:150 %0 = add i8 %a, %b151 ret void152}153 154define void @test_args_2xi16(i16 %a, i16 %b) {155 156 ; RV32I-LABEL: name: test_args_2xi16157 ; RV32I: bb.1.entry:158 ; RV32I-NEXT: liveins: $x10, $x11159 ; RV32I-NEXT: {{ $}}160 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10161 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)162 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11163 ; RV32I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)164 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s16) = G_ADD [[TRUNC]], [[TRUNC1]]165 ; RV32I-NEXT: PseudoRET166 ; RV64I-LABEL: name: test_args_2xi16167 ; RV64I: bb.1.entry:168 ; RV64I-NEXT: liveins: $x10, $x11169 ; RV64I-NEXT: {{ $}}170 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10171 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)172 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11173 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s64)174 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s16) = G_ADD [[TRUNC]], [[TRUNC1]]175 ; RV64I-NEXT: PseudoRET176entry:177 %0 = add i16 %a, %b178 ret void179}180 181define void @test_args_2xi32(i32 %a, i32 %b) {182 183 ; RV32I-LABEL: name: test_args_2xi32184 ; RV32I: bb.1.entry:185 ; RV32I-NEXT: liveins: $x10, $x11186 ; RV32I-NEXT: {{ $}}187 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10188 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11189 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]190 ; RV32I-NEXT: PseudoRET191 ; RV64I-LABEL: name: test_args_2xi32192 ; RV64I: bb.1.entry:193 ; RV64I-NEXT: liveins: $x10, $x11194 ; RV64I-NEXT: {{ $}}195 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10196 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)197 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11198 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)199 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[TRUNC1]]200 ; RV64I-NEXT: PseudoRET201entry:202 %0 = add i32 %a, %b203 ret void204}205 206define void @test_args_2xi64(i64 %a, i64 %b) {207 208 ; RV32I-LABEL: name: test_args_2xi64209 ; RV32I: bb.1.entry:210 ; RV32I-NEXT: liveins: $x10, $x11, $x12, $x13211 ; RV32I-NEXT: {{ $}}212 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10213 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11214 ; RV32I-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)215 ; RV32I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12216 ; RV32I-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13217 ; RV32I-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)218 ; RV32I-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[MV]], [[MV1]]219 ; RV32I-NEXT: PseudoRET220 ; RV64I-LABEL: name: test_args_2xi64221 ; RV64I: bb.1.entry:222 ; RV64I-NEXT: liveins: $x10, $x11223 ; RV64I-NEXT: {{ $}}224 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10225 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11226 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]227 ; RV64I-NEXT: PseudoRET228entry:229 %0 = add i64 %a, %b230 ret void231}232 233define void @test_args_2xi8_ptr(ptr %a, ptr %b) {234 235 ; RV32I-LABEL: name: test_args_2xi8_ptr236 ; RV32I: bb.1.entry:237 ; RV32I-NEXT: liveins: $x10, $x11238 ; RV32I-NEXT: {{ $}}239 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10240 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11241 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (load (s8) from %ir.a)242 ; RV32I-NEXT: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[COPY1]](p0) :: (load (s8) from %ir.b)243 ; RV32I-NEXT: PseudoRET244 ; RV64I-LABEL: name: test_args_2xi8_ptr245 ; RV64I: bb.1.entry:246 ; RV64I-NEXT: liveins: $x10, $x11247 ; RV64I-NEXT: {{ $}}248 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10249 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x11250 ; RV64I-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (load (s8) from %ir.a)251 ; RV64I-NEXT: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[COPY1]](p0) :: (load (s8) from %ir.b)252 ; RV64I-NEXT: PseudoRET253entry:254 %0 = load i8, ptr %a255 %1 = load i8, ptr %b256 ret void257}258 259define void @test_args_ptr_byval(ptr byval(i8) %a) {260 ; RV32I-LABEL: name: test_args_ptr_byval261 ; RV32I: bb.1.entry:262 ; RV32I-NEXT: liveins: $x10263 ; RV32I-NEXT: {{ $}}264 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10265 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (dereferenceable load (s8) from %ir.a)266 ; RV32I-NEXT: PseudoRET267 ; RV64I-LABEL: name: test_args_ptr_byval268 ; RV64I: bb.1.entry:269 ; RV64I-NEXT: liveins: $x10270 ; RV64I-NEXT: {{ $}}271 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10272 ; RV64I-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (dereferenceable load (s8) from %ir.a)273 ; RV64I-NEXT: PseudoRET274entry:275 %0 = load i8, ptr %a276 ret void277}278 279define void @test_args_ptr_sret(ptr sret(i8) %a) {280 ; RV32I-LABEL: name: test_args_ptr_sret281 ; RV32I: bb.1.entry:282 ; RV32I-NEXT: liveins: $x10283 ; RV32I-NEXT: {{ $}}284 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10285 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (dereferenceable load (s8) from %ir.a)286 ; RV32I-NEXT: PseudoRET287 ; RV64I-LABEL: name: test_args_ptr_sret288 ; RV64I: bb.1.entry:289 ; RV64I-NEXT: liveins: $x10290 ; RV64I-NEXT: {{ $}}291 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10292 ; RV64I-NEXT: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[COPY]](p0) :: (dereferenceable load (s8) from %ir.a)293 ; RV64I-NEXT: PseudoRET294entry:295 %0 = load i8, ptr %a296 ret void297}298