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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32I %s4; RUN: llc -mtriple=riscv32 -mattr=+f -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefix=RV32IF %s6; RUN: llc -mtriple=riscv32 -mattr=+zfh -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \7; RUN: | FileCheck -check-prefix=RV32IZFH %s8; RUN: llc -mtriple=riscv64 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \9; RUN: | FileCheck -check-prefix=RV64I %s10; RUN: llc -mtriple=riscv64 -mattr=+f -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \11; RUN: | FileCheck -check-prefix=RV64IF %s12; RUN: llc -mtriple=riscv64 -mattr=+zfh -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \13; RUN: | FileCheck -check-prefix=RV64IZFH %s14 15define half @callee_half_in_regs(half %x) nounwind {16 ; RV32I-LABEL: name: callee_half_in_regs17 ; RV32I: bb.1 (%ir-block.0):18 ; RV32I-NEXT: liveins: $x1019 ; RV32I-NEXT: {{ $}}20 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x1021 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)22 ; RV32I-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)23 ; RV32I-NEXT: $x10 = COPY [[ANYEXT]](s32)24 ; RV32I-NEXT: PseudoRET implicit $x1025 ;26 ; RV32IF-LABEL: name: callee_half_in_regs27 ; RV32IF: bb.1 (%ir-block.0):28 ; RV32IF-NEXT: liveins: $f10_f29 ; RV32IF-NEXT: {{ $}}30 ; RV32IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f31 ; RV32IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)32 ; RV32IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)33 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)34 ; RV32IF-NEXT: PseudoRET implicit $f10_f35 ;36 ; RV32IZFH-LABEL: name: callee_half_in_regs37 ; RV32IZFH: bb.1 (%ir-block.0):38 ; RV32IZFH-NEXT: liveins: $f10_h39 ; RV32IZFH-NEXT: {{ $}}40 ; RV32IZFH-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h41 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY]](s16)42 ; RV32IZFH-NEXT: PseudoRET implicit $f10_h43 ;44 ; RV64I-LABEL: name: callee_half_in_regs45 ; RV64I: bb.1 (%ir-block.0):46 ; RV64I-NEXT: liveins: $x1047 ; RV64I-NEXT: {{ $}}48 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1049 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)50 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s16)51 ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)52 ; RV64I-NEXT: PseudoRET implicit $x1053 ;54 ; RV64IF-LABEL: name: callee_half_in_regs55 ; RV64IF: bb.1 (%ir-block.0):56 ; RV64IF-NEXT: liveins: $f10_f57 ; RV64IF-NEXT: {{ $}}58 ; RV64IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f59 ; RV64IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)60 ; RV64IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)61 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)62 ; RV64IF-NEXT: PseudoRET implicit $f10_f63 ;64 ; RV64IZFH-LABEL: name: callee_half_in_regs65 ; RV64IZFH: bb.1 (%ir-block.0):66 ; RV64IZFH-NEXT: liveins: $f10_h67 ; RV64IZFH-NEXT: {{ $}}68 ; RV64IZFH-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h69 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY]](s16)70 ; RV64IZFH-NEXT: PseudoRET implicit $f10_h71 ret half %x72}73 74define half @caller_half_in_regs(half %x) nounwind {75 ; RV32I-LABEL: name: caller_half_in_regs76 ; RV32I: bb.1 (%ir-block.0):77 ; RV32I-NEXT: liveins: $x1078 ; RV32I-NEXT: {{ $}}79 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x1080 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)81 ; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x282 ; RV32I-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)83 ; RV32I-NEXT: $x10 = COPY [[ANYEXT]](s32)84 ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @caller_half_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit-def $x1085 ; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x286 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x1087 ; RV32I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)88 ; RV32I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)89 ; RV32I-NEXT: $x10 = COPY [[ANYEXT1]](s32)90 ; RV32I-NEXT: PseudoRET implicit $x1091 ;92 ; RV32IF-LABEL: name: caller_half_in_regs93 ; RV32IF: bb.1 (%ir-block.0):94 ; RV32IF-NEXT: liveins: $f10_f95 ; RV32IF-NEXT: {{ $}}96 ; RV32IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f97 ; RV32IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)98 ; RV32IF-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x299 ; RV32IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)100 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)101 ; RV32IF-NEXT: PseudoCALL target-flags(riscv-call) @caller_half_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $f10_f, implicit-def $f10_f102 ; RV32IF-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2103 ; RV32IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f10_f104 ; RV32IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)105 ; RV32IF-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)106 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT1]](s32)107 ; RV32IF-NEXT: PseudoRET implicit $f10_f108 ;109 ; RV32IZFH-LABEL: name: caller_half_in_regs110 ; RV32IZFH: bb.1 (%ir-block.0):111 ; RV32IZFH-NEXT: liveins: $f10_h112 ; RV32IZFH-NEXT: {{ $}}113 ; RV32IZFH-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h114 ; RV32IZFH-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2115 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY]](s16)116 ; RV32IZFH-NEXT: PseudoCALL target-flags(riscv-call) @caller_half_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $f10_h, implicit-def $f10_h117 ; RV32IZFH-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2118 ; RV32IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $f10_h119 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY1]](s16)120 ; RV32IZFH-NEXT: PseudoRET implicit $f10_h121 ;122 ; RV64I-LABEL: name: caller_half_in_regs123 ; RV64I: bb.1 (%ir-block.0):124 ; RV64I-NEXT: liveins: $x10125 ; RV64I-NEXT: {{ $}}126 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10127 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)128 ; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2129 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s16)130 ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)131 ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @caller_half_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit-def $x10132 ; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2133 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10134 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s64)135 ; RV64I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC1]](s16)136 ; RV64I-NEXT: $x10 = COPY [[ANYEXT1]](s64)137 ; RV64I-NEXT: PseudoRET implicit $x10138 ;139 ; RV64IF-LABEL: name: caller_half_in_regs140 ; RV64IF: bb.1 (%ir-block.0):141 ; RV64IF-NEXT: liveins: $f10_f142 ; RV64IF-NEXT: {{ $}}143 ; RV64IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f144 ; RV64IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)145 ; RV64IF-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2146 ; RV64IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)147 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)148 ; RV64IF-NEXT: PseudoCALL target-flags(riscv-call) @caller_half_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $f10_f, implicit-def $f10_f149 ; RV64IF-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2150 ; RV64IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f10_f151 ; RV64IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)152 ; RV64IF-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)153 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT1]](s32)154 ; RV64IF-NEXT: PseudoRET implicit $f10_f155 ;156 ; RV64IZFH-LABEL: name: caller_half_in_regs157 ; RV64IZFH: bb.1 (%ir-block.0):158 ; RV64IZFH-NEXT: liveins: $f10_h159 ; RV64IZFH-NEXT: {{ $}}160 ; RV64IZFH-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h161 ; RV64IZFH-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2162 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY]](s16)163 ; RV64IZFH-NEXT: PseudoCALL target-flags(riscv-call) @caller_half_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $f10_h, implicit-def $f10_h164 ; RV64IZFH-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2165 ; RV64IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $f10_h166 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY1]](s16)167 ; RV64IZFH-NEXT: PseudoRET implicit $f10_h168 %y = call half @caller_half_in_regs(half %x)169 ret half %y170}171 172define half @callee_half_mixed_with_int(i32 %x0, half %x) nounwind {173 ; RV32I-LABEL: name: callee_half_mixed_with_int174 ; RV32I: bb.1 (%ir-block.0):175 ; RV32I-NEXT: liveins: $x10, $x11176 ; RV32I-NEXT: {{ $}}177 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10178 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11179 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)180 ; RV32I-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)181 ; RV32I-NEXT: $x10 = COPY [[ANYEXT]](s32)182 ; RV32I-NEXT: PseudoRET implicit $x10183 ;184 ; RV32IF-LABEL: name: callee_half_mixed_with_int185 ; RV32IF: bb.1 (%ir-block.0):186 ; RV32IF-NEXT: liveins: $x10, $f10_f187 ; RV32IF-NEXT: {{ $}}188 ; RV32IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10189 ; RV32IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f10_f190 ; RV32IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)191 ; RV32IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)192 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)193 ; RV32IF-NEXT: PseudoRET implicit $f10_f194 ;195 ; RV32IZFH-LABEL: name: callee_half_mixed_with_int196 ; RV32IZFH: bb.1 (%ir-block.0):197 ; RV32IZFH-NEXT: liveins: $x10, $f10_h198 ; RV32IZFH-NEXT: {{ $}}199 ; RV32IZFH-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10200 ; RV32IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $f10_h201 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY1]](s16)202 ; RV32IZFH-NEXT: PseudoRET implicit $f10_h203 ;204 ; RV64I-LABEL: name: callee_half_mixed_with_int205 ; RV64I: bb.1 (%ir-block.0):206 ; RV64I-NEXT: liveins: $x10, $x11207 ; RV64I-NEXT: {{ $}}208 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10209 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)210 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11211 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s64)212 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC1]](s16)213 ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)214 ; RV64I-NEXT: PseudoRET implicit $x10215 ;216 ; RV64IF-LABEL: name: callee_half_mixed_with_int217 ; RV64IF: bb.1 (%ir-block.0):218 ; RV64IF-NEXT: liveins: $x10, $f10_f219 ; RV64IF-NEXT: {{ $}}220 ; RV64IF-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10221 ; RV64IF-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)222 ; RV64IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f10_f223 ; RV64IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)224 ; RV64IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)225 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)226 ; RV64IF-NEXT: PseudoRET implicit $f10_f227 ;228 ; RV64IZFH-LABEL: name: callee_half_mixed_with_int229 ; RV64IZFH: bb.1 (%ir-block.0):230 ; RV64IZFH-NEXT: liveins: $x10, $f10_h231 ; RV64IZFH-NEXT: {{ $}}232 ; RV64IZFH-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10233 ; RV64IZFH-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)234 ; RV64IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $f10_h235 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY1]](s16)236 ; RV64IZFH-NEXT: PseudoRET implicit $f10_h237 ret half %x238}239 240define half @caller_half_mixed_with_int(half %x, i32 %x0) nounwind {241 ; RV32I-LABEL: name: caller_half_mixed_with_int242 ; RV32I: bb.1 (%ir-block.0):243 ; RV32I-NEXT: liveins: $x10, $x11244 ; RV32I-NEXT: {{ $}}245 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10246 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)247 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11248 ; RV32I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2249 ; RV32I-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)250 ; RV32I-NEXT: $x10 = COPY [[COPY1]](s32)251 ; RV32I-NEXT: $x11 = COPY [[ANYEXT]](s32)252 ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_mixed_with_int, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10253 ; RV32I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2254 ; RV32I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10255 ; RV32I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)256 ; RV32I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)257 ; RV32I-NEXT: $x10 = COPY [[ANYEXT1]](s32)258 ; RV32I-NEXT: PseudoRET implicit $x10259 ;260 ; RV32IF-LABEL: name: caller_half_mixed_with_int261 ; RV32IF: bb.1 (%ir-block.0):262 ; RV32IF-NEXT: liveins: $x10, $f10_f263 ; RV32IF-NEXT: {{ $}}264 ; RV32IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f265 ; RV32IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)266 ; RV32IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10267 ; RV32IF-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2268 ; RV32IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)269 ; RV32IF-NEXT: $x10 = COPY [[COPY1]](s32)270 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)271 ; RV32IF-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_mixed_with_int, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $f10_f, implicit-def $f10_f272 ; RV32IF-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2273 ; RV32IF-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $f10_f274 ; RV32IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)275 ; RV32IF-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)276 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT1]](s32)277 ; RV32IF-NEXT: PseudoRET implicit $f10_f278 ;279 ; RV32IZFH-LABEL: name: caller_half_mixed_with_int280 ; RV32IZFH: bb.1 (%ir-block.0):281 ; RV32IZFH-NEXT: liveins: $x10, $f10_h282 ; RV32IZFH-NEXT: {{ $}}283 ; RV32IZFH-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h284 ; RV32IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10285 ; RV32IZFH-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2286 ; RV32IZFH-NEXT: $x10 = COPY [[COPY1]](s32)287 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY]](s16)288 ; RV32IZFH-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_mixed_with_int, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $f10_h, implicit-def $f10_h289 ; RV32IZFH-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2290 ; RV32IZFH-NEXT: [[COPY2:%[0-9]+]]:_(s16) = COPY $f10_h291 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY2]](s16)292 ; RV32IZFH-NEXT: PseudoRET implicit $f10_h293 ;294 ; RV64I-LABEL: name: caller_half_mixed_with_int295 ; RV64I: bb.1 (%ir-block.0):296 ; RV64I-NEXT: liveins: $x10, $x11297 ; RV64I-NEXT: {{ $}}298 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10299 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)300 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11301 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)302 ; RV64I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2303 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC1]](s32)304 ; RV64I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s16)305 ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)306 ; RV64I-NEXT: $x11 = COPY [[ANYEXT1]](s64)307 ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_mixed_with_int, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10308 ; RV64I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2309 ; RV64I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10310 ; RV64I-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s64)311 ; RV64I-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC2]](s16)312 ; RV64I-NEXT: $x10 = COPY [[ANYEXT2]](s64)313 ; RV64I-NEXT: PseudoRET implicit $x10314 ;315 ; RV64IF-LABEL: name: caller_half_mixed_with_int316 ; RV64IF: bb.1 (%ir-block.0):317 ; RV64IF-NEXT: liveins: $x10, $f10_f318 ; RV64IF-NEXT: {{ $}}319 ; RV64IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f320 ; RV64IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)321 ; RV64IF-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10322 ; RV64IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)323 ; RV64IF-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2324 ; RV64IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC1]](s32)325 ; RV64IF-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)326 ; RV64IF-NEXT: $x10 = COPY [[ANYEXT]](s64)327 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT1]](s32)328 ; RV64IF-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_mixed_with_int, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $f10_f, implicit-def $f10_f329 ; RV64IF-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2330 ; RV64IF-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $f10_f331 ; RV64IF-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)332 ; RV64IF-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC2]](s16)333 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT2]](s32)334 ; RV64IF-NEXT: PseudoRET implicit $f10_f335 ;336 ; RV64IZFH-LABEL: name: caller_half_mixed_with_int337 ; RV64IZFH: bb.1 (%ir-block.0):338 ; RV64IZFH-NEXT: liveins: $x10, $f10_h339 ; RV64IZFH-NEXT: {{ $}}340 ; RV64IZFH-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h341 ; RV64IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10342 ; RV64IZFH-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)343 ; RV64IZFH-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2344 ; RV64IZFH-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s32)345 ; RV64IZFH-NEXT: $x10 = COPY [[ANYEXT]](s64)346 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY]](s16)347 ; RV64IZFH-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_mixed_with_int, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $f10_h, implicit-def $f10_h348 ; RV64IZFH-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2349 ; RV64IZFH-NEXT: [[COPY2:%[0-9]+]]:_(s16) = COPY $f10_h350 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY2]](s16)351 ; RV64IZFH-NEXT: PseudoRET implicit $f10_h352 %y = call half @callee_half_mixed_with_int(i32 %x0, half %x)353 ret half %y354}355 356define half @callee_half_return_stack1(i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, i32 %v6, i32 %v7, i32 %v8, half %x) nounwind {357 ; RV32I-LABEL: name: callee_half_return_stack1358 ; RV32I: bb.1 (%ir-block.0):359 ; RV32I-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17360 ; RV32I-NEXT: {{ $}}361 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10362 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11363 ; RV32I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12364 ; RV32I-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13365 ; RV32I-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14366 ; RV32I-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $x15367 ; RV32I-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $x16368 ; RV32I-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $x17369 ; RV32I-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0370 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.0, align 16)371 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32)372 ; RV32I-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)373 ; RV32I-NEXT: $x10 = COPY [[ANYEXT]](s32)374 ; RV32I-NEXT: PseudoRET implicit $x10375 ;376 ; RV32IF-LABEL: name: callee_half_return_stack1377 ; RV32IF: bb.1 (%ir-block.0):378 ; RV32IF-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $f10_f379 ; RV32IF-NEXT: {{ $}}380 ; RV32IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10381 ; RV32IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11382 ; RV32IF-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12383 ; RV32IF-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13384 ; RV32IF-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14385 ; RV32IF-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $x15386 ; RV32IF-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $x16387 ; RV32IF-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $x17388 ; RV32IF-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $f10_f389 ; RV32IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s32)390 ; RV32IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)391 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)392 ; RV32IF-NEXT: PseudoRET implicit $f10_f393 ;394 ; RV32IZFH-LABEL: name: callee_half_return_stack1395 ; RV32IZFH: bb.1 (%ir-block.0):396 ; RV32IZFH-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $f10_h397 ; RV32IZFH-NEXT: {{ $}}398 ; RV32IZFH-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10399 ; RV32IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11400 ; RV32IZFH-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12401 ; RV32IZFH-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13402 ; RV32IZFH-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14403 ; RV32IZFH-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $x15404 ; RV32IZFH-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $x16405 ; RV32IZFH-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $x17406 ; RV32IZFH-NEXT: [[COPY8:%[0-9]+]]:_(s16) = COPY $f10_h407 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY8]](s16)408 ; RV32IZFH-NEXT: PseudoRET implicit $f10_h409 ;410 ; RV64I-LABEL: name: callee_half_return_stack1411 ; RV64I: bb.1 (%ir-block.0):412 ; RV64I-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17413 ; RV64I-NEXT: {{ $}}414 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10415 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)416 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11417 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)418 ; RV64I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12419 ; RV64I-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)420 ; RV64I-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x13421 ; RV64I-NEXT: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[COPY3]](s64)422 ; RV64I-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x14423 ; RV64I-NEXT: [[TRUNC4:%[0-9]+]]:_(s32) = G_TRUNC [[COPY4]](s64)424 ; RV64I-NEXT: [[COPY5:%[0-9]+]]:_(s64) = COPY $x15425 ; RV64I-NEXT: [[TRUNC5:%[0-9]+]]:_(s32) = G_TRUNC [[COPY5]](s64)426 ; RV64I-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY $x16427 ; RV64I-NEXT: [[TRUNC6:%[0-9]+]]:_(s32) = G_TRUNC [[COPY6]](s64)428 ; RV64I-NEXT: [[COPY7:%[0-9]+]]:_(s64) = COPY $x17429 ; RV64I-NEXT: [[TRUNC7:%[0-9]+]]:_(s32) = G_TRUNC [[COPY7]](s64)430 ; RV64I-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0431 ; RV64I-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s64) from %fixed-stack.0, align 16)432 ; RV64I-NEXT: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s64)433 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC8]](s16)434 ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)435 ; RV64I-NEXT: PseudoRET implicit $x10436 ;437 ; RV64IF-LABEL: name: callee_half_return_stack1438 ; RV64IF: bb.1 (%ir-block.0):439 ; RV64IF-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $f10_f440 ; RV64IF-NEXT: {{ $}}441 ; RV64IF-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10442 ; RV64IF-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)443 ; RV64IF-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11444 ; RV64IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)445 ; RV64IF-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12446 ; RV64IF-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)447 ; RV64IF-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x13448 ; RV64IF-NEXT: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[COPY3]](s64)449 ; RV64IF-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x14450 ; RV64IF-NEXT: [[TRUNC4:%[0-9]+]]:_(s32) = G_TRUNC [[COPY4]](s64)451 ; RV64IF-NEXT: [[COPY5:%[0-9]+]]:_(s64) = COPY $x15452 ; RV64IF-NEXT: [[TRUNC5:%[0-9]+]]:_(s32) = G_TRUNC [[COPY5]](s64)453 ; RV64IF-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY $x16454 ; RV64IF-NEXT: [[TRUNC6:%[0-9]+]]:_(s32) = G_TRUNC [[COPY6]](s64)455 ; RV64IF-NEXT: [[COPY7:%[0-9]+]]:_(s64) = COPY $x17456 ; RV64IF-NEXT: [[TRUNC7:%[0-9]+]]:_(s32) = G_TRUNC [[COPY7]](s64)457 ; RV64IF-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $f10_f458 ; RV64IF-NEXT: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s32)459 ; RV64IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC8]](s16)460 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)461 ; RV64IF-NEXT: PseudoRET implicit $f10_f462 ;463 ; RV64IZFH-LABEL: name: callee_half_return_stack1464 ; RV64IZFH: bb.1 (%ir-block.0):465 ; RV64IZFH-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $f10_h466 ; RV64IZFH-NEXT: {{ $}}467 ; RV64IZFH-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10468 ; RV64IZFH-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)469 ; RV64IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11470 ; RV64IZFH-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)471 ; RV64IZFH-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12472 ; RV64IZFH-NEXT: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY2]](s64)473 ; RV64IZFH-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x13474 ; RV64IZFH-NEXT: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[COPY3]](s64)475 ; RV64IZFH-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x14476 ; RV64IZFH-NEXT: [[TRUNC4:%[0-9]+]]:_(s32) = G_TRUNC [[COPY4]](s64)477 ; RV64IZFH-NEXT: [[COPY5:%[0-9]+]]:_(s64) = COPY $x15478 ; RV64IZFH-NEXT: [[TRUNC5:%[0-9]+]]:_(s32) = G_TRUNC [[COPY5]](s64)479 ; RV64IZFH-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY $x16480 ; RV64IZFH-NEXT: [[TRUNC6:%[0-9]+]]:_(s32) = G_TRUNC [[COPY6]](s64)481 ; RV64IZFH-NEXT: [[COPY7:%[0-9]+]]:_(s64) = COPY $x17482 ; RV64IZFH-NEXT: [[TRUNC7:%[0-9]+]]:_(s32) = G_TRUNC [[COPY7]](s64)483 ; RV64IZFH-NEXT: [[COPY8:%[0-9]+]]:_(s16) = COPY $f10_h484 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY8]](s16)485 ; RV64IZFH-NEXT: PseudoRET implicit $f10_h486 ret half %x487}488 489define half @caller_half_return_stack1(i32 %v1, half %x) nounwind {490 ; RV32I-LABEL: name: caller_half_return_stack1491 ; RV32I: bb.1 (%ir-block.0):492 ; RV32I-NEXT: liveins: $x10, $x11493 ; RV32I-NEXT: {{ $}}494 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10495 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11496 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)497 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0498 ; RV32I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1499 ; RV32I-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2500 ; RV32I-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 5501 ; RV32I-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 6502 ; RV32I-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 7503 ; RV32I-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8504 ; RV32I-NEXT: ADJCALLSTACKDOWN 4, 0, implicit-def $x2, implicit $x2505 ; RV32I-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)506 ; RV32I-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY $x2507 ; RV32I-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0508 ; RV32I-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY2]], [[C7]](s32)509 ; RV32I-NEXT: G_STORE [[ANYEXT]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)510 ; RV32I-NEXT: $x10 = COPY [[C]](s32)511 ; RV32I-NEXT: $x11 = COPY [[C1]](s32)512 ; RV32I-NEXT: $x12 = COPY [[C2]](s32)513 ; RV32I-NEXT: $x13 = COPY [[COPY]](s32)514 ; RV32I-NEXT: $x14 = COPY [[C3]](s32)515 ; RV32I-NEXT: $x15 = COPY [[C4]](s32)516 ; RV32I-NEXT: $x16 = COPY [[C5]](s32)517 ; RV32I-NEXT: $x17 = COPY [[C6]](s32)518 ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack1, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10519 ; RV32I-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2520 ; RV32I-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x10521 ; RV32I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)522 ; RV32I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)523 ; RV32I-NEXT: $x10 = COPY [[ANYEXT1]](s32)524 ; RV32I-NEXT: PseudoRET implicit $x10525 ;526 ; RV32IF-LABEL: name: caller_half_return_stack1527 ; RV32IF: bb.1 (%ir-block.0):528 ; RV32IF-NEXT: liveins: $x10, $f10_f529 ; RV32IF-NEXT: {{ $}}530 ; RV32IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10531 ; RV32IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f10_f532 ; RV32IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)533 ; RV32IF-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0534 ; RV32IF-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1535 ; RV32IF-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2536 ; RV32IF-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 5537 ; RV32IF-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 6538 ; RV32IF-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 7539 ; RV32IF-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8540 ; RV32IF-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2541 ; RV32IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)542 ; RV32IF-NEXT: $x10 = COPY [[C]](s32)543 ; RV32IF-NEXT: $x11 = COPY [[C1]](s32)544 ; RV32IF-NEXT: $x12 = COPY [[C2]](s32)545 ; RV32IF-NEXT: $x13 = COPY [[COPY]](s32)546 ; RV32IF-NEXT: $x14 = COPY [[C3]](s32)547 ; RV32IF-NEXT: $x15 = COPY [[C4]](s32)548 ; RV32IF-NEXT: $x16 = COPY [[C5]](s32)549 ; RV32IF-NEXT: $x17 = COPY [[C6]](s32)550 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)551 ; RV32IF-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack1, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_f, implicit-def $f10_f552 ; RV32IF-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2553 ; RV32IF-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $f10_f554 ; RV32IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)555 ; RV32IF-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)556 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT1]](s32)557 ; RV32IF-NEXT: PseudoRET implicit $f10_f558 ;559 ; RV32IZFH-LABEL: name: caller_half_return_stack1560 ; RV32IZFH: bb.1 (%ir-block.0):561 ; RV32IZFH-NEXT: liveins: $x10, $f10_h562 ; RV32IZFH-NEXT: {{ $}}563 ; RV32IZFH-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10564 ; RV32IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $f10_h565 ; RV32IZFH-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0566 ; RV32IZFH-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1567 ; RV32IZFH-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2568 ; RV32IZFH-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 5569 ; RV32IZFH-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 6570 ; RV32IZFH-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 7571 ; RV32IZFH-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8572 ; RV32IZFH-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2573 ; RV32IZFH-NEXT: $x10 = COPY [[C]](s32)574 ; RV32IZFH-NEXT: $x11 = COPY [[C1]](s32)575 ; RV32IZFH-NEXT: $x12 = COPY [[C2]](s32)576 ; RV32IZFH-NEXT: $x13 = COPY [[COPY]](s32)577 ; RV32IZFH-NEXT: $x14 = COPY [[C3]](s32)578 ; RV32IZFH-NEXT: $x15 = COPY [[C4]](s32)579 ; RV32IZFH-NEXT: $x16 = COPY [[C5]](s32)580 ; RV32IZFH-NEXT: $x17 = COPY [[C6]](s32)581 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY1]](s16)582 ; RV32IZFH-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack1, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_h, implicit-def $f10_h583 ; RV32IZFH-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2584 ; RV32IZFH-NEXT: [[COPY2:%[0-9]+]]:_(s16) = COPY $f10_h585 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY2]](s16)586 ; RV32IZFH-NEXT: PseudoRET implicit $f10_h587 ;588 ; RV64I-LABEL: name: caller_half_return_stack1589 ; RV64I: bb.1 (%ir-block.0):590 ; RV64I-NEXT: liveins: $x10, $x11591 ; RV64I-NEXT: {{ $}}592 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10593 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)594 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11595 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s64)596 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0597 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1598 ; RV64I-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2599 ; RV64I-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 5600 ; RV64I-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 6601 ; RV64I-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 7602 ; RV64I-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8603 ; RV64I-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2604 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C]](s32)605 ; RV64I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s32)606 ; RV64I-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[C2]](s32)607 ; RV64I-NEXT: [[ANYEXT3:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s32)608 ; RV64I-NEXT: [[ANYEXT4:%[0-9]+]]:_(s64) = G_ANYEXT [[C3]](s32)609 ; RV64I-NEXT: [[ANYEXT5:%[0-9]+]]:_(s64) = G_ANYEXT [[C4]](s32)610 ; RV64I-NEXT: [[ANYEXT6:%[0-9]+]]:_(s64) = G_ANYEXT [[C5]](s32)611 ; RV64I-NEXT: [[ANYEXT7:%[0-9]+]]:_(s64) = G_ANYEXT [[C6]](s32)612 ; RV64I-NEXT: [[ANYEXT8:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC1]](s16)613 ; RV64I-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY $x2614 ; RV64I-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 0615 ; RV64I-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY2]], [[C7]](s64)616 ; RV64I-NEXT: G_STORE [[ANYEXT8]](s64), [[PTR_ADD]](p0) :: (store (s64) into stack, align 16)617 ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)618 ; RV64I-NEXT: $x11 = COPY [[ANYEXT1]](s64)619 ; RV64I-NEXT: $x12 = COPY [[ANYEXT2]](s64)620 ; RV64I-NEXT: $x13 = COPY [[ANYEXT3]](s64)621 ; RV64I-NEXT: $x14 = COPY [[ANYEXT4]](s64)622 ; RV64I-NEXT: $x15 = COPY [[ANYEXT5]](s64)623 ; RV64I-NEXT: $x16 = COPY [[ANYEXT6]](s64)624 ; RV64I-NEXT: $x17 = COPY [[ANYEXT7]](s64)625 ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack1, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10626 ; RV64I-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2627 ; RV64I-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x10628 ; RV64I-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s64)629 ; RV64I-NEXT: [[ANYEXT9:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC2]](s16)630 ; RV64I-NEXT: $x10 = COPY [[ANYEXT9]](s64)631 ; RV64I-NEXT: PseudoRET implicit $x10632 ;633 ; RV64IF-LABEL: name: caller_half_return_stack1634 ; RV64IF: bb.1 (%ir-block.0):635 ; RV64IF-NEXT: liveins: $x10, $f10_f636 ; RV64IF-NEXT: {{ $}}637 ; RV64IF-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10638 ; RV64IF-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)639 ; RV64IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f10_f640 ; RV64IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)641 ; RV64IF-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0642 ; RV64IF-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1643 ; RV64IF-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2644 ; RV64IF-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 5645 ; RV64IF-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 6646 ; RV64IF-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 7647 ; RV64IF-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8648 ; RV64IF-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2649 ; RV64IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C]](s32)650 ; RV64IF-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s32)651 ; RV64IF-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[C2]](s32)652 ; RV64IF-NEXT: [[ANYEXT3:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s32)653 ; RV64IF-NEXT: [[ANYEXT4:%[0-9]+]]:_(s64) = G_ANYEXT [[C3]](s32)654 ; RV64IF-NEXT: [[ANYEXT5:%[0-9]+]]:_(s64) = G_ANYEXT [[C4]](s32)655 ; RV64IF-NEXT: [[ANYEXT6:%[0-9]+]]:_(s64) = G_ANYEXT [[C5]](s32)656 ; RV64IF-NEXT: [[ANYEXT7:%[0-9]+]]:_(s64) = G_ANYEXT [[C6]](s32)657 ; RV64IF-NEXT: [[ANYEXT8:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)658 ; RV64IF-NEXT: $x10 = COPY [[ANYEXT]](s64)659 ; RV64IF-NEXT: $x11 = COPY [[ANYEXT1]](s64)660 ; RV64IF-NEXT: $x12 = COPY [[ANYEXT2]](s64)661 ; RV64IF-NEXT: $x13 = COPY [[ANYEXT3]](s64)662 ; RV64IF-NEXT: $x14 = COPY [[ANYEXT4]](s64)663 ; RV64IF-NEXT: $x15 = COPY [[ANYEXT5]](s64)664 ; RV64IF-NEXT: $x16 = COPY [[ANYEXT6]](s64)665 ; RV64IF-NEXT: $x17 = COPY [[ANYEXT7]](s64)666 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT8]](s32)667 ; RV64IF-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack1, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_f, implicit-def $f10_f668 ; RV64IF-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2669 ; RV64IF-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $f10_f670 ; RV64IF-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)671 ; RV64IF-NEXT: [[ANYEXT9:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC2]](s16)672 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT9]](s32)673 ; RV64IF-NEXT: PseudoRET implicit $f10_f674 ;675 ; RV64IZFH-LABEL: name: caller_half_return_stack1676 ; RV64IZFH: bb.1 (%ir-block.0):677 ; RV64IZFH-NEXT: liveins: $x10, $f10_h678 ; RV64IZFH-NEXT: {{ $}}679 ; RV64IZFH-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10680 ; RV64IZFH-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)681 ; RV64IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $f10_h682 ; RV64IZFH-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0683 ; RV64IZFH-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1684 ; RV64IZFH-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2685 ; RV64IZFH-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 5686 ; RV64IZFH-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 6687 ; RV64IZFH-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 7688 ; RV64IZFH-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8689 ; RV64IZFH-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2690 ; RV64IZFH-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C]](s32)691 ; RV64IZFH-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s32)692 ; RV64IZFH-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[C2]](s32)693 ; RV64IZFH-NEXT: [[ANYEXT3:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s32)694 ; RV64IZFH-NEXT: [[ANYEXT4:%[0-9]+]]:_(s64) = G_ANYEXT [[C3]](s32)695 ; RV64IZFH-NEXT: [[ANYEXT5:%[0-9]+]]:_(s64) = G_ANYEXT [[C4]](s32)696 ; RV64IZFH-NEXT: [[ANYEXT6:%[0-9]+]]:_(s64) = G_ANYEXT [[C5]](s32)697 ; RV64IZFH-NEXT: [[ANYEXT7:%[0-9]+]]:_(s64) = G_ANYEXT [[C6]](s32)698 ; RV64IZFH-NEXT: $x10 = COPY [[ANYEXT]](s64)699 ; RV64IZFH-NEXT: $x11 = COPY [[ANYEXT1]](s64)700 ; RV64IZFH-NEXT: $x12 = COPY [[ANYEXT2]](s64)701 ; RV64IZFH-NEXT: $x13 = COPY [[ANYEXT3]](s64)702 ; RV64IZFH-NEXT: $x14 = COPY [[ANYEXT4]](s64)703 ; RV64IZFH-NEXT: $x15 = COPY [[ANYEXT5]](s64)704 ; RV64IZFH-NEXT: $x16 = COPY [[ANYEXT6]](s64)705 ; RV64IZFH-NEXT: $x17 = COPY [[ANYEXT7]](s64)706 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY1]](s16)707 ; RV64IZFH-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack1, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $f10_h, implicit-def $f10_h708 ; RV64IZFH-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2709 ; RV64IZFH-NEXT: [[COPY2:%[0-9]+]]:_(s16) = COPY $f10_h710 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY2]](s16)711 ; RV64IZFH-NEXT: PseudoRET implicit $f10_h712 %y = call half @callee_half_return_stack1(i32 0, i32 1, i32 2, i32 %v1, i32 5, i32 6, i32 7, i32 8, half %x)713 ret half %y714}715 716define half @callee_half_return_stack2(half %v1, half %v2, half %v3, half %v4, half %v5, half %v6, half %v7, half %v8, half %x) nounwind {717 ; RV32I-LABEL: name: callee_half_return_stack2718 ; RV32I: bb.1 (%ir-block.0):719 ; RV32I-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17720 ; RV32I-NEXT: {{ $}}721 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10722 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)723 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11724 ; RV32I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)725 ; RV32I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12726 ; RV32I-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)727 ; RV32I-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13728 ; RV32I-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)729 ; RV32I-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $x14730 ; RV32I-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY4]](s32)731 ; RV32I-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $x15732 ; RV32I-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY5]](s32)733 ; RV32I-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $x16734 ; RV32I-NEXT: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY6]](s32)735 ; RV32I-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $x17736 ; RV32I-NEXT: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[COPY7]](s32)737 ; RV32I-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0738 ; RV32I-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.0, align 16)739 ; RV32I-NEXT: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s32)740 ; RV32I-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC8]](s16)741 ; RV32I-NEXT: $x10 = COPY [[ANYEXT]](s32)742 ; RV32I-NEXT: PseudoRET implicit $x10743 ;744 ; RV32IF-LABEL: name: callee_half_return_stack2745 ; RV32IF: bb.1 (%ir-block.0):746 ; RV32IF-NEXT: liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f, $f14_f, $f15_f, $f16_f, $f17_f747 ; RV32IF-NEXT: {{ $}}748 ; RV32IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f749 ; RV32IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)750 ; RV32IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f11_f751 ; RV32IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)752 ; RV32IF-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $f12_f753 ; RV32IF-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)754 ; RV32IF-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $f13_f755 ; RV32IF-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)756 ; RV32IF-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $f14_f757 ; RV32IF-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY4]](s32)758 ; RV32IF-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $f15_f759 ; RV32IF-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY5]](s32)760 ; RV32IF-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $f16_f761 ; RV32IF-NEXT: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY6]](s32)762 ; RV32IF-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $f17_f763 ; RV32IF-NEXT: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[COPY7]](s32)764 ; RV32IF-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $x10765 ; RV32IF-NEXT: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s32)766 ; RV32IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC8]](s16)767 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)768 ; RV32IF-NEXT: PseudoRET implicit $f10_f769 ;770 ; RV32IZFH-LABEL: name: callee_half_return_stack2771 ; RV32IZFH: bb.1 (%ir-block.0):772 ; RV32IZFH-NEXT: liveins: $x10, $f10_h, $f11_h, $f12_h, $f13_h, $f14_h, $f15_h, $f16_h, $f17_h773 ; RV32IZFH-NEXT: {{ $}}774 ; RV32IZFH-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h775 ; RV32IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $f11_h776 ; RV32IZFH-NEXT: [[COPY2:%[0-9]+]]:_(s16) = COPY $f12_h777 ; RV32IZFH-NEXT: [[COPY3:%[0-9]+]]:_(s16) = COPY $f13_h778 ; RV32IZFH-NEXT: [[COPY4:%[0-9]+]]:_(s16) = COPY $f14_h779 ; RV32IZFH-NEXT: [[COPY5:%[0-9]+]]:_(s16) = COPY $f15_h780 ; RV32IZFH-NEXT: [[COPY6:%[0-9]+]]:_(s16) = COPY $f16_h781 ; RV32IZFH-NEXT: [[COPY7:%[0-9]+]]:_(s16) = COPY $f17_h782 ; RV32IZFH-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $x10783 ; RV32IZFH-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s32)784 ; RV32IZFH-NEXT: $f10_h = COPY [[TRUNC]](s16)785 ; RV32IZFH-NEXT: PseudoRET implicit $f10_h786 ;787 ; RV64I-LABEL: name: callee_half_return_stack2788 ; RV64I: bb.1 (%ir-block.0):789 ; RV64I-NEXT: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17790 ; RV64I-NEXT: {{ $}}791 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10792 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)793 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11794 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s64)795 ; RV64I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x12796 ; RV64I-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s64)797 ; RV64I-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x13798 ; RV64I-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s64)799 ; RV64I-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY $x14800 ; RV64I-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY4]](s64)801 ; RV64I-NEXT: [[COPY5:%[0-9]+]]:_(s64) = COPY $x15802 ; RV64I-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY5]](s64)803 ; RV64I-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY $x16804 ; RV64I-NEXT: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY6]](s64)805 ; RV64I-NEXT: [[COPY7:%[0-9]+]]:_(s64) = COPY $x17806 ; RV64I-NEXT: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[COPY7]](s64)807 ; RV64I-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0808 ; RV64I-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s64) from %fixed-stack.0, align 16)809 ; RV64I-NEXT: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[LOAD]](s64)810 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC8]](s16)811 ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)812 ; RV64I-NEXT: PseudoRET implicit $x10813 ;814 ; RV64IF-LABEL: name: callee_half_return_stack2815 ; RV64IF: bb.1 (%ir-block.0):816 ; RV64IF-NEXT: liveins: $x10, $f10_f, $f11_f, $f12_f, $f13_f, $f14_f, $f15_f, $f16_f, $f17_f817 ; RV64IF-NEXT: {{ $}}818 ; RV64IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f819 ; RV64IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)820 ; RV64IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f11_f821 ; RV64IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)822 ; RV64IF-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $f12_f823 ; RV64IF-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)824 ; RV64IF-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $f13_f825 ; RV64IF-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)826 ; RV64IF-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $f14_f827 ; RV64IF-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY4]](s32)828 ; RV64IF-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $f15_f829 ; RV64IF-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY5]](s32)830 ; RV64IF-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $f16_f831 ; RV64IF-NEXT: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY6]](s32)832 ; RV64IF-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $f17_f833 ; RV64IF-NEXT: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[COPY7]](s32)834 ; RV64IF-NEXT: [[COPY8:%[0-9]+]]:_(s64) = COPY $x10835 ; RV64IF-NEXT: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s64)836 ; RV64IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC8]](s16)837 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)838 ; RV64IF-NEXT: PseudoRET implicit $f10_f839 ;840 ; RV64IZFH-LABEL: name: callee_half_return_stack2841 ; RV64IZFH: bb.1 (%ir-block.0):842 ; RV64IZFH-NEXT: liveins: $x10, $f10_h, $f11_h, $f12_h, $f13_h, $f14_h, $f15_h, $f16_h, $f17_h843 ; RV64IZFH-NEXT: {{ $}}844 ; RV64IZFH-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h845 ; RV64IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $f11_h846 ; RV64IZFH-NEXT: [[COPY2:%[0-9]+]]:_(s16) = COPY $f12_h847 ; RV64IZFH-NEXT: [[COPY3:%[0-9]+]]:_(s16) = COPY $f13_h848 ; RV64IZFH-NEXT: [[COPY4:%[0-9]+]]:_(s16) = COPY $f14_h849 ; RV64IZFH-NEXT: [[COPY5:%[0-9]+]]:_(s16) = COPY $f15_h850 ; RV64IZFH-NEXT: [[COPY6:%[0-9]+]]:_(s16) = COPY $f16_h851 ; RV64IZFH-NEXT: [[COPY7:%[0-9]+]]:_(s16) = COPY $f17_h852 ; RV64IZFH-NEXT: [[COPY8:%[0-9]+]]:_(s64) = COPY $x10853 ; RV64IZFH-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s64)854 ; RV64IZFH-NEXT: $f10_h = COPY [[TRUNC]](s16)855 ; RV64IZFH-NEXT: PseudoRET implicit $f10_h856 ret half %x857}858 859define half @caller_half_return_stack2(half %x, half %y) nounwind {860 ; RV32I-LABEL: name: caller_half_return_stack2861 ; RV32I: bb.1 (%ir-block.0):862 ; RV32I-NEXT: liveins: $x10, $x11863 ; RV32I-NEXT: {{ $}}864 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10865 ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)866 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11867 ; RV32I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)868 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH3C00869 ; RV32I-NEXT: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4200870 ; RV32I-NEXT: ADJCALLSTACKDOWN 4, 0, implicit-def $x2, implicit $x2871 ; RV32I-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)872 ; RV32I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s16)873 ; RV32I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)874 ; RV32I-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[C1]](s16)875 ; RV32I-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)876 ; RV32I-NEXT: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)877 ; RV32I-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ANYEXT3]](s32)878 ; RV32I-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ANYEXT3]](s32)879 ; RV32I-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)880 ; RV32I-NEXT: [[COPY7:%[0-9]+]]:_(p0) = COPY $x2881 ; RV32I-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0882 ; RV32I-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY7]], [[C2]](s32)883 ; RV32I-NEXT: G_STORE [[COPY6]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)884 ; RV32I-NEXT: $x10 = COPY [[ANYEXT]](s32)885 ; RV32I-NEXT: $x11 = COPY [[ANYEXT1]](s32)886 ; RV32I-NEXT: $x12 = COPY [[COPY2]](s32)887 ; RV32I-NEXT: $x13 = COPY [[ANYEXT2]](s32)888 ; RV32I-NEXT: $x14 = COPY [[COPY3]](s32)889 ; RV32I-NEXT: $x15 = COPY [[ANYEXT3]](s32)890 ; RV32I-NEXT: $x16 = COPY [[COPY4]](s32)891 ; RV32I-NEXT: $x17 = COPY [[COPY5]](s32)892 ; RV32I-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack2, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10893 ; RV32I-NEXT: ADJCALLSTACKUP 4, 0, implicit-def $x2, implicit $x2894 ; RV32I-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $x10895 ; RV32I-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s32)896 ; RV32I-NEXT: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC2]](s16)897 ; RV32I-NEXT: $x10 = COPY [[ANYEXT4]](s32)898 ; RV32I-NEXT: PseudoRET implicit $x10899 ;900 ; RV32IF-LABEL: name: caller_half_return_stack2901 ; RV32IF: bb.1 (%ir-block.0):902 ; RV32IF-NEXT: liveins: $f10_f, $f11_f903 ; RV32IF-NEXT: {{ $}}904 ; RV32IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f905 ; RV32IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)906 ; RV32IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f11_f907 ; RV32IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)908 ; RV32IF-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH3C00909 ; RV32IF-NEXT: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4200910 ; RV32IF-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2911 ; RV32IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)912 ; RV32IF-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s16)913 ; RV32IF-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)914 ; RV32IF-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[C1]](s16)915 ; RV32IF-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)916 ; RV32IF-NEXT: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)917 ; RV32IF-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ANYEXT3]](s32)918 ; RV32IF-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ANYEXT3]](s32)919 ; RV32IF-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)920 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)921 ; RV32IF-NEXT: $f11_f = COPY [[ANYEXT1]](s32)922 ; RV32IF-NEXT: $f12_f = COPY [[COPY2]](s32)923 ; RV32IF-NEXT: $f13_f = COPY [[ANYEXT2]](s32)924 ; RV32IF-NEXT: $f14_f = COPY [[COPY3]](s32)925 ; RV32IF-NEXT: $f15_f = COPY [[ANYEXT3]](s32)926 ; RV32IF-NEXT: $f16_f = COPY [[COPY4]](s32)927 ; RV32IF-NEXT: $f17_f = COPY [[COPY5]](s32)928 ; RV32IF-NEXT: $x10 = COPY [[COPY6]](s32)929 ; RV32IF-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack2, csr_ilp32f_lp64f, implicit-def $x1, implicit $f10_f, implicit $f11_f, implicit $f12_f, implicit $f13_f, implicit $f14_f, implicit $f15_f, implicit $f16_f, implicit $f17_f, implicit $x10, implicit-def $f10_f930 ; RV32IF-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2931 ; RV32IF-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $f10_f932 ; RV32IF-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY7]](s32)933 ; RV32IF-NEXT: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC2]](s16)934 ; RV32IF-NEXT: $f10_f = COPY [[ANYEXT4]](s32)935 ; RV32IF-NEXT: PseudoRET implicit $f10_f936 ;937 ; RV32IZFH-LABEL: name: caller_half_return_stack2938 ; RV32IZFH: bb.1 (%ir-block.0):939 ; RV32IZFH-NEXT: liveins: $f10_h, $f11_h940 ; RV32IZFH-NEXT: {{ $}}941 ; RV32IZFH-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h942 ; RV32IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $f11_h943 ; RV32IZFH-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH3C00944 ; RV32IZFH-NEXT: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4200945 ; RV32IZFH-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2946 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY]](s16)947 ; RV32IZFH-NEXT: $f11_h = COPY [[C]](s16)948 ; RV32IZFH-NEXT: $f12_h = COPY [[COPY]](s16)949 ; RV32IZFH-NEXT: $f13_h = COPY [[C1]](s16)950 ; RV32IZFH-NEXT: $f14_h = COPY [[COPY]](s16)951 ; RV32IZFH-NEXT: $f15_h = COPY [[COPY1]](s16)952 ; RV32IZFH-NEXT: $f16_h = COPY [[COPY1]](s16)953 ; RV32IZFH-NEXT: $f17_h = COPY [[COPY1]](s16)954 ; RV32IZFH-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s16)955 ; RV32IZFH-NEXT: $x10 = COPY [[ANYEXT]](s32)956 ; RV32IZFH-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack2, csr_ilp32f_lp64f, implicit-def $x1, implicit $f10_h, implicit $f11_h, implicit $f12_h, implicit $f13_h, implicit $f14_h, implicit $f15_h, implicit $f16_h, implicit $f17_h, implicit $x10, implicit-def $f10_h957 ; RV32IZFH-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2958 ; RV32IZFH-NEXT: [[COPY2:%[0-9]+]]:_(s16) = COPY $f10_h959 ; RV32IZFH-NEXT: $f10_h = COPY [[COPY2]](s16)960 ; RV32IZFH-NEXT: PseudoRET implicit $f10_h961 ;962 ; RV64I-LABEL: name: caller_half_return_stack2963 ; RV64I: bb.1 (%ir-block.0):964 ; RV64I-NEXT: liveins: $x10, $x11965 ; RV64I-NEXT: {{ $}}966 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10967 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)968 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11969 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s64)970 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH3C00971 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH4200972 ; RV64I-NEXT: ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2973 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s16)974 ; RV64I-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[C]](s16)975 ; RV64I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY [[ANYEXT]](s64)976 ; RV64I-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[C1]](s16)977 ; RV64I-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY [[ANYEXT]](s64)978 ; RV64I-NEXT: [[ANYEXT3:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC1]](s16)979 ; RV64I-NEXT: [[COPY4:%[0-9]+]]:_(s64) = COPY [[ANYEXT3]](s64)980 ; RV64I-NEXT: [[COPY5:%[0-9]+]]:_(s64) = COPY [[ANYEXT3]](s64)981 ; RV64I-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY [[ANYEXT]](s64)982 ; RV64I-NEXT: [[COPY7:%[0-9]+]]:_(p0) = COPY $x2983 ; RV64I-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0984 ; RV64I-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY7]], [[C2]](s64)985 ; RV64I-NEXT: G_STORE [[COPY6]](s64), [[PTR_ADD]](p0) :: (store (s64) into stack, align 16)986 ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)987 ; RV64I-NEXT: $x11 = COPY [[ANYEXT1]](s64)988 ; RV64I-NEXT: $x12 = COPY [[COPY2]](s64)989 ; RV64I-NEXT: $x13 = COPY [[ANYEXT2]](s64)990 ; RV64I-NEXT: $x14 = COPY [[COPY3]](s64)991 ; RV64I-NEXT: $x15 = COPY [[ANYEXT3]](s64)992 ; RV64I-NEXT: $x16 = COPY [[COPY4]](s64)993 ; RV64I-NEXT: $x17 = COPY [[COPY5]](s64)994 ; RV64I-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack2, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10995 ; RV64I-NEXT: ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2996 ; RV64I-NEXT: [[COPY8:%[0-9]+]]:_(s64) = COPY $x10997 ; RV64I-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s64)998 ; RV64I-NEXT: [[ANYEXT4:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC2]](s16)999 ; RV64I-NEXT: $x10 = COPY [[ANYEXT4]](s64)1000 ; RV64I-NEXT: PseudoRET implicit $x101001 ;1002 ; RV64IF-LABEL: name: caller_half_return_stack21003 ; RV64IF: bb.1 (%ir-block.0):1004 ; RV64IF-NEXT: liveins: $f10_f, $f11_f1005 ; RV64IF-NEXT: {{ $}}1006 ; RV64IF-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $f10_f1007 ; RV64IF-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)1008 ; RV64IF-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $f11_f1009 ; RV64IF-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)1010 ; RV64IF-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH3C001011 ; RV64IF-NEXT: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH42001012 ; RV64IF-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21013 ; RV64IF-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)1014 ; RV64IF-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s16)1015 ; RV64IF-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)1016 ; RV64IF-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[C1]](s16)1017 ; RV64IF-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ANYEXT]](s32)1018 ; RV64IF-NEXT: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC1]](s16)1019 ; RV64IF-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY [[ANYEXT3]](s32)1020 ; RV64IF-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY [[ANYEXT3]](s32)1021 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT]](s32)1022 ; RV64IF-NEXT: $f11_f = COPY [[ANYEXT1]](s32)1023 ; RV64IF-NEXT: $f12_f = COPY [[COPY2]](s32)1024 ; RV64IF-NEXT: $f13_f = COPY [[ANYEXT2]](s32)1025 ; RV64IF-NEXT: $f14_f = COPY [[COPY3]](s32)1026 ; RV64IF-NEXT: $f15_f = COPY [[ANYEXT3]](s32)1027 ; RV64IF-NEXT: $f16_f = COPY [[COPY4]](s32)1028 ; RV64IF-NEXT: $f17_f = COPY [[COPY5]](s32)1029 ; RV64IF-NEXT: [[ANYEXT4:%[0-9]+]]:_(s64) = G_ANYEXT [[TRUNC]](s16)1030 ; RV64IF-NEXT: $x10 = COPY [[ANYEXT4]](s64)1031 ; RV64IF-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack2, csr_ilp32f_lp64f, implicit-def $x1, implicit $f10_f, implicit $f11_f, implicit $f12_f, implicit $f13_f, implicit $f14_f, implicit $f15_f, implicit $f16_f, implicit $f17_f, implicit $x10, implicit-def $f10_f1032 ; RV64IF-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21033 ; RV64IF-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $f10_f1034 ; RV64IF-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY6]](s32)1035 ; RV64IF-NEXT: [[ANYEXT5:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC2]](s16)1036 ; RV64IF-NEXT: $f10_f = COPY [[ANYEXT5]](s32)1037 ; RV64IF-NEXT: PseudoRET implicit $f10_f1038 ;1039 ; RV64IZFH-LABEL: name: caller_half_return_stack21040 ; RV64IZFH: bb.1 (%ir-block.0):1041 ; RV64IZFH-NEXT: liveins: $f10_h, $f11_h1042 ; RV64IZFH-NEXT: {{ $}}1043 ; RV64IZFH-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $f10_h1044 ; RV64IZFH-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $f11_h1045 ; RV64IZFH-NEXT: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH3C001046 ; RV64IZFH-NEXT: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH42001047 ; RV64IZFH-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21048 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY]](s16)1049 ; RV64IZFH-NEXT: $f11_h = COPY [[C]](s16)1050 ; RV64IZFH-NEXT: $f12_h = COPY [[COPY]](s16)1051 ; RV64IZFH-NEXT: $f13_h = COPY [[C1]](s16)1052 ; RV64IZFH-NEXT: $f14_h = COPY [[COPY]](s16)1053 ; RV64IZFH-NEXT: $f15_h = COPY [[COPY1]](s16)1054 ; RV64IZFH-NEXT: $f16_h = COPY [[COPY1]](s16)1055 ; RV64IZFH-NEXT: $f17_h = COPY [[COPY1]](s16)1056 ; RV64IZFH-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s16)1057 ; RV64IZFH-NEXT: $x10 = COPY [[ANYEXT]](s64)1058 ; RV64IZFH-NEXT: PseudoCALL target-flags(riscv-call) @callee_half_return_stack2, csr_ilp32f_lp64f, implicit-def $x1, implicit $f10_h, implicit $f11_h, implicit $f12_h, implicit $f13_h, implicit $f14_h, implicit $f15_h, implicit $f16_h, implicit $f17_h, implicit $x10, implicit-def $f10_h1059 ; RV64IZFH-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21060 ; RV64IZFH-NEXT: [[COPY2:%[0-9]+]]:_(s16) = COPY $f10_h1061 ; RV64IZFH-NEXT: $f10_h = COPY [[COPY2]](s16)1062 ; RV64IZFH-NEXT: PseudoRET implicit $f10_h1063 %z = call half @callee_half_return_stack2(half %x, half 1.0, half %x, half 3.0, half %x, half %y, half %y, half %y, half %x)1064 ret half %z1065}1066