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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32; RUN: llc -mtriple=riscv32 \3; RUN:    -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \4; RUN:   | FileCheck -check-prefixes=RV32I,ILP32 %s5; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi ilp32f \6; RUN:    -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \7; RUN:   | FileCheck -check-prefixes=RV32I,ILP32F %s8; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d \9; RUN:    -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \10; RUN:   | FileCheck -check-prefixes=RV32I,ILP32D %s11 12; This file contains tests that should have identical output for the ilp32,13; ilp32f, and ilp32d ABIs. i.e. where no arguments are passed according to14; the floating point ABI.15 16; Check that on RV32, i64 is passed in a pair of registers. Unlike17; the convention for varargs, this need not be an aligned pair.18 19define i32 @callee_i64_in_regs(i32 %a, i64 %b) nounwind {20  ; RV32I-LABEL: name: callee_i64_in_regs21  ; RV32I: bb.1 (%ir-block.0):22  ; RV32I-NEXT:   liveins: $x10, $x11, $x1223  ; RV32I-NEXT: {{  $}}24  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x1025  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x1126  ; RV32I-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x1227  ; RV32I-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)28  ; RV32I-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)29  ; RV32I-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[TRUNC]]30  ; RV32I-NEXT:   $x10 = COPY [[ADD]](s32)31  ; RV32I-NEXT:   PseudoRET implicit $x1032  %b_trunc = trunc i64 %b to i3233  %1 = add i32 %a, %b_trunc34  ret i32 %135}36 37define i32 @caller_i64_in_regs() nounwind {38  ; ILP32-LABEL: name: caller_i64_in_regs39  ; ILP32: bb.1 (%ir-block.0):40  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 141  ; ILP32-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 242  ; ILP32-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x243  ; ILP32-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)44  ; ILP32-NEXT:   $x10 = COPY [[C]](s32)45  ; ILP32-NEXT:   $x11 = COPY [[UV]](s32)46  ; ILP32-NEXT:   $x12 = COPY [[UV1]](s32)47  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x1048  ; ILP32-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x249  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x1050  ; ILP32-NEXT:   $x10 = COPY [[COPY]](s32)51  ; ILP32-NEXT:   PseudoRET implicit $x1052  ;53  ; ILP32F-LABEL: name: caller_i64_in_regs54  ; ILP32F: bb.1 (%ir-block.0):55  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 156  ; ILP32F-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 257  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x258  ; ILP32F-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)59  ; ILP32F-NEXT:   $x10 = COPY [[C]](s32)60  ; ILP32F-NEXT:   $x11 = COPY [[UV]](s32)61  ; ILP32F-NEXT:   $x12 = COPY [[UV1]](s32)62  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x1063  ; ILP32F-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x264  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x1065  ; ILP32F-NEXT:   $x10 = COPY [[COPY]](s32)66  ; ILP32F-NEXT:   PseudoRET implicit $x1067  ;68  ; ILP32D-LABEL: name: caller_i64_in_regs69  ; ILP32D: bb.1 (%ir-block.0):70  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 171  ; ILP32D-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 272  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x273  ; ILP32D-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)74  ; ILP32D-NEXT:   $x10 = COPY [[C]](s32)75  ; ILP32D-NEXT:   $x11 = COPY [[UV]](s32)76  ; ILP32D-NEXT:   $x12 = COPY [[UV1]](s32)77  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_i64_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x1078  ; ILP32D-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x279  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x1080  ; ILP32D-NEXT:   $x10 = COPY [[COPY]](s32)81  ; ILP32D-NEXT:   PseudoRET implicit $x1082  %1 = call i32 @callee_i64_in_regs(i32 1, i64 2)83  ret i32 %184}85 86; Check the correct handling of passing of values that are larger that 2*XLen.87 88define i64 @callee_128i_indirect_reference_in_stack(i64 %x1, i64 %x2, i64 %x3, i64 %x4, i128 %y, i128 %y2) {89  ; RV32I-LABEL: name: callee_128i_indirect_reference_in_stack90  ; RV32I: bb.1 (%ir-block.0):91  ; RV32I-NEXT:   liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x1792  ; RV32I-NEXT: {{  $}}93  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x1094  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x1195  ; RV32I-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)96  ; RV32I-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x1297  ; RV32I-NEXT:   [[COPY3:%[0-9]+]]:_(s32) = COPY $x1398  ; RV32I-NEXT:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)99  ; RV32I-NEXT:   [[COPY4:%[0-9]+]]:_(s32) = COPY $x14100  ; RV32I-NEXT:   [[COPY5:%[0-9]+]]:_(s32) = COPY $x15101  ; RV32I-NEXT:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)102  ; RV32I-NEXT:   [[COPY6:%[0-9]+]]:_(s32) = COPY $x16103  ; RV32I-NEXT:   [[COPY7:%[0-9]+]]:_(s32) = COPY $x17104  ; RV32I-NEXT:   [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)105  ; RV32I-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1106  ; RV32I-NEXT:   [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0) from %fixed-stack.1, align 16)107  ; RV32I-NEXT:   [[LOAD1:%[0-9]+]]:_(s128) = G_LOAD [[LOAD]](p0) :: (load (s128), align 8)108  ; RV32I-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0109  ; RV32I-NEXT:   [[LOAD2:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.0)110  ; RV32I-NEXT:   [[LOAD3:%[0-9]+]]:_(s128) = G_LOAD [[LOAD2]](p0) :: (load (s128), align 8)111  ; RV32I-NEXT:   [[ADD:%[0-9]+]]:_(s128) = G_ADD [[LOAD1]], [[LOAD3]]112  ; RV32I-NEXT:   [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[ADD]](s128)113  ; RV32I-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[TRUNC]](s64)114  ; RV32I-NEXT:   $x10 = COPY [[UV]](s32)115  ; RV32I-NEXT:   $x11 = COPY [[UV1]](s32)116  ; RV32I-NEXT:   PseudoRET implicit $x10, implicit $x11117  %1 = add i128 %y, %y2118  %2 = trunc i128 %1 to i64119  ret i64 %2120}121 122define i32 @callee_128i_indirect_refernce_in_stack( ) {123  ; ILP32-LABEL: name: callee_128i_indirect_refernce_in_stack124  ; ILP32: bb.1 (%ir-block.0):125  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1126  ; ILP32-NEXT:   [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2127  ; ILP32-NEXT:   [[C2:%[0-9]+]]:_(s128) = G_CONSTANT i128 42128  ; ILP32-NEXT:   ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2129  ; ILP32-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)130  ; ILP32-NEXT:   [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)131  ; ILP32-NEXT:   [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)132  ; ILP32-NEXT:   [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)133  ; ILP32-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0134  ; ILP32-NEXT:   G_STORE [[C1]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)135  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2136  ; ILP32-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0137  ; ILP32-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C3]](s32)138  ; ILP32-NEXT:   G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD]](p0) :: (store (p0) into stack, align 16)139  ; ILP32-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1140  ; ILP32-NEXT:   G_STORE [[C2]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)141  ; ILP32-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4142  ; ILP32-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C4]](s32)143  ; ILP32-NEXT:   G_STORE [[FRAME_INDEX1]](p0), [[PTR_ADD1]](p0) :: (store (p0) into stack + 4)144  ; ILP32-NEXT:   $x10 = COPY [[UV]](s32)145  ; ILP32-NEXT:   $x11 = COPY [[UV1]](s32)146  ; ILP32-NEXT:   $x12 = COPY [[UV2]](s32)147  ; ILP32-NEXT:   $x13 = COPY [[UV3]](s32)148  ; ILP32-NEXT:   $x14 = COPY [[UV4]](s32)149  ; ILP32-NEXT:   $x15 = COPY [[UV5]](s32)150  ; ILP32-NEXT:   $x16 = COPY [[UV6]](s32)151  ; ILP32-NEXT:   $x17 = COPY [[UV7]](s32)152  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11153  ; ILP32-NEXT:   ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2154  ; ILP32-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x10155  ; ILP32-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x11156  ; ILP32-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)157  ; ILP32-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)158  ; ILP32-NEXT:   $x10 = COPY [[TRUNC]](s32)159  ; ILP32-NEXT:   PseudoRET implicit $x10160  ;161  ; ILP32F-LABEL: name: callee_128i_indirect_refernce_in_stack162  ; ILP32F: bb.1 (%ir-block.0):163  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1164  ; ILP32F-NEXT:   [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2165  ; ILP32F-NEXT:   [[C2:%[0-9]+]]:_(s128) = G_CONSTANT i128 42166  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2167  ; ILP32F-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)168  ; ILP32F-NEXT:   [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)169  ; ILP32F-NEXT:   [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)170  ; ILP32F-NEXT:   [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)171  ; ILP32F-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0172  ; ILP32F-NEXT:   G_STORE [[C1]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)173  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2174  ; ILP32F-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0175  ; ILP32F-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C3]](s32)176  ; ILP32F-NEXT:   G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD]](p0) :: (store (p0) into stack, align 16)177  ; ILP32F-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1178  ; ILP32F-NEXT:   G_STORE [[C2]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)179  ; ILP32F-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4180  ; ILP32F-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C4]](s32)181  ; ILP32F-NEXT:   G_STORE [[FRAME_INDEX1]](p0), [[PTR_ADD1]](p0) :: (store (p0) into stack + 4)182  ; ILP32F-NEXT:   $x10 = COPY [[UV]](s32)183  ; ILP32F-NEXT:   $x11 = COPY [[UV1]](s32)184  ; ILP32F-NEXT:   $x12 = COPY [[UV2]](s32)185  ; ILP32F-NEXT:   $x13 = COPY [[UV3]](s32)186  ; ILP32F-NEXT:   $x14 = COPY [[UV4]](s32)187  ; ILP32F-NEXT:   $x15 = COPY [[UV5]](s32)188  ; ILP32F-NEXT:   $x16 = COPY [[UV6]](s32)189  ; ILP32F-NEXT:   $x17 = COPY [[UV7]](s32)190  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11191  ; ILP32F-NEXT:   ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2192  ; ILP32F-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x10193  ; ILP32F-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x11194  ; ILP32F-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)195  ; ILP32F-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)196  ; ILP32F-NEXT:   $x10 = COPY [[TRUNC]](s32)197  ; ILP32F-NEXT:   PseudoRET implicit $x10198  ;199  ; ILP32D-LABEL: name: callee_128i_indirect_refernce_in_stack200  ; ILP32D: bb.1 (%ir-block.0):201  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1202  ; ILP32D-NEXT:   [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2203  ; ILP32D-NEXT:   [[C2:%[0-9]+]]:_(s128) = G_CONSTANT i128 42204  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2205  ; ILP32D-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)206  ; ILP32D-NEXT:   [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)207  ; ILP32D-NEXT:   [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)208  ; ILP32D-NEXT:   [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)209  ; ILP32D-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0210  ; ILP32D-NEXT:   G_STORE [[C1]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)211  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2212  ; ILP32D-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0213  ; ILP32D-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C3]](s32)214  ; ILP32D-NEXT:   G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD]](p0) :: (store (p0) into stack, align 16)215  ; ILP32D-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1216  ; ILP32D-NEXT:   G_STORE [[C2]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)217  ; ILP32D-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4218  ; ILP32D-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C4]](s32)219  ; ILP32D-NEXT:   G_STORE [[FRAME_INDEX1]](p0), [[PTR_ADD1]](p0) :: (store (p0) into stack + 4)220  ; ILP32D-NEXT:   $x10 = COPY [[UV]](s32)221  ; ILP32D-NEXT:   $x11 = COPY [[UV1]](s32)222  ; ILP32D-NEXT:   $x12 = COPY [[UV2]](s32)223  ; ILP32D-NEXT:   $x13 = COPY [[UV3]](s32)224  ; ILP32D-NEXT:   $x14 = COPY [[UV4]](s32)225  ; ILP32D-NEXT:   $x15 = COPY [[UV5]](s32)226  ; ILP32D-NEXT:   $x16 = COPY [[UV6]](s32)227  ; ILP32D-NEXT:   $x17 = COPY [[UV7]](s32)228  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11229  ; ILP32D-NEXT:   ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2230  ; ILP32D-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x10231  ; ILP32D-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x11232  ; ILP32D-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)233  ; ILP32D-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)234  ; ILP32D-NEXT:   $x10 = COPY [[TRUNC]](s32)235  ; ILP32D-NEXT:   PseudoRET implicit $x10236  %1 = call i64 @callee_128i_indirect_reference_in_stack(i64 1,i64 1, i64 1, i64 1, i128 2, i128 42)237  %2 = trunc i64 %1 to i32238  ret i32 %2239}240 241define i64 @callee_128i_indirect_reference_in_stack_not_first(i64 %x0, i64 %x1, i64 %x2, i64 %x4, i64 %x5, i64 %x6, i64 %x7, i64 %x8, i128 %y ) {242  ; RV32I-LABEL: name: callee_128i_indirect_reference_in_stack_not_first243  ; RV32I: bb.1 (%ir-block.0):244  ; RV32I-NEXT:   liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17245  ; RV32I-NEXT: {{  $}}246  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10247  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x11248  ; RV32I-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)249  ; RV32I-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x12250  ; RV32I-NEXT:   [[COPY3:%[0-9]+]]:_(s32) = COPY $x13251  ; RV32I-NEXT:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)252  ; RV32I-NEXT:   [[COPY4:%[0-9]+]]:_(s32) = COPY $x14253  ; RV32I-NEXT:   [[COPY5:%[0-9]+]]:_(s32) = COPY $x15254  ; RV32I-NEXT:   [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)255  ; RV32I-NEXT:   [[COPY6:%[0-9]+]]:_(s32) = COPY $x16256  ; RV32I-NEXT:   [[COPY7:%[0-9]+]]:_(s32) = COPY $x17257  ; RV32I-NEXT:   [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY6]](s32), [[COPY7]](s32)258  ; RV32I-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.8259  ; RV32I-NEXT:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.8, align 16)260  ; RV32I-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.7261  ; RV32I-NEXT:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.7)262  ; RV32I-NEXT:   [[MV4:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD]](s32), [[LOAD1]](s32)263  ; RV32I-NEXT:   [[FRAME_INDEX2:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.6264  ; RV32I-NEXT:   [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (s32) from %fixed-stack.6, align 8)265  ; RV32I-NEXT:   [[FRAME_INDEX3:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.5266  ; RV32I-NEXT:   [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX3]](p0) :: (load (s32) from %fixed-stack.5)267  ; RV32I-NEXT:   [[MV5:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD2]](s32), [[LOAD3]](s32)268  ; RV32I-NEXT:   [[FRAME_INDEX4:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.4269  ; RV32I-NEXT:   [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX4]](p0) :: (load (s32) from %fixed-stack.4, align 16)270  ; RV32I-NEXT:   [[FRAME_INDEX5:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.3271  ; RV32I-NEXT:   [[LOAD5:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX5]](p0) :: (load (s32) from %fixed-stack.3)272  ; RV32I-NEXT:   [[MV6:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD4]](s32), [[LOAD5]](s32)273  ; RV32I-NEXT:   [[FRAME_INDEX6:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.2274  ; RV32I-NEXT:   [[LOAD6:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX6]](p0) :: (load (s32) from %fixed-stack.2, align 8)275  ; RV32I-NEXT:   [[FRAME_INDEX7:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1276  ; RV32I-NEXT:   [[LOAD7:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX7]](p0) :: (load (s32) from %fixed-stack.1)277  ; RV32I-NEXT:   [[MV7:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD6]](s32), [[LOAD7]](s32)278  ; RV32I-NEXT:   [[FRAME_INDEX8:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0279  ; RV32I-NEXT:   [[LOAD8:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX8]](p0) :: (load (p0) from %fixed-stack.0, align 16)280  ; RV32I-NEXT:   [[LOAD9:%[0-9]+]]:_(s128) = G_LOAD [[LOAD8]](p0) :: (load (s128), align 8)281  ; RV32I-NEXT:   [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[LOAD9]](s128)282  ; RV32I-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[TRUNC]](s64)283  ; RV32I-NEXT:   $x10 = COPY [[UV]](s32)284  ; RV32I-NEXT:   $x11 = COPY [[UV1]](s32)285  ; RV32I-NEXT:   PseudoRET implicit $x10, implicit $x11286  %2 = trunc i128 %y to i64287  ret i64 %2288}289 290define i32 @caller_128i_indirect_reference_in_stack_not_first() {291  ; ILP32-LABEL: name: caller_128i_indirect_reference_in_stack_not_first292  ; ILP32: bb.1 (%ir-block.0):293  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0294  ; ILP32-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1295  ; ILP32-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2296  ; ILP32-NEXT:   [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3297  ; ILP32-NEXT:   [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4298  ; ILP32-NEXT:   [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 5299  ; ILP32-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 6300  ; ILP32-NEXT:   [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 7301  ; ILP32-NEXT:   [[C8:%[0-9]+]]:_(s128) = G_CONSTANT i128 42302  ; ILP32-NEXT:   ADJCALLSTACKDOWN 36, 0, implicit-def $x2, implicit $x2303  ; ILP32-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)304  ; ILP32-NEXT:   [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)305  ; ILP32-NEXT:   [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C2]](s64)306  ; ILP32-NEXT:   [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)307  ; ILP32-NEXT:   [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C4]](s64)308  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2309  ; ILP32-NEXT:   [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 0310  ; ILP32-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)311  ; ILP32-NEXT:   G_STORE [[UV8]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)312  ; ILP32-NEXT:   [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 4313  ; ILP32-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C10]](s32)314  ; ILP32-NEXT:   G_STORE [[UV9]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)315  ; ILP32-NEXT:   [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C5]](s64)316  ; ILP32-NEXT:   [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 8317  ; ILP32-NEXT:   [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C11]](s32)318  ; ILP32-NEXT:   G_STORE [[UV10]](s32), [[PTR_ADD2]](p0) :: (store (s32) into stack + 8, align 8)319  ; ILP32-NEXT:   [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 12320  ; ILP32-NEXT:   [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C12]](s32)321  ; ILP32-NEXT:   G_STORE [[UV11]](s32), [[PTR_ADD3]](p0) :: (store (s32) into stack + 12)322  ; ILP32-NEXT:   [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)323  ; ILP32-NEXT:   [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 16324  ; ILP32-NEXT:   [[PTR_ADD4:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C13]](s32)325  ; ILP32-NEXT:   G_STORE [[UV12]](s32), [[PTR_ADD4]](p0) :: (store (s32) into stack + 16, align 16)326  ; ILP32-NEXT:   [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 20327  ; ILP32-NEXT:   [[PTR_ADD5:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C14]](s32)328  ; ILP32-NEXT:   G_STORE [[UV13]](s32), [[PTR_ADD5]](p0) :: (store (s32) into stack + 20)329  ; ILP32-NEXT:   [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C7]](s64)330  ; ILP32-NEXT:   [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 24331  ; ILP32-NEXT:   [[PTR_ADD6:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C15]](s32)332  ; ILP32-NEXT:   G_STORE [[UV14]](s32), [[PTR_ADD6]](p0) :: (store (s32) into stack + 24, align 8)333  ; ILP32-NEXT:   [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 28334  ; ILP32-NEXT:   [[PTR_ADD7:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C16]](s32)335  ; ILP32-NEXT:   G_STORE [[UV15]](s32), [[PTR_ADD7]](p0) :: (store (s32) into stack + 28)336  ; ILP32-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0337  ; ILP32-NEXT:   G_STORE [[C8]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)338  ; ILP32-NEXT:   [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 32339  ; ILP32-NEXT:   [[PTR_ADD8:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C17]](s32)340  ; ILP32-NEXT:   G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD8]](p0) :: (store (p0) into stack + 32, align 16)341  ; ILP32-NEXT:   $x10 = COPY [[UV]](s32)342  ; ILP32-NEXT:   $x11 = COPY [[UV1]](s32)343  ; ILP32-NEXT:   $x12 = COPY [[UV2]](s32)344  ; ILP32-NEXT:   $x13 = COPY [[UV3]](s32)345  ; ILP32-NEXT:   $x14 = COPY [[UV4]](s32)346  ; ILP32-NEXT:   $x15 = COPY [[UV5]](s32)347  ; ILP32-NEXT:   $x16 = COPY [[UV6]](s32)348  ; ILP32-NEXT:   $x17 = COPY [[UV7]](s32)349  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack_not_first, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11350  ; ILP32-NEXT:   ADJCALLSTACKUP 36, 0, implicit-def $x2, implicit $x2351  ; ILP32-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x10352  ; ILP32-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x11353  ; ILP32-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)354  ; ILP32-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)355  ; ILP32-NEXT:   $x10 = COPY [[TRUNC]](s32)356  ; ILP32-NEXT:   PseudoRET implicit $x10357  ;358  ; ILP32F-LABEL: name: caller_128i_indirect_reference_in_stack_not_first359  ; ILP32F: bb.1 (%ir-block.0):360  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0361  ; ILP32F-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1362  ; ILP32F-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2363  ; ILP32F-NEXT:   [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3364  ; ILP32F-NEXT:   [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4365  ; ILP32F-NEXT:   [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 5366  ; ILP32F-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 6367  ; ILP32F-NEXT:   [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 7368  ; ILP32F-NEXT:   [[C8:%[0-9]+]]:_(s128) = G_CONSTANT i128 42369  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 36, 0, implicit-def $x2, implicit $x2370  ; ILP32F-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)371  ; ILP32F-NEXT:   [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)372  ; ILP32F-NEXT:   [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C2]](s64)373  ; ILP32F-NEXT:   [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)374  ; ILP32F-NEXT:   [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C4]](s64)375  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2376  ; ILP32F-NEXT:   [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 0377  ; ILP32F-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)378  ; ILP32F-NEXT:   G_STORE [[UV8]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)379  ; ILP32F-NEXT:   [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 4380  ; ILP32F-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C10]](s32)381  ; ILP32F-NEXT:   G_STORE [[UV9]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)382  ; ILP32F-NEXT:   [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C5]](s64)383  ; ILP32F-NEXT:   [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 8384  ; ILP32F-NEXT:   [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C11]](s32)385  ; ILP32F-NEXT:   G_STORE [[UV10]](s32), [[PTR_ADD2]](p0) :: (store (s32) into stack + 8, align 8)386  ; ILP32F-NEXT:   [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 12387  ; ILP32F-NEXT:   [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C12]](s32)388  ; ILP32F-NEXT:   G_STORE [[UV11]](s32), [[PTR_ADD3]](p0) :: (store (s32) into stack + 12)389  ; ILP32F-NEXT:   [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)390  ; ILP32F-NEXT:   [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 16391  ; ILP32F-NEXT:   [[PTR_ADD4:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C13]](s32)392  ; ILP32F-NEXT:   G_STORE [[UV12]](s32), [[PTR_ADD4]](p0) :: (store (s32) into stack + 16, align 16)393  ; ILP32F-NEXT:   [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 20394  ; ILP32F-NEXT:   [[PTR_ADD5:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C14]](s32)395  ; ILP32F-NEXT:   G_STORE [[UV13]](s32), [[PTR_ADD5]](p0) :: (store (s32) into stack + 20)396  ; ILP32F-NEXT:   [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C7]](s64)397  ; ILP32F-NEXT:   [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 24398  ; ILP32F-NEXT:   [[PTR_ADD6:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C15]](s32)399  ; ILP32F-NEXT:   G_STORE [[UV14]](s32), [[PTR_ADD6]](p0) :: (store (s32) into stack + 24, align 8)400  ; ILP32F-NEXT:   [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 28401  ; ILP32F-NEXT:   [[PTR_ADD7:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C16]](s32)402  ; ILP32F-NEXT:   G_STORE [[UV15]](s32), [[PTR_ADD7]](p0) :: (store (s32) into stack + 28)403  ; ILP32F-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0404  ; ILP32F-NEXT:   G_STORE [[C8]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)405  ; ILP32F-NEXT:   [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 32406  ; ILP32F-NEXT:   [[PTR_ADD8:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C17]](s32)407  ; ILP32F-NEXT:   G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD8]](p0) :: (store (p0) into stack + 32, align 16)408  ; ILP32F-NEXT:   $x10 = COPY [[UV]](s32)409  ; ILP32F-NEXT:   $x11 = COPY [[UV1]](s32)410  ; ILP32F-NEXT:   $x12 = COPY [[UV2]](s32)411  ; ILP32F-NEXT:   $x13 = COPY [[UV3]](s32)412  ; ILP32F-NEXT:   $x14 = COPY [[UV4]](s32)413  ; ILP32F-NEXT:   $x15 = COPY [[UV5]](s32)414  ; ILP32F-NEXT:   $x16 = COPY [[UV6]](s32)415  ; ILP32F-NEXT:   $x17 = COPY [[UV7]](s32)416  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack_not_first, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11417  ; ILP32F-NEXT:   ADJCALLSTACKUP 36, 0, implicit-def $x2, implicit $x2418  ; ILP32F-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x10419  ; ILP32F-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x11420  ; ILP32F-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)421  ; ILP32F-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)422  ; ILP32F-NEXT:   $x10 = COPY [[TRUNC]](s32)423  ; ILP32F-NEXT:   PseudoRET implicit $x10424  ;425  ; ILP32D-LABEL: name: caller_128i_indirect_reference_in_stack_not_first426  ; ILP32D: bb.1 (%ir-block.0):427  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0428  ; ILP32D-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1429  ; ILP32D-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2430  ; ILP32D-NEXT:   [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3431  ; ILP32D-NEXT:   [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 4432  ; ILP32D-NEXT:   [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 5433  ; ILP32D-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 6434  ; ILP32D-NEXT:   [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 7435  ; ILP32D-NEXT:   [[C8:%[0-9]+]]:_(s128) = G_CONSTANT i128 42436  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 36, 0, implicit-def $x2, implicit $x2437  ; ILP32D-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)438  ; ILP32D-NEXT:   [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C1]](s64)439  ; ILP32D-NEXT:   [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C2]](s64)440  ; ILP32D-NEXT:   [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)441  ; ILP32D-NEXT:   [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C4]](s64)442  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2443  ; ILP32D-NEXT:   [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 0444  ; ILP32D-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)445  ; ILP32D-NEXT:   G_STORE [[UV8]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)446  ; ILP32D-NEXT:   [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 4447  ; ILP32D-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C10]](s32)448  ; ILP32D-NEXT:   G_STORE [[UV9]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)449  ; ILP32D-NEXT:   [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C5]](s64)450  ; ILP32D-NEXT:   [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 8451  ; ILP32D-NEXT:   [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C11]](s32)452  ; ILP32D-NEXT:   G_STORE [[UV10]](s32), [[PTR_ADD2]](p0) :: (store (s32) into stack + 8, align 8)453  ; ILP32D-NEXT:   [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 12454  ; ILP32D-NEXT:   [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C12]](s32)455  ; ILP32D-NEXT:   G_STORE [[UV11]](s32), [[PTR_ADD3]](p0) :: (store (s32) into stack + 12)456  ; ILP32D-NEXT:   [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)457  ; ILP32D-NEXT:   [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 16458  ; ILP32D-NEXT:   [[PTR_ADD4:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C13]](s32)459  ; ILP32D-NEXT:   G_STORE [[UV12]](s32), [[PTR_ADD4]](p0) :: (store (s32) into stack + 16, align 16)460  ; ILP32D-NEXT:   [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 20461  ; ILP32D-NEXT:   [[PTR_ADD5:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C14]](s32)462  ; ILP32D-NEXT:   G_STORE [[UV13]](s32), [[PTR_ADD5]](p0) :: (store (s32) into stack + 20)463  ; ILP32D-NEXT:   [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C7]](s64)464  ; ILP32D-NEXT:   [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 24465  ; ILP32D-NEXT:   [[PTR_ADD6:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C15]](s32)466  ; ILP32D-NEXT:   G_STORE [[UV14]](s32), [[PTR_ADD6]](p0) :: (store (s32) into stack + 24, align 8)467  ; ILP32D-NEXT:   [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 28468  ; ILP32D-NEXT:   [[PTR_ADD7:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C16]](s32)469  ; ILP32D-NEXT:   G_STORE [[UV15]](s32), [[PTR_ADD7]](p0) :: (store (s32) into stack + 28)470  ; ILP32D-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0471  ; ILP32D-NEXT:   G_STORE [[C8]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)472  ; ILP32D-NEXT:   [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 32473  ; ILP32D-NEXT:   [[PTR_ADD8:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C17]](s32)474  ; ILP32D-NEXT:   G_STORE [[FRAME_INDEX]](p0), [[PTR_ADD8]](p0) :: (store (p0) into stack + 32, align 16)475  ; ILP32D-NEXT:   $x10 = COPY [[UV]](s32)476  ; ILP32D-NEXT:   $x11 = COPY [[UV1]](s32)477  ; ILP32D-NEXT:   $x12 = COPY [[UV2]](s32)478  ; ILP32D-NEXT:   $x13 = COPY [[UV3]](s32)479  ; ILP32D-NEXT:   $x14 = COPY [[UV4]](s32)480  ; ILP32D-NEXT:   $x15 = COPY [[UV5]](s32)481  ; ILP32D-NEXT:   $x16 = COPY [[UV6]](s32)482  ; ILP32D-NEXT:   $x17 = COPY [[UV7]](s32)483  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_stack_not_first, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10, implicit-def $x11484  ; ILP32D-NEXT:   ADJCALLSTACKUP 36, 0, implicit-def $x2, implicit $x2485  ; ILP32D-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x10486  ; ILP32D-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x11487  ; ILP32D-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)488  ; ILP32D-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)489  ; ILP32D-NEXT:   $x10 = COPY [[TRUNC]](s32)490  ; ILP32D-NEXT:   PseudoRET implicit $x10491  %1 = call i64 @callee_128i_indirect_reference_in_stack_not_first(i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i128 42)492  %2 = trunc i64 %1 to i32493  ret i32 %2494}495 496 497define i64 @callee_128i_indirect_reference_in_regs(i128 %x, i128 %y ) {498  ; RV32I-LABEL: name: callee_128i_indirect_reference_in_regs499  ; RV32I: bb.1 (%ir-block.0):500  ; RV32I-NEXT:   liveins: $x10, $x11501  ; RV32I-NEXT: {{  $}}502  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x10503  ; RV32I-NEXT:   [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p0) :: (load (s128), align 8)504  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(p0) = COPY $x11505  ; RV32I-NEXT:   [[LOAD1:%[0-9]+]]:_(s128) = G_LOAD [[COPY1]](p0) :: (load (s128), align 8)506  ; RV32I-NEXT:   [[ADD:%[0-9]+]]:_(s128) = G_ADD [[LOAD]], [[LOAD1]]507  ; RV32I-NEXT:   [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[LOAD]](s128)508  ; RV32I-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[TRUNC]](s64)509  ; RV32I-NEXT:   $x10 = COPY [[UV]](s32)510  ; RV32I-NEXT:   $x11 = COPY [[UV1]](s32)511  ; RV32I-NEXT:   PseudoRET implicit $x10, implicit $x11512  %1 = add i128 %x, %y513  %2 = trunc i128 %x to i64514  ret i64 %2515}516 517define i32 @caller_128i_indirect_reference_in_regs( ) {518  ; ILP32-LABEL: name: caller_128i_indirect_reference_in_regs519  ; ILP32: bb.1 (%ir-block.0):520  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1521  ; ILP32-NEXT:   [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2522  ; ILP32-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2523  ; ILP32-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0524  ; ILP32-NEXT:   G_STORE [[C]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)525  ; ILP32-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1526  ; ILP32-NEXT:   G_STORE [[C1]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)527  ; ILP32-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)528  ; ILP32-NEXT:   $x11 = COPY [[FRAME_INDEX1]](p0)529  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11530  ; ILP32-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2531  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10532  ; ILP32-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x11533  ; ILP32-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)534  ; ILP32-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)535  ; ILP32-NEXT:   $x10 = COPY [[TRUNC]](s32)536  ; ILP32-NEXT:   PseudoRET implicit $x10537  ;538  ; ILP32F-LABEL: name: caller_128i_indirect_reference_in_regs539  ; ILP32F: bb.1 (%ir-block.0):540  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1541  ; ILP32F-NEXT:   [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2542  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2543  ; ILP32F-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0544  ; ILP32F-NEXT:   G_STORE [[C]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)545  ; ILP32F-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1546  ; ILP32F-NEXT:   G_STORE [[C1]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)547  ; ILP32F-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)548  ; ILP32F-NEXT:   $x11 = COPY [[FRAME_INDEX1]](p0)549  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11550  ; ILP32F-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2551  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10552  ; ILP32F-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x11553  ; ILP32F-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)554  ; ILP32F-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)555  ; ILP32F-NEXT:   $x10 = COPY [[TRUNC]](s32)556  ; ILP32F-NEXT:   PseudoRET implicit $x10557  ;558  ; ILP32D-LABEL: name: caller_128i_indirect_reference_in_regs559  ; ILP32D: bb.1 (%ir-block.0):560  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1561  ; ILP32D-NEXT:   [[C1:%[0-9]+]]:_(s128) = G_CONSTANT i128 2562  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2563  ; ILP32D-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0564  ; ILP32D-NEXT:   G_STORE [[C]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)565  ; ILP32D-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1566  ; ILP32D-NEXT:   G_STORE [[C1]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1, align 8)567  ; ILP32D-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)568  ; ILP32D-NEXT:   $x11 = COPY [[FRAME_INDEX1]](p0)569  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_128i_indirect_reference_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11570  ; ILP32D-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2571  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10572  ; ILP32D-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x11573  ; ILP32D-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)574  ; ILP32D-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)575  ; ILP32D-NEXT:   $x10 = COPY [[TRUNC]](s32)576  ; ILP32D-NEXT:   PseudoRET implicit $x10577  %1 = call i64 @callee_128i_indirect_reference_in_regs(i128 1, i128 2)578  %2 = trunc i64 %1 to i32579  ret i32 %2580}581 582define i64 @callee_256i_indirect_reference_in_regs(i256 %x, i256 %y ) {583 584  ; RV32I-LABEL: name: callee_256i_indirect_reference_in_regs585  ; RV32I: bb.1 (%ir-block.0):586  ; RV32I-NEXT:   liveins: $x10, $x11587  ; RV32I-NEXT: {{  $}}588  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x10589  ; RV32I-NEXT:   [[LOAD:%[0-9]+]]:_(s256) = G_LOAD [[COPY]](p0) :: (load (s256), align 8)590  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(p0) = COPY $x11591  ; RV32I-NEXT:   [[LOAD1:%[0-9]+]]:_(s256) = G_LOAD [[COPY1]](p0) :: (load (s256), align 8)592  ; RV32I-NEXT:   [[ADD:%[0-9]+]]:_(s256) = G_ADD [[LOAD]], [[LOAD1]]593  ; RV32I-NEXT:   [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[LOAD]](s256)594  ; RV32I-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[TRUNC]](s64)595  ; RV32I-NEXT:   $x10 = COPY [[UV]](s32)596  ; RV32I-NEXT:   $x11 = COPY [[UV1]](s32)597  ; RV32I-NEXT:   PseudoRET implicit $x10, implicit $x11598  %1 = add i256 %x, %y599  %2 = trunc i256 %x to i64600  ret i64 %2601}602 603define i32 @caller_256i_indirect_reference_in_regs( ) {604  ; ILP32-LABEL: name: caller_256i_indirect_reference_in_regs605  ; ILP32: bb.1 (%ir-block.0):606  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s256) = G_CONSTANT i256 1607  ; ILP32-NEXT:   [[C1:%[0-9]+]]:_(s256) = G_CONSTANT i256 2608  ; ILP32-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2609  ; ILP32-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0610  ; ILP32-NEXT:   G_STORE [[C]](s256), [[FRAME_INDEX]](p0) :: (store (s256) into %stack.0, align 8)611  ; ILP32-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1612  ; ILP32-NEXT:   G_STORE [[C1]](s256), [[FRAME_INDEX1]](p0) :: (store (s256) into %stack.1, align 8)613  ; ILP32-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)614  ; ILP32-NEXT:   $x11 = COPY [[FRAME_INDEX1]](p0)615  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_256i_indirect_reference_in_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11616  ; ILP32-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2617  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10618  ; ILP32-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x11619  ; ILP32-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)620  ; ILP32-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)621  ; ILP32-NEXT:   $x10 = COPY [[TRUNC]](s32)622  ; ILP32-NEXT:   PseudoRET implicit $x10623  ;624  ; ILP32F-LABEL: name: caller_256i_indirect_reference_in_regs625  ; ILP32F: bb.1 (%ir-block.0):626  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s256) = G_CONSTANT i256 1627  ; ILP32F-NEXT:   [[C1:%[0-9]+]]:_(s256) = G_CONSTANT i256 2628  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2629  ; ILP32F-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0630  ; ILP32F-NEXT:   G_STORE [[C]](s256), [[FRAME_INDEX]](p0) :: (store (s256) into %stack.0, align 8)631  ; ILP32F-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1632  ; ILP32F-NEXT:   G_STORE [[C1]](s256), [[FRAME_INDEX1]](p0) :: (store (s256) into %stack.1, align 8)633  ; ILP32F-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)634  ; ILP32F-NEXT:   $x11 = COPY [[FRAME_INDEX1]](p0)635  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_256i_indirect_reference_in_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11636  ; ILP32F-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2637  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10638  ; ILP32F-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x11639  ; ILP32F-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)640  ; ILP32F-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)641  ; ILP32F-NEXT:   $x10 = COPY [[TRUNC]](s32)642  ; ILP32F-NEXT:   PseudoRET implicit $x10643  ;644  ; ILP32D-LABEL: name: caller_256i_indirect_reference_in_regs645  ; ILP32D: bb.1 (%ir-block.0):646  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s256) = G_CONSTANT i256 1647  ; ILP32D-NEXT:   [[C1:%[0-9]+]]:_(s256) = G_CONSTANT i256 2648  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2649  ; ILP32D-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0650  ; ILP32D-NEXT:   G_STORE [[C]](s256), [[FRAME_INDEX]](p0) :: (store (s256) into %stack.0, align 8)651  ; ILP32D-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1652  ; ILP32D-NEXT:   G_STORE [[C1]](s256), [[FRAME_INDEX1]](p0) :: (store (s256) into %stack.1, align 8)653  ; ILP32D-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)654  ; ILP32D-NEXT:   $x11 = COPY [[FRAME_INDEX1]](p0)655  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_256i_indirect_reference_in_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10, implicit-def $x11656  ; ILP32D-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2657  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10658  ; ILP32D-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x11659  ; ILP32D-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)660  ; ILP32D-NEXT:   [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[MV]](s64)661  ; ILP32D-NEXT:   $x10 = COPY [[TRUNC]](s32)662  ; ILP32D-NEXT:   PseudoRET implicit $x10663  %1 = call i64 @callee_256i_indirect_reference_in_regs(i256 1, i256 2)664  %2 = trunc i64 %1 to i32665  ret i32 %2666}667 668; Check that the stack is used once the GPRs are exhausted669 670define i32 @callee_many_scalars(i8 %a, i16 %b, i32 %c, i64 %d, i32 %e, i32 %f, i64 %g, i32 %h) nounwind {671  ; RV32I-LABEL: name: callee_many_scalars672  ; RV32I: bb.1 (%ir-block.0):673  ; RV32I-NEXT:   liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17674  ; RV32I-NEXT: {{  $}}675  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10676  ; RV32I-NEXT:   [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)677  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x11678  ; RV32I-NEXT:   [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)679  ; RV32I-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x12680  ; RV32I-NEXT:   [[COPY3:%[0-9]+]]:_(s32) = COPY $x13681  ; RV32I-NEXT:   [[COPY4:%[0-9]+]]:_(s32) = COPY $x14682  ; RV32I-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY3]](s32), [[COPY4]](s32)683  ; RV32I-NEXT:   [[COPY5:%[0-9]+]]:_(s32) = COPY $x15684  ; RV32I-NEXT:   [[COPY6:%[0-9]+]]:_(s32) = COPY $x16685  ; RV32I-NEXT:   [[COPY7:%[0-9]+]]:_(s32) = COPY $x17686  ; RV32I-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1687  ; RV32I-NEXT:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.1, align 16)688  ; RV32I-NEXT:   [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY7]](s32), [[LOAD]](s32)689  ; RV32I-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0690  ; RV32I-NEXT:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.0)691  ; RV32I-NEXT:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC]](s8)692  ; RV32I-NEXT:   [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC1]](s16)693  ; RV32I-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[ZEXT]], [[ZEXT1]]694  ; RV32I-NEXT:   [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[COPY2]]695  ; RV32I-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[MV]](s64), [[MV1]]696  ; RV32I-NEXT:   [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)697  ; RV32I-NEXT:   [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[ZEXT2]], [[ADD1]]698  ; RV32I-NEXT:   [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[ADD2]], [[COPY5]]699  ; RV32I-NEXT:   [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[ADD3]], [[COPY6]]700  ; RV32I-NEXT:   [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[ADD4]], [[LOAD1]]701  ; RV32I-NEXT:   $x10 = COPY [[ADD5]](s32)702  ; RV32I-NEXT:   PseudoRET implicit $x10703  %a_ext = zext i8 %a to i32704  %b_ext = zext i16 %b to i32705  %1 = add i32 %a_ext, %b_ext706  %2 = add i32 %1, %c707  %3 = icmp eq i64 %d, %g708  %4 = zext i1 %3 to i32709  %5 = add i32 %4, %2710  %6 = add i32 %5, %e711  %7 = add i32 %6, %f712  %8 = add i32 %7, %h713  ret i32 %8714}715 716define i32 @caller_many_scalars() nounwind {717  ; ILP32-LABEL: name: caller_many_scalars718  ; ILP32: bb.1 (%ir-block.0):719  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1720  ; ILP32-NEXT:   [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 2721  ; ILP32-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3722  ; ILP32-NEXT:   [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4723  ; ILP32-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5724  ; ILP32-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6725  ; ILP32-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7726  ; ILP32-NEXT:   [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 8727  ; ILP32-NEXT:   ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2728  ; ILP32-NEXT:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s8)729  ; ILP32-NEXT:   [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[C1]](s16)730  ; ILP32-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)731  ; ILP32-NEXT:   [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)732  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2733  ; ILP32-NEXT:   [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0734  ; ILP32-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C8]](s32)735  ; ILP32-NEXT:   G_STORE [[UV3]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)736  ; ILP32-NEXT:   [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 4737  ; ILP32-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)738  ; ILP32-NEXT:   G_STORE [[C7]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)739  ; ILP32-NEXT:   $x10 = COPY [[ANYEXT]](s32)740  ; ILP32-NEXT:   $x11 = COPY [[ANYEXT1]](s32)741  ; ILP32-NEXT:   $x12 = COPY [[C2]](s32)742  ; ILP32-NEXT:   $x13 = COPY [[UV]](s32)743  ; ILP32-NEXT:   $x14 = COPY [[UV1]](s32)744  ; ILP32-NEXT:   $x15 = COPY [[C4]](s32)745  ; ILP32-NEXT:   $x16 = COPY [[C5]](s32)746  ; ILP32-NEXT:   $x17 = COPY [[UV2]](s32)747  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10748  ; ILP32-NEXT:   ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2749  ; ILP32-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x10750  ; ILP32-NEXT:   $x10 = COPY [[COPY1]](s32)751  ; ILP32-NEXT:   PseudoRET implicit $x10752  ;753  ; ILP32F-LABEL: name: caller_many_scalars754  ; ILP32F: bb.1 (%ir-block.0):755  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1756  ; ILP32F-NEXT:   [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 2757  ; ILP32F-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3758  ; ILP32F-NEXT:   [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4759  ; ILP32F-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5760  ; ILP32F-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6761  ; ILP32F-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7762  ; ILP32F-NEXT:   [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 8763  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2764  ; ILP32F-NEXT:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s8)765  ; ILP32F-NEXT:   [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[C1]](s16)766  ; ILP32F-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)767  ; ILP32F-NEXT:   [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)768  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2769  ; ILP32F-NEXT:   [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0770  ; ILP32F-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C8]](s32)771  ; ILP32F-NEXT:   G_STORE [[UV3]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)772  ; ILP32F-NEXT:   [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 4773  ; ILP32F-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)774  ; ILP32F-NEXT:   G_STORE [[C7]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)775  ; ILP32F-NEXT:   $x10 = COPY [[ANYEXT]](s32)776  ; ILP32F-NEXT:   $x11 = COPY [[ANYEXT1]](s32)777  ; ILP32F-NEXT:   $x12 = COPY [[C2]](s32)778  ; ILP32F-NEXT:   $x13 = COPY [[UV]](s32)779  ; ILP32F-NEXT:   $x14 = COPY [[UV1]](s32)780  ; ILP32F-NEXT:   $x15 = COPY [[C4]](s32)781  ; ILP32F-NEXT:   $x16 = COPY [[C5]](s32)782  ; ILP32F-NEXT:   $x17 = COPY [[UV2]](s32)783  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10784  ; ILP32F-NEXT:   ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2785  ; ILP32F-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x10786  ; ILP32F-NEXT:   $x10 = COPY [[COPY1]](s32)787  ; ILP32F-NEXT:   PseudoRET implicit $x10788  ;789  ; ILP32D-LABEL: name: caller_many_scalars790  ; ILP32D: bb.1 (%ir-block.0):791  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1792  ; ILP32D-NEXT:   [[C1:%[0-9]+]]:_(s16) = G_CONSTANT i16 2793  ; ILP32D-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3794  ; ILP32D-NEXT:   [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 4795  ; ILP32D-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5796  ; ILP32D-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6797  ; ILP32D-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 7798  ; ILP32D-NEXT:   [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 8799  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2800  ; ILP32D-NEXT:   [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s8)801  ; ILP32D-NEXT:   [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[C1]](s16)802  ; ILP32D-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C3]](s64)803  ; ILP32D-NEXT:   [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C6]](s64)804  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2805  ; ILP32D-NEXT:   [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0806  ; ILP32D-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C8]](s32)807  ; ILP32D-NEXT:   G_STORE [[UV3]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)808  ; ILP32D-NEXT:   [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 4809  ; ILP32D-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C9]](s32)810  ; ILP32D-NEXT:   G_STORE [[C7]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4)811  ; ILP32D-NEXT:   $x10 = COPY [[ANYEXT]](s32)812  ; ILP32D-NEXT:   $x11 = COPY [[ANYEXT1]](s32)813  ; ILP32D-NEXT:   $x12 = COPY [[C2]](s32)814  ; ILP32D-NEXT:   $x13 = COPY [[UV]](s32)815  ; ILP32D-NEXT:   $x14 = COPY [[UV1]](s32)816  ; ILP32D-NEXT:   $x15 = COPY [[C4]](s32)817  ; ILP32D-NEXT:   $x16 = COPY [[C5]](s32)818  ; ILP32D-NEXT:   $x17 = COPY [[UV2]](s32)819  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_many_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10820  ; ILP32D-NEXT:   ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2821  ; ILP32D-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x10822  ; ILP32D-NEXT:   $x10 = COPY [[COPY1]](s32)823  ; ILP32D-NEXT:   PseudoRET implicit $x10824  %1 = call i32 @callee_many_scalars(i8 1, i16 2, i32 3, i64 4, i32 5, i32 6, i64 7, i32 8)825  ret i32 %1826}827 828 829; Check that i128 and fp128 are passed indirectly830 831define i32 @callee_large_scalars(i128 %a, fp128 %b) nounwind {832  ; RV32I-LABEL: name: callee_large_scalars833  ; RV32I: bb.1 (%ir-block.0):834  ; RV32I-NEXT:   liveins: $x10, $x11835  ; RV32I-NEXT: {{  $}}836  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x10837  ; RV32I-NEXT:   [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY]](p0) :: (load (s128), align 8)838  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(p0) = COPY $x11839  ; RV32I-NEXT:   [[LOAD1:%[0-9]+]]:_(s128) = G_LOAD [[COPY1]](p0) :: (load (s128))840  ; RV32I-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[LOAD]](s128), [[LOAD1]]841  ; RV32I-NEXT:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)842  ; RV32I-NEXT:   $x10 = COPY [[ZEXT]](s32)843  ; RV32I-NEXT:   PseudoRET implicit $x10844  %b_bitcast = bitcast fp128 %b to i128845  %1 = icmp eq i128 %a, %b_bitcast846  %2 = zext i1 %1 to i32847  ret i32 %2848}849 850define i32 @caller_large_scalars() nounwind {851  ; ILP32-LABEL: name: caller_large_scalars852  ; ILP32: bb.1 (%ir-block.0):853  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1854  ; ILP32-NEXT:   [[C1:%[0-9]+]]:_(s128) = G_FCONSTANT fp128 0xL00000000000000007FFF000000000000855  ; ILP32-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2856  ; ILP32-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0857  ; ILP32-NEXT:   G_STORE [[C]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)858  ; ILP32-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1859  ; ILP32-NEXT:   G_STORE [[C1]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1)860  ; ILP32-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)861  ; ILP32-NEXT:   $x11 = COPY [[FRAME_INDEX1]](p0)862  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_scalars, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10863  ; ILP32-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2864  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10865  ; ILP32-NEXT:   $x10 = COPY [[COPY]](s32)866  ; ILP32-NEXT:   PseudoRET implicit $x10867  ;868  ; ILP32F-LABEL: name: caller_large_scalars869  ; ILP32F: bb.1 (%ir-block.0):870  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1871  ; ILP32F-NEXT:   [[C1:%[0-9]+]]:_(s128) = G_FCONSTANT fp128 0xL00000000000000007FFF000000000000872  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2873  ; ILP32F-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0874  ; ILP32F-NEXT:   G_STORE [[C]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)875  ; ILP32F-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1876  ; ILP32F-NEXT:   G_STORE [[C1]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1)877  ; ILP32F-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)878  ; ILP32F-NEXT:   $x11 = COPY [[FRAME_INDEX1]](p0)879  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_scalars, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10880  ; ILP32F-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2881  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10882  ; ILP32F-NEXT:   $x10 = COPY [[COPY]](s32)883  ; ILP32F-NEXT:   PseudoRET implicit $x10884  ;885  ; ILP32D-LABEL: name: caller_large_scalars886  ; ILP32D: bb.1 (%ir-block.0):887  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s128) = G_CONSTANT i128 1888  ; ILP32D-NEXT:   [[C1:%[0-9]+]]:_(s128) = G_FCONSTANT fp128 0xL00000000000000007FFF000000000000889  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2890  ; ILP32D-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0891  ; ILP32D-NEXT:   G_STORE [[C]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)892  ; ILP32D-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1893  ; ILP32D-NEXT:   G_STORE [[C1]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1)894  ; ILP32D-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)895  ; ILP32D-NEXT:   $x11 = COPY [[FRAME_INDEX1]](p0)896  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_scalars, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10897  ; ILP32D-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2898  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10899  ; ILP32D-NEXT:   $x10 = COPY [[COPY]](s32)900  ; ILP32D-NEXT:   PseudoRET implicit $x10901  %1 = call i32 @callee_large_scalars(i128 1, fp128 0xL00000000000000007FFF000000000000)902  ret i32 %1903}904 905; Check that arguments larger than 2*xlen are handled correctly when their906; address is passed on the stack rather than in memory907 908; Must keep define on a single line due to an update_llc_test_checks.py limitation909define i32 @callee_large_scalars_exhausted_regs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i128 %h, i32 %i, fp128 %j) nounwind {910  ; RV32I-LABEL: name: callee_large_scalars_exhausted_regs911  ; RV32I: bb.1 (%ir-block.0):912  ; RV32I-NEXT:   liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17913  ; RV32I-NEXT: {{  $}}914  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10915  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x11916  ; RV32I-NEXT:   [[COPY2:%[0-9]+]]:_(s32) = COPY $x12917  ; RV32I-NEXT:   [[COPY3:%[0-9]+]]:_(s32) = COPY $x13918  ; RV32I-NEXT:   [[COPY4:%[0-9]+]]:_(s32) = COPY $x14919  ; RV32I-NEXT:   [[COPY5:%[0-9]+]]:_(s32) = COPY $x15920  ; RV32I-NEXT:   [[COPY6:%[0-9]+]]:_(s32) = COPY $x16921  ; RV32I-NEXT:   [[COPY7:%[0-9]+]]:_(p0) = COPY $x17922  ; RV32I-NEXT:   [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[COPY7]](p0) :: (load (s128), align 8)923  ; RV32I-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1924  ; RV32I-NEXT:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.1, align 16)925  ; RV32I-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0926  ; RV32I-NEXT:   [[LOAD2:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (p0) from %fixed-stack.0)927  ; RV32I-NEXT:   [[LOAD3:%[0-9]+]]:_(s128) = G_LOAD [[LOAD2]](p0) :: (load (s128))928  ; RV32I-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[LOAD]](s128), [[LOAD3]]929  ; RV32I-NEXT:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)930  ; RV32I-NEXT:   $x10 = COPY [[ZEXT]](s32)931  ; RV32I-NEXT:   PseudoRET implicit $x10932  %j_bitcast = bitcast fp128 %j to i128933  %1 = icmp eq i128 %h, %j_bitcast934  %2 = zext i1 %1 to i32935  ret i32 %2936}937 938define i32 @caller_large_scalars_exhausted_regs() nounwind {939  ; ILP32-LABEL: name: caller_large_scalars_exhausted_regs940  ; ILP32: bb.1 (%ir-block.0):941  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1942  ; ILP32-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2943  ; ILP32-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3944  ; ILP32-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4945  ; ILP32-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5946  ; ILP32-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6947  ; ILP32-NEXT:   [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7948  ; ILP32-NEXT:   [[C7:%[0-9]+]]:_(s128) = G_CONSTANT i128 8949  ; ILP32-NEXT:   [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 9950  ; ILP32-NEXT:   [[C9:%[0-9]+]]:_(s128) = G_FCONSTANT fp128 0xL00000000000000007FFF000000000000951  ; ILP32-NEXT:   ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2952  ; ILP32-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0953  ; ILP32-NEXT:   G_STORE [[C7]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)954  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2955  ; ILP32-NEXT:   [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 0956  ; ILP32-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C10]](s32)957  ; ILP32-NEXT:   G_STORE [[C8]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)958  ; ILP32-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1959  ; ILP32-NEXT:   G_STORE [[C9]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1)960  ; ILP32-NEXT:   [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 4961  ; ILP32-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C11]](s32)962  ; ILP32-NEXT:   G_STORE [[FRAME_INDEX1]](p0), [[PTR_ADD1]](p0) :: (store (p0) into stack + 4)963  ; ILP32-NEXT:   $x10 = COPY [[C]](s32)964  ; ILP32-NEXT:   $x11 = COPY [[C1]](s32)965  ; ILP32-NEXT:   $x12 = COPY [[C2]](s32)966  ; ILP32-NEXT:   $x13 = COPY [[C3]](s32)967  ; ILP32-NEXT:   $x14 = COPY [[C4]](s32)968  ; ILP32-NEXT:   $x15 = COPY [[C5]](s32)969  ; ILP32-NEXT:   $x16 = COPY [[C6]](s32)970  ; ILP32-NEXT:   $x17 = COPY [[FRAME_INDEX]](p0)971  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_scalars_exhausted_regs, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x10972  ; ILP32-NEXT:   ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x2973  ; ILP32-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x10974  ; ILP32-NEXT:   $x10 = COPY [[COPY1]](s32)975  ; ILP32-NEXT:   PseudoRET implicit $x10976  ;977  ; ILP32F-LABEL: name: caller_large_scalars_exhausted_regs978  ; ILP32F: bb.1 (%ir-block.0):979  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1980  ; ILP32F-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2981  ; ILP32F-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3982  ; ILP32F-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4983  ; ILP32F-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 5984  ; ILP32F-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 6985  ; ILP32F-NEXT:   [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 7986  ; ILP32F-NEXT:   [[C7:%[0-9]+]]:_(s128) = G_CONSTANT i128 8987  ; ILP32F-NEXT:   [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 9988  ; ILP32F-NEXT:   [[C9:%[0-9]+]]:_(s128) = G_FCONSTANT fp128 0xL00000000000000007FFF000000000000989  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x2990  ; ILP32F-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0991  ; ILP32F-NEXT:   G_STORE [[C7]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)992  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x2993  ; ILP32F-NEXT:   [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 0994  ; ILP32F-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C10]](s32)995  ; ILP32F-NEXT:   G_STORE [[C8]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)996  ; ILP32F-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1997  ; ILP32F-NEXT:   G_STORE [[C9]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1)998  ; ILP32F-NEXT:   [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 4999  ; ILP32F-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C11]](s32)1000  ; ILP32F-NEXT:   G_STORE [[FRAME_INDEX1]](p0), [[PTR_ADD1]](p0) :: (store (p0) into stack + 4)1001  ; ILP32F-NEXT:   $x10 = COPY [[C]](s32)1002  ; ILP32F-NEXT:   $x11 = COPY [[C1]](s32)1003  ; ILP32F-NEXT:   $x12 = COPY [[C2]](s32)1004  ; ILP32F-NEXT:   $x13 = COPY [[C3]](s32)1005  ; ILP32F-NEXT:   $x14 = COPY [[C4]](s32)1006  ; ILP32F-NEXT:   $x15 = COPY [[C5]](s32)1007  ; ILP32F-NEXT:   $x16 = COPY [[C6]](s32)1008  ; ILP32F-NEXT:   $x17 = COPY [[FRAME_INDEX]](p0)1009  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_scalars_exhausted_regs, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x101010  ; ILP32F-NEXT:   ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x21011  ; ILP32F-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x101012  ; ILP32F-NEXT:   $x10 = COPY [[COPY1]](s32)1013  ; ILP32F-NEXT:   PseudoRET implicit $x101014  ;1015  ; ILP32D-LABEL: name: caller_large_scalars_exhausted_regs1016  ; ILP32D: bb.1 (%ir-block.0):1017  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 11018  ; ILP32D-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 21019  ; ILP32D-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31020  ; ILP32D-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 41021  ; ILP32D-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 51022  ; ILP32D-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 61023  ; ILP32D-NEXT:   [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 71024  ; ILP32D-NEXT:   [[C7:%[0-9]+]]:_(s128) = G_CONSTANT i128 81025  ; ILP32D-NEXT:   [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 91026  ; ILP32D-NEXT:   [[C9:%[0-9]+]]:_(s128) = G_FCONSTANT fp128 0xL00000000000000007FFF0000000000001027  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 8, 0, implicit-def $x2, implicit $x21028  ; ILP32D-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.01029  ; ILP32D-NEXT:   G_STORE [[C7]](s128), [[FRAME_INDEX]](p0) :: (store (s128) into %stack.0, align 8)1030  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x21031  ; ILP32D-NEXT:   [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 01032  ; ILP32D-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C10]](s32)1033  ; ILP32D-NEXT:   G_STORE [[C8]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 16)1034  ; ILP32D-NEXT:   [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.11035  ; ILP32D-NEXT:   G_STORE [[C9]](s128), [[FRAME_INDEX1]](p0) :: (store (s128) into %stack.1)1036  ; ILP32D-NEXT:   [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 41037  ; ILP32D-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C11]](s32)1038  ; ILP32D-NEXT:   G_STORE [[FRAME_INDEX1]](p0), [[PTR_ADD1]](p0) :: (store (p0) into stack + 4)1039  ; ILP32D-NEXT:   $x10 = COPY [[C]](s32)1040  ; ILP32D-NEXT:   $x11 = COPY [[C1]](s32)1041  ; ILP32D-NEXT:   $x12 = COPY [[C2]](s32)1042  ; ILP32D-NEXT:   $x13 = COPY [[C3]](s32)1043  ; ILP32D-NEXT:   $x14 = COPY [[C4]](s32)1044  ; ILP32D-NEXT:   $x15 = COPY [[C5]](s32)1045  ; ILP32D-NEXT:   $x16 = COPY [[C6]](s32)1046  ; ILP32D-NEXT:   $x17 = COPY [[FRAME_INDEX]](p0)1047  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_scalars_exhausted_regs, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit-def $x101048  ; ILP32D-NEXT:   ADJCALLSTACKUP 8, 0, implicit-def $x2, implicit $x21049  ; ILP32D-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x101050  ; ILP32D-NEXT:   $x10 = COPY [[COPY1]](s32)1051  ; ILP32D-NEXT:   PseudoRET implicit $x101052  %1 = call i32 @callee_large_scalars_exhausted_regs(1053      i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i128 8, i32 9,1054      fp128 0xL00000000000000007FFF000000000000)1055  ret i32 %11056}1057 1058; Check passing of coerced integer arrays1059 1060define i32 @callee_small_coerced_struct([2 x i32] %a.coerce) nounwind {1061  ; RV32I-LABEL: name: callee_small_coerced_struct1062  ; RV32I: bb.1 (%ir-block.0):1063  ; RV32I-NEXT:   liveins: $x10, $x111064  ; RV32I-NEXT: {{  $}}1065  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x101066  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x111067  ; RV32I-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]1068  ; RV32I-NEXT:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)1069  ; RV32I-NEXT:   $x10 = COPY [[ZEXT]](s32)1070  ; RV32I-NEXT:   PseudoRET implicit $x101071  %1 = extractvalue [2 x i32] %a.coerce, 01072  %2 = extractvalue [2 x i32] %a.coerce, 11073  %3 = icmp eq i32 %1, %21074  %4 = zext i1 %3 to i321075  ret i32 %41076}1077 1078define i32 @caller_small_coerced_struct() nounwind {1079  ; ILP32-LABEL: name: caller_small_coerced_struct1080  ; ILP32: bb.1 (%ir-block.0):1081  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 11082  ; ILP32-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 21083  ; ILP32-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21084  ; ILP32-NEXT:   $x10 = COPY [[C]](s32)1085  ; ILP32-NEXT:   $x11 = COPY [[C1]](s32)1086  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_small_coerced_struct, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x101087  ; ILP32-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21088  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x101089  ; ILP32-NEXT:   $x10 = COPY [[COPY]](s32)1090  ; ILP32-NEXT:   PseudoRET implicit $x101091  ;1092  ; ILP32F-LABEL: name: caller_small_coerced_struct1093  ; ILP32F: bb.1 (%ir-block.0):1094  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 11095  ; ILP32F-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 21096  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21097  ; ILP32F-NEXT:   $x10 = COPY [[C]](s32)1098  ; ILP32F-NEXT:   $x11 = COPY [[C1]](s32)1099  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_small_coerced_struct, csr_ilp32f_lp64f, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x101100  ; ILP32F-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21101  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x101102  ; ILP32F-NEXT:   $x10 = COPY [[COPY]](s32)1103  ; ILP32F-NEXT:   PseudoRET implicit $x101104  ;1105  ; ILP32D-LABEL: name: caller_small_coerced_struct1106  ; ILP32D: bb.1 (%ir-block.0):1107  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 11108  ; ILP32D-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 21109  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21110  ; ILP32D-NEXT:   $x10 = COPY [[C]](s32)1111  ; ILP32D-NEXT:   $x11 = COPY [[C1]](s32)1112  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_small_coerced_struct, csr_ilp32d_lp64d, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x101113  ; ILP32D-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21114  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x101115  ; ILP32D-NEXT:   $x10 = COPY [[COPY]](s32)1116  ; ILP32D-NEXT:   PseudoRET implicit $x101117  %1 = call i32 @callee_small_coerced_struct([2 x i32] [i32 1, i32 2])1118  ret i32 %11119}1120 1121; Check return of 2x xlen scalars1122 1123define i64 @callee_small_scalar_ret() nounwind {1124  ; RV32I-LABEL: name: callee_small_scalar_ret1125  ; RV32I: bb.1 (%ir-block.0):1126  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12345678987651127  ; RV32I-NEXT:   [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)1128  ; RV32I-NEXT:   $x10 = COPY [[UV]](s32)1129  ; RV32I-NEXT:   $x11 = COPY [[UV1]](s32)1130  ; RV32I-NEXT:   PseudoRET implicit $x10, implicit $x111131  ret i64 12345678987651132}1133 1134define i32 @caller_small_scalar_ret() nounwind {1135  ; ILP32-LABEL: name: caller_small_scalar_ret1136  ; ILP32: bb.1 (%ir-block.0):1137  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 9876543212345671138  ; ILP32-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21139  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x111140  ; ILP32-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21141  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x101142  ; ILP32-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x111143  ; ILP32-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)1144  ; ILP32-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[C]](s64), [[MV]]1145  ; ILP32-NEXT:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)1146  ; ILP32-NEXT:   $x10 = COPY [[ZEXT]](s32)1147  ; ILP32-NEXT:   PseudoRET implicit $x101148  ;1149  ; ILP32F-LABEL: name: caller_small_scalar_ret1150  ; ILP32F: bb.1 (%ir-block.0):1151  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 9876543212345671152  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21153  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x111154  ; ILP32F-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21155  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x101156  ; ILP32F-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x111157  ; ILP32F-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)1158  ; ILP32F-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[C]](s64), [[MV]]1159  ; ILP32F-NEXT:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)1160  ; ILP32F-NEXT:   $x10 = COPY [[ZEXT]](s32)1161  ; ILP32F-NEXT:   PseudoRET implicit $x101162  ;1163  ; ILP32D-LABEL: name: caller_small_scalar_ret1164  ; ILP32D: bb.1 (%ir-block.0):1165  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 9876543212345671166  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21167  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_small_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x111168  ; ILP32D-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21169  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x101170  ; ILP32D-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $x111171  ; ILP32D-NEXT:   [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)1172  ; ILP32D-NEXT:   [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[C]](s64), [[MV]]1173  ; ILP32D-NEXT:   [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)1174  ; ILP32D-NEXT:   $x10 = COPY [[ZEXT]](s32)1175  ; ILP32D-NEXT:   PseudoRET implicit $x101176  %1 = call i64 @callee_small_scalar_ret()1177  %2 = icmp eq i64 987654321234567, %11178  %3 = zext i1 %2 to i321179  ret i32 %31180}1181 1182; Check return of 2x xlen structs1183 1184%struct.small = type { i32, ptr }1185 1186define %struct.small @callee_small_struct_ret() nounwind {1187  ; RV32I-LABEL: name: callee_small_struct_ret1188  ; RV32I: bb.1 (%ir-block.0):1189  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 11190  ; RV32I-NEXT:   [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i32 01191  ; RV32I-NEXT:   $x10 = COPY [[C]](s32)1192  ; RV32I-NEXT:   $x11 = COPY [[C1]](p0)1193  ; RV32I-NEXT:   PseudoRET implicit $x10, implicit $x111194  ret %struct.small { i32 1, ptr null }1195}1196 1197define i32 @caller_small_struct_ret() nounwind {1198  ; ILP32-LABEL: name: caller_small_struct_ret1199  ; ILP32: bb.1 (%ir-block.0):1200  ; ILP32-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21201  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit-def $x10, implicit-def $x111202  ; ILP32-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21203  ; ILP32-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x101204  ; ILP32-NEXT:   [[COPY1:%[0-9]+]]:_(p0) = COPY $x111205  ; ILP32-NEXT:   [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p0)1206  ; ILP32-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[PTRTOINT]]1207  ; ILP32-NEXT:   $x10 = COPY [[ADD]](s32)1208  ; ILP32-NEXT:   PseudoRET implicit $x101209  ;1210  ; ILP32F-LABEL: name: caller_small_struct_ret1211  ; ILP32F: bb.1 (%ir-block.0):1212  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21213  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit-def $x10, implicit-def $x111214  ; ILP32F-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21215  ; ILP32F-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x101216  ; ILP32F-NEXT:   [[COPY1:%[0-9]+]]:_(p0) = COPY $x111217  ; ILP32F-NEXT:   [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p0)1218  ; ILP32F-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[PTRTOINT]]1219  ; ILP32F-NEXT:   $x10 = COPY [[ADD]](s32)1220  ; ILP32F-NEXT:   PseudoRET implicit $x101221  ;1222  ; ILP32D-LABEL: name: caller_small_struct_ret1223  ; ILP32D: bb.1 (%ir-block.0):1224  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21225  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_small_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit-def $x10, implicit-def $x111226  ; ILP32D-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21227  ; ILP32D-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x101228  ; ILP32D-NEXT:   [[COPY1:%[0-9]+]]:_(p0) = COPY $x111229  ; ILP32D-NEXT:   [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p0)1230  ; ILP32D-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[PTRTOINT]]1231  ; ILP32D-NEXT:   $x10 = COPY [[ADD]](s32)1232  ; ILP32D-NEXT:   PseudoRET implicit $x101233  %1 = call %struct.small @callee_small_struct_ret()1234  %2 = extractvalue %struct.small %1, 01235  %3 = extractvalue %struct.small %1, 11236  %4 = ptrtoint ptr %3 to i321237  %5 = add i32 %2, %41238  ret i32 %51239}1240 1241; Check return of >2x xlen scalars1242 1243define fp128 @callee_large_scalar_ret() nounwind {1244  ; RV32I-LABEL: name: callee_large_scalar_ret1245  ; RV32I: bb.1 (%ir-block.0):1246  ; RV32I-NEXT:   liveins: $x101247  ; RV32I-NEXT: {{  $}}1248  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x101249  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s128) = G_FCONSTANT fp128 0xL00000000000000007FFF0000000000001250  ; RV32I-NEXT:   G_STORE [[C]](s128), [[COPY]](p0) :: (store (s128))1251  ; RV32I-NEXT:   PseudoRET1252  ret fp128 0xL00000000000000007FFF0000000000001253}1254 1255define void @caller_large_scalar_ret() nounwind {1256  ; ILP32-LABEL: name: caller_large_scalar_ret1257  ; ILP32: bb.1 (%ir-block.0):1258  ; ILP32-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.01259  ; ILP32-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21260  ; ILP32-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)1261  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_scalar_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x101262  ; ILP32-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21263  ; ILP32-NEXT:   [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s128) from %stack.0)1264  ; ILP32-NEXT:   PseudoRET1265  ;1266  ; ILP32F-LABEL: name: caller_large_scalar_ret1267  ; ILP32F: bb.1 (%ir-block.0):1268  ; ILP32F-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.01269  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21270  ; ILP32F-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)1271  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_scalar_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x101272  ; ILP32F-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21273  ; ILP32F-NEXT:   [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s128) from %stack.0)1274  ; ILP32F-NEXT:   PseudoRET1275  ;1276  ; ILP32D-LABEL: name: caller_large_scalar_ret1277  ; ILP32D: bb.1 (%ir-block.0):1278  ; ILP32D-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.01279  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21280  ; ILP32D-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)1281  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_scalar_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x101282  ; ILP32D-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21283  ; ILP32D-NEXT:   [[LOAD:%[0-9]+]]:_(s128) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s128) from %stack.0)1284  ; ILP32D-NEXT:   PseudoRET1285  %1 = call fp128 @callee_large_scalar_ret()1286  ret void1287}1288 1289; Check return of >2x xlen structs1290 1291%struct.large = type { i32, i32, i32, i32 }1292 1293define void @callee_large_struct_ret(ptr noalias sret(%struct.large) %agg.result) nounwind {1294  ; RV32I-LABEL: name: callee_large_struct_ret1295  ; RV32I: bb.1 (%ir-block.0):1296  ; RV32I-NEXT:   liveins: $x101297  ; RV32I-NEXT: {{  $}}1298  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x101299  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 11300  ; RV32I-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 21301  ; RV32I-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31302  ; RV32I-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 41303  ; RV32I-NEXT:   G_STORE [[C]](s32), [[COPY]](p0) :: (store (s32) into %ir.agg.result)1304  ; RV32I-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 41305  ; RV32I-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw nusw inbounds G_PTR_ADD [[COPY]], [[C4]](s32)1306  ; RV32I-NEXT:   G_STORE [[C1]](s32), [[PTR_ADD]](p0) :: (store (s32) into %ir.b)1307  ; RV32I-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 81308  ; RV32I-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw nusw inbounds G_PTR_ADD [[COPY]], [[C5]](s32)1309  ; RV32I-NEXT:   G_STORE [[C2]](s32), [[PTR_ADD1]](p0) :: (store (s32) into %ir.c)1310  ; RV32I-NEXT:   [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 121311  ; RV32I-NEXT:   [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw nusw inbounds G_PTR_ADD [[COPY]], [[C6]](s32)1312  ; RV32I-NEXT:   G_STORE [[C3]](s32), [[PTR_ADD2]](p0) :: (store (s32) into %ir.d)1313  ; RV32I-NEXT:   PseudoRET1314  store i32 1, ptr %agg.result, align 41315  %b = getelementptr inbounds %struct.large, ptr %agg.result, i32 0, i32 11316  store i32 2, ptr %b, align 41317  %c = getelementptr inbounds %struct.large, ptr %agg.result, i32 0, i32 21318  store i32 3, ptr %c, align 41319  %d = getelementptr inbounds %struct.large, ptr %agg.result, i32 0, i32 31320  store i32 4, ptr %d, align 41321  ret void1322}1323 1324define i32 @caller_large_struct_ret() nounwind {1325  ; ILP32-LABEL: name: caller_large_struct_ret1326  ; ILP32: bb.1 (%ir-block.0):1327  ; ILP32-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.01328  ; ILP32-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21329  ; ILP32-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)1330  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x101331  ; ILP32-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21332  ; ILP32-NEXT:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)1333  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 121334  ; ILP32-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw nusw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)1335  ; ILP32-NEXT:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (dereferenceable load (s32) from %ir.3)1336  ; ILP32-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[LOAD]], [[LOAD1]]1337  ; ILP32-NEXT:   $x10 = COPY [[ADD]](s32)1338  ; ILP32-NEXT:   PseudoRET implicit $x101339  ;1340  ; ILP32F-LABEL: name: caller_large_struct_ret1341  ; ILP32F: bb.1 (%ir-block.0):1342  ; ILP32F-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.01343  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21344  ; ILP32F-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)1345  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x101346  ; ILP32F-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21347  ; ILP32F-NEXT:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)1348  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 121349  ; ILP32F-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw nusw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)1350  ; ILP32F-NEXT:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (dereferenceable load (s32) from %ir.3)1351  ; ILP32F-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[LOAD]], [[LOAD1]]1352  ; ILP32F-NEXT:   $x10 = COPY [[ADD]](s32)1353  ; ILP32F-NEXT:   PseudoRET implicit $x101354  ;1355  ; ILP32D-LABEL: name: caller_large_struct_ret1356  ; ILP32D: bb.1 (%ir-block.0):1357  ; ILP32D-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.01358  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21359  ; ILP32D-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)1360  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x101361  ; ILP32D-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21362  ; ILP32D-NEXT:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s32) from %ir.1)1363  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 121364  ; ILP32D-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw nusw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)1365  ; ILP32D-NEXT:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (dereferenceable load (s32) from %ir.3)1366  ; ILP32D-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[LOAD]], [[LOAD1]]1367  ; ILP32D-NEXT:   $x10 = COPY [[ADD]](s32)1368  ; ILP32D-NEXT:   PseudoRET implicit $x101369  %1 = alloca %struct.large1370  call void @callee_large_struct_ret(ptr sret(%struct.large) %1)1371  %2 = load i32, ptr %11372  %3 = getelementptr inbounds %struct.large, ptr %1, i32 0, i32 31373  %4 = load i32, ptr %31374  %5 = add i32 %2, %41375  ret i32 %51376}1377 1378%struct.large2 = type { i32, float, i16, i32 }1379 1380define %struct.large2 @callee_large_struct_ret2() nounwind {1381  ; RV32I-LABEL: name: callee_large_struct_ret21382  ; RV32I: bb.1 (%ir-block.0):1383  ; RV32I-NEXT:   liveins: $x101384  ; RV32I-NEXT: {{  $}}1385  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:_(p0) = COPY $x101386  ; RV32I-NEXT:   [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF1387  ; RV32I-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY [[DEF]](s32)1388  ; RV32I-NEXT:   [[DEF1:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF1389  ; RV32I-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 11390  ; RV32I-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 2.000000e+001391  ; RV32I-NEXT:   [[C2:%[0-9]+]]:_(s16) = G_CONSTANT i16 31392  ; RV32I-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 41393  ; RV32I-NEXT:   G_STORE [[C]](s32), [[COPY]](p0) :: (store (s32), align 8)1394  ; RV32I-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 41395  ; RV32I-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C4]](s32)1396  ; RV32I-NEXT:   G_STORE [[C1]](s32), [[PTR_ADD]](p0) :: (store (s32))1397  ; RV32I-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 81398  ; RV32I-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C5]](s32)1399  ; RV32I-NEXT:   G_STORE [[C2]](s16), [[PTR_ADD1]](p0) :: (store (s16), align 8)1400  ; RV32I-NEXT:   [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 121401  ; RV32I-NEXT:   [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[COPY]], [[C6]](s32)1402  ; RV32I-NEXT:   G_STORE [[C3]](s32), [[PTR_ADD2]](p0) :: (store (s32))1403  ; RV32I-NEXT:   PseudoRET1404  %a = insertvalue %struct.large2 poison, i32 1, 01405  %b = insertvalue %struct.large2 %a, float 2.0, 11406  %c = insertvalue %struct.large2 %b, i16 3, 21407  %d = insertvalue %struct.large2 %c, i32 4, 31408  ret %struct.large2 %d1409}1410 1411define i32 @caller_large_struct_ret2() nounwind {1412  ; ILP32-LABEL: name: caller_large_struct_ret21413  ; ILP32: bb.1 (%ir-block.0):1414  ; ILP32-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.01415  ; ILP32-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21416  ; ILP32-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)1417  ; ILP32-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32_lp64, implicit-def $x1, implicit $x101418  ; ILP32-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21419  ; ILP32-NEXT:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %stack.0, align 8)1420  ; ILP32-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 41421  ; ILP32-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)1422  ; ILP32-NEXT:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32) from %stack.0)1423  ; ILP32-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 81424  ; ILP32-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C1]](s32)1425  ; ILP32-NEXT:   [[LOAD2:%[0-9]+]]:_(s16) = G_LOAD [[PTR_ADD1]](p0) :: (load (s16) from %stack.0, align 8)1426  ; ILP32-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 121427  ; ILP32-NEXT:   [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C2]](s32)1428  ; ILP32-NEXT:   [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s32) from %stack.0)1429  ; ILP32-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[LOAD]], [[LOAD3]]1430  ; ILP32-NEXT:   $x10 = COPY [[ADD]](s32)1431  ; ILP32-NEXT:   PseudoRET implicit $x101432  ;1433  ; ILP32F-LABEL: name: caller_large_struct_ret21434  ; ILP32F: bb.1 (%ir-block.0):1435  ; ILP32F-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.01436  ; ILP32F-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21437  ; ILP32F-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)1438  ; ILP32F-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32f_lp64f, implicit-def $x1, implicit $x101439  ; ILP32F-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21440  ; ILP32F-NEXT:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %stack.0, align 8)1441  ; ILP32F-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 41442  ; ILP32F-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)1443  ; ILP32F-NEXT:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32) from %stack.0)1444  ; ILP32F-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 81445  ; ILP32F-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C1]](s32)1446  ; ILP32F-NEXT:   [[LOAD2:%[0-9]+]]:_(s16) = G_LOAD [[PTR_ADD1]](p0) :: (load (s16) from %stack.0, align 8)1447  ; ILP32F-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 121448  ; ILP32F-NEXT:   [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C2]](s32)1449  ; ILP32F-NEXT:   [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s32) from %stack.0)1450  ; ILP32F-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[LOAD]], [[LOAD3]]1451  ; ILP32F-NEXT:   $x10 = COPY [[ADD]](s32)1452  ; ILP32F-NEXT:   PseudoRET implicit $x101453  ;1454  ; ILP32D-LABEL: name: caller_large_struct_ret21455  ; ILP32D: bb.1 (%ir-block.0):1456  ; ILP32D-NEXT:   [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.01457  ; ILP32D-NEXT:   ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x21458  ; ILP32D-NEXT:   $x10 = COPY [[FRAME_INDEX]](p0)1459  ; ILP32D-NEXT:   PseudoCALL target-flags(riscv-call) @callee_large_struct_ret, csr_ilp32d_lp64d, implicit-def $x1, implicit $x101460  ; ILP32D-NEXT:   ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x21461  ; ILP32D-NEXT:   [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %stack.0, align 8)1462  ; ILP32D-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 41463  ; ILP32D-NEXT:   [[PTR_ADD:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C]](s32)1464  ; ILP32D-NEXT:   [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32) from %stack.0)1465  ; ILP32D-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 81466  ; ILP32D-NEXT:   [[PTR_ADD1:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C1]](s32)1467  ; ILP32D-NEXT:   [[LOAD2:%[0-9]+]]:_(s16) = G_LOAD [[PTR_ADD1]](p0) :: (load (s16) from %stack.0, align 8)1468  ; ILP32D-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 121469  ; ILP32D-NEXT:   [[PTR_ADD2:%[0-9]+]]:_(p0) = nuw inbounds G_PTR_ADD [[FRAME_INDEX]], [[C2]](s32)1470  ; ILP32D-NEXT:   [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s32) from %stack.0)1471  ; ILP32D-NEXT:   [[ADD:%[0-9]+]]:_(s32) = G_ADD [[LOAD]], [[LOAD3]]1472  ; ILP32D-NEXT:   $x10 = COPY [[ADD]](s32)1473  ; ILP32D-NEXT:   PseudoRET implicit $x101474  %1 = call %struct.large2 @callee_large_struct_ret()1475  %2 = extractvalue %struct.large2 %1, 01476  %3 = extractvalue %struct.large2 %1, 31477  %4 = add i32 %2, %31478  ret i32 %41479}1480