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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=riscv32 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32I %s4; RUN: llc -mtriple=riscv64 -global-isel -stop-after=irtranslator -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefix=RV64I %s6 7define void @test_va_copy(ptr %dest_list, ptr %src_list) {8 ; RV32I-LABEL: name: test_va_copy9 ; RV32I: bb.1 (%ir-block.0):10 ; RV32I-NEXT: liveins: $x10, $x1111 ; RV32I-NEXT: {{ $}}12 ; RV32I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x1013 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1114 ; RV32I-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.va_copy), [[COPY]](p0), [[COPY1]](p0)15 ; RV32I-NEXT: PseudoRET16 ;17 ; RV64I-LABEL: name: test_va_copy18 ; RV64I: bb.1 (%ir-block.0):19 ; RV64I-NEXT: liveins: $x10, $x1120 ; RV64I-NEXT: {{ $}}21 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x1022 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1123 ; RV64I-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.va_copy), [[COPY]](p0), [[COPY1]](p0)24 ; RV64I-NEXT: PseudoRET25 call void @llvm.va_copy(ptr %dest_list, ptr %src_list)26 ret void27}28