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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -code-model=small -verify-machineinstrs < %s \3; RUN: -global-isel | FileCheck %s -check-prefixes=RV32I-SMALL4; RUN: llc -mtriple=riscv32 -code-model=medium -verify-machineinstrs < %s \5; RUN: -global-isel | FileCheck %s -check-prefixes=RV32I-MEDIUM6; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs < %s \7; RUN: -global-isel | FileCheck %s -check-prefixes=RV32I-PIC8; RUN: llc -mtriple=riscv64 -code-model=small -verify-machineinstrs < %s \9; RUN: -global-isel | FileCheck %s -check-prefixes=RV64I-SMALL10; RUN: llc -mtriple=riscv64 -code-model=medium -verify-machineinstrs < %s \11; RUN: -global-isel | FileCheck %s -check-prefixes=RV64I-MEDIUM12; RUN: llc -mtriple=riscv64 -relocation-model=pic -verify-machineinstrs < %s \13; RUN: -global-isel | FileCheck %s -check-prefixes=RV64I-PIC14 15define void @above_threshold(i32 signext %in, ptr %out) nounwind {16; RV32I-SMALL-LABEL: above_threshold:17; RV32I-SMALL: # %bb.0: # %entry18; RV32I-SMALL-NEXT: li a2, 519; RV32I-SMALL-NEXT: addi a0, a0, -120; RV32I-SMALL-NEXT: bltu a2, a0, .LBB0_921; RV32I-SMALL-NEXT: # %bb.1: # %entry22; RV32I-SMALL-NEXT: lui a2, %hi(.LJTI0_0)23; RV32I-SMALL-NEXT: addi a2, a2, %lo(.LJTI0_0)24; RV32I-SMALL-NEXT: slli a0, a0, 225; RV32I-SMALL-NEXT: add a0, a2, a026; RV32I-SMALL-NEXT: lw a0, 0(a0)27; RV32I-SMALL-NEXT: jr a028; RV32I-SMALL-NEXT: .LBB0_2: # %bb129; RV32I-SMALL-NEXT: li a0, 430; RV32I-SMALL-NEXT: j .LBB0_831; RV32I-SMALL-NEXT: .LBB0_3: # %bb532; RV32I-SMALL-NEXT: li a0, 10033; RV32I-SMALL-NEXT: j .LBB0_834; RV32I-SMALL-NEXT: .LBB0_4: # %bb335; RV32I-SMALL-NEXT: li a0, 236; RV32I-SMALL-NEXT: j .LBB0_837; RV32I-SMALL-NEXT: .LBB0_5: # %bb438; RV32I-SMALL-NEXT: li a0, 139; RV32I-SMALL-NEXT: j .LBB0_840; RV32I-SMALL-NEXT: .LBB0_6: # %bb241; RV32I-SMALL-NEXT: li a0, 342; RV32I-SMALL-NEXT: j .LBB0_843; RV32I-SMALL-NEXT: .LBB0_7: # %bb644; RV32I-SMALL-NEXT: li a0, 20045; RV32I-SMALL-NEXT: .LBB0_8: # %exit46; RV32I-SMALL-NEXT: sw a0, 0(a1)47; RV32I-SMALL-NEXT: .LBB0_9: # %exit48; RV32I-SMALL-NEXT: ret49;50; RV32I-MEDIUM-LABEL: above_threshold:51; RV32I-MEDIUM: # %bb.0: # %entry52; RV32I-MEDIUM-NEXT: li a2, 553; RV32I-MEDIUM-NEXT: addi a0, a0, -154; RV32I-MEDIUM-NEXT: bltu a2, a0, .LBB0_955; RV32I-MEDIUM-NEXT: # %bb.1: # %entry56; RV32I-MEDIUM-NEXT: .Lpcrel_hi0:57; RV32I-MEDIUM-NEXT: auipc a2, %pcrel_hi(.LJTI0_0)58; RV32I-MEDIUM-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)59; RV32I-MEDIUM-NEXT: slli a0, a0, 260; RV32I-MEDIUM-NEXT: add a0, a2, a061; RV32I-MEDIUM-NEXT: lw a0, 0(a0)62; RV32I-MEDIUM-NEXT: jr a063; RV32I-MEDIUM-NEXT: .LBB0_2: # %bb164; RV32I-MEDIUM-NEXT: li a0, 465; RV32I-MEDIUM-NEXT: j .LBB0_866; RV32I-MEDIUM-NEXT: .LBB0_3: # %bb567; RV32I-MEDIUM-NEXT: li a0, 10068; RV32I-MEDIUM-NEXT: j .LBB0_869; RV32I-MEDIUM-NEXT: .LBB0_4: # %bb370; RV32I-MEDIUM-NEXT: li a0, 271; RV32I-MEDIUM-NEXT: j .LBB0_872; RV32I-MEDIUM-NEXT: .LBB0_5: # %bb473; RV32I-MEDIUM-NEXT: li a0, 174; RV32I-MEDIUM-NEXT: j .LBB0_875; RV32I-MEDIUM-NEXT: .LBB0_6: # %bb276; RV32I-MEDIUM-NEXT: li a0, 377; RV32I-MEDIUM-NEXT: j .LBB0_878; RV32I-MEDIUM-NEXT: .LBB0_7: # %bb679; RV32I-MEDIUM-NEXT: li a0, 20080; RV32I-MEDIUM-NEXT: .LBB0_8: # %exit81; RV32I-MEDIUM-NEXT: sw a0, 0(a1)82; RV32I-MEDIUM-NEXT: .LBB0_9: # %exit83; RV32I-MEDIUM-NEXT: ret84;85; RV32I-PIC-LABEL: above_threshold:86; RV32I-PIC: # %bb.0: # %entry87; RV32I-PIC-NEXT: li a2, 588; RV32I-PIC-NEXT: addi a0, a0, -189; RV32I-PIC-NEXT: bltu a2, a0, .LBB0_990; RV32I-PIC-NEXT: # %bb.1: # %entry91; RV32I-PIC-NEXT: .Lpcrel_hi0:92; RV32I-PIC-NEXT: auipc a2, %pcrel_hi(.LJTI0_0)93; RV32I-PIC-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)94; RV32I-PIC-NEXT: slli a0, a0, 295; RV32I-PIC-NEXT: add a0, a2, a096; RV32I-PIC-NEXT: lw a0, 0(a0)97; RV32I-PIC-NEXT: add a0, a2, a098; RV32I-PIC-NEXT: jr a099; RV32I-PIC-NEXT: .LBB0_2: # %bb1100; RV32I-PIC-NEXT: li a0, 4101; RV32I-PIC-NEXT: j .LBB0_8102; RV32I-PIC-NEXT: .LBB0_3: # %bb5103; RV32I-PIC-NEXT: li a0, 100104; RV32I-PIC-NEXT: j .LBB0_8105; RV32I-PIC-NEXT: .LBB0_4: # %bb3106; RV32I-PIC-NEXT: li a0, 2107; RV32I-PIC-NEXT: j .LBB0_8108; RV32I-PIC-NEXT: .LBB0_5: # %bb4109; RV32I-PIC-NEXT: li a0, 1110; RV32I-PIC-NEXT: j .LBB0_8111; RV32I-PIC-NEXT: .LBB0_6: # %bb2112; RV32I-PIC-NEXT: li a0, 3113; RV32I-PIC-NEXT: j .LBB0_8114; RV32I-PIC-NEXT: .LBB0_7: # %bb6115; RV32I-PIC-NEXT: li a0, 200116; RV32I-PIC-NEXT: .LBB0_8: # %exit117; RV32I-PIC-NEXT: sw a0, 0(a1)118; RV32I-PIC-NEXT: .LBB0_9: # %exit119; RV32I-PIC-NEXT: ret120;121; RV64I-SMALL-LABEL: above_threshold:122; RV64I-SMALL: # %bb.0: # %entry123; RV64I-SMALL-NEXT: li a2, 5124; RV64I-SMALL-NEXT: addi a0, a0, -1125; RV64I-SMALL-NEXT: bltu a2, a0, .LBB0_9126; RV64I-SMALL-NEXT: # %bb.1: # %entry127; RV64I-SMALL-NEXT: lui a2, %hi(.LJTI0_0)128; RV64I-SMALL-NEXT: addi a2, a2, %lo(.LJTI0_0)129; RV64I-SMALL-NEXT: slli a0, a0, 2130; RV64I-SMALL-NEXT: add a0, a2, a0131; RV64I-SMALL-NEXT: lw a0, 0(a0)132; RV64I-SMALL-NEXT: jr a0133; RV64I-SMALL-NEXT: .LBB0_2: # %bb1134; RV64I-SMALL-NEXT: li a0, 4135; RV64I-SMALL-NEXT: j .LBB0_8136; RV64I-SMALL-NEXT: .LBB0_3: # %bb5137; RV64I-SMALL-NEXT: li a0, 100138; RV64I-SMALL-NEXT: j .LBB0_8139; RV64I-SMALL-NEXT: .LBB0_4: # %bb3140; RV64I-SMALL-NEXT: li a0, 2141; RV64I-SMALL-NEXT: j .LBB0_8142; RV64I-SMALL-NEXT: .LBB0_5: # %bb4143; RV64I-SMALL-NEXT: li a0, 1144; RV64I-SMALL-NEXT: j .LBB0_8145; RV64I-SMALL-NEXT: .LBB0_6: # %bb2146; RV64I-SMALL-NEXT: li a0, 3147; RV64I-SMALL-NEXT: j .LBB0_8148; RV64I-SMALL-NEXT: .LBB0_7: # %bb6149; RV64I-SMALL-NEXT: li a0, 200150; RV64I-SMALL-NEXT: .LBB0_8: # %exit151; RV64I-SMALL-NEXT: sw a0, 0(a1)152; RV64I-SMALL-NEXT: .LBB0_9: # %exit153; RV64I-SMALL-NEXT: ret154;155; RV64I-MEDIUM-LABEL: above_threshold:156; RV64I-MEDIUM: # %bb.0: # %entry157; RV64I-MEDIUM-NEXT: li a2, 5158; RV64I-MEDIUM-NEXT: addi a0, a0, -1159; RV64I-MEDIUM-NEXT: bltu a2, a0, .LBB0_9160; RV64I-MEDIUM-NEXT: # %bb.1: # %entry161; RV64I-MEDIUM-NEXT: .Lpcrel_hi0:162; RV64I-MEDIUM-NEXT: auipc a2, %pcrel_hi(.LJTI0_0)163; RV64I-MEDIUM-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)164; RV64I-MEDIUM-NEXT: slli a0, a0, 3165; RV64I-MEDIUM-NEXT: add a0, a2, a0166; RV64I-MEDIUM-NEXT: ld a0, 0(a0)167; RV64I-MEDIUM-NEXT: jr a0168; RV64I-MEDIUM-NEXT: .LBB0_2: # %bb1169; RV64I-MEDIUM-NEXT: li a0, 4170; RV64I-MEDIUM-NEXT: j .LBB0_8171; RV64I-MEDIUM-NEXT: .LBB0_3: # %bb5172; RV64I-MEDIUM-NEXT: li a0, 100173; RV64I-MEDIUM-NEXT: j .LBB0_8174; RV64I-MEDIUM-NEXT: .LBB0_4: # %bb3175; RV64I-MEDIUM-NEXT: li a0, 2176; RV64I-MEDIUM-NEXT: j .LBB0_8177; RV64I-MEDIUM-NEXT: .LBB0_5: # %bb4178; RV64I-MEDIUM-NEXT: li a0, 1179; RV64I-MEDIUM-NEXT: j .LBB0_8180; RV64I-MEDIUM-NEXT: .LBB0_6: # %bb2181; RV64I-MEDIUM-NEXT: li a0, 3182; RV64I-MEDIUM-NEXT: j .LBB0_8183; RV64I-MEDIUM-NEXT: .LBB0_7: # %bb6184; RV64I-MEDIUM-NEXT: li a0, 200185; RV64I-MEDIUM-NEXT: .LBB0_8: # %exit186; RV64I-MEDIUM-NEXT: sw a0, 0(a1)187; RV64I-MEDIUM-NEXT: .LBB0_9: # %exit188; RV64I-MEDIUM-NEXT: ret189;190; RV64I-PIC-LABEL: above_threshold:191; RV64I-PIC: # %bb.0: # %entry192; RV64I-PIC-NEXT: li a2, 5193; RV64I-PIC-NEXT: addi a0, a0, -1194; RV64I-PIC-NEXT: bltu a2, a0, .LBB0_9195; RV64I-PIC-NEXT: # %bb.1: # %entry196; RV64I-PIC-NEXT: .Lpcrel_hi0:197; RV64I-PIC-NEXT: auipc a2, %pcrel_hi(.LJTI0_0)198; RV64I-PIC-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)199; RV64I-PIC-NEXT: slli a0, a0, 2200; RV64I-PIC-NEXT: add a0, a2, a0201; RV64I-PIC-NEXT: lw a0, 0(a0)202; RV64I-PIC-NEXT: add a0, a2, a0203; RV64I-PIC-NEXT: jr a0204; RV64I-PIC-NEXT: .LBB0_2: # %bb1205; RV64I-PIC-NEXT: li a0, 4206; RV64I-PIC-NEXT: j .LBB0_8207; RV64I-PIC-NEXT: .LBB0_3: # %bb5208; RV64I-PIC-NEXT: li a0, 100209; RV64I-PIC-NEXT: j .LBB0_8210; RV64I-PIC-NEXT: .LBB0_4: # %bb3211; RV64I-PIC-NEXT: li a0, 2212; RV64I-PIC-NEXT: j .LBB0_8213; RV64I-PIC-NEXT: .LBB0_5: # %bb4214; RV64I-PIC-NEXT: li a0, 1215; RV64I-PIC-NEXT: j .LBB0_8216; RV64I-PIC-NEXT: .LBB0_6: # %bb2217; RV64I-PIC-NEXT: li a0, 3218; RV64I-PIC-NEXT: j .LBB0_8219; RV64I-PIC-NEXT: .LBB0_7: # %bb6220; RV64I-PIC-NEXT: li a0, 200221; RV64I-PIC-NEXT: .LBB0_8: # %exit222; RV64I-PIC-NEXT: sw a0, 0(a1)223; RV64I-PIC-NEXT: .LBB0_9: # %exit224; RV64I-PIC-NEXT: ret225entry:226 switch i32 %in, label %exit [227 i32 1, label %bb1228 i32 2, label %bb2229 i32 3, label %bb3230 i32 4, label %bb4231 i32 5, label %bb5232 i32 6, label %bb6233 ]234bb1:235 store i32 4, ptr %out236 br label %exit237bb2:238 store i32 3, ptr %out239 br label %exit240bb3:241 store i32 2, ptr %out242 br label %exit243bb4:244 store i32 1, ptr %out245 br label %exit246bb5:247 store i32 100, ptr %out248 br label %exit249bb6:250 store i32 200, ptr %out251 br label %exit252exit:253 ret void254}255