brintos

brintos / llvm-project-archived public Read only

0
0
Text · 15.6 KiB · deb65d4 Raw
345 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \3# RUN:   | FileCheck %s --check-prefixes=RV64I4# RUN: llc -mtriple=riscv64 -mattr=+zbb -run-pass=legalizer %s -o - \5# RUN:   | FileCheck %s --check-prefixes=RV64ZBB6 7---8name:            abds_i89body:             |10  bb.0.entry:11    liveins: $x10, $x1112    ; RV64I-LABEL: name: abds_i813    ; RV64I: liveins: $x10, $x1114    ; RV64I-NEXT: {{  $}}15    ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1016    ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1117    ; RV64I-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 818    ; RV64I-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 819    ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT]], [[ASSERT_SEXT1]]20    ; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT1]], [[ASSERT_SEXT]]21    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASSERT_SEXT]](s64), [[ASSERT_SEXT1]]22    ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SUB]](s64)23    ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SUB1]](s64)24    ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]25    ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)26    ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)27    ; RV64I-NEXT: PseudoRET implicit $x1028    ;29    ; RV64ZBB-LABEL: name: abds_i830    ; RV64ZBB: liveins: $x10, $x1131    ; RV64ZBB-NEXT: {{  $}}32    ; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1033    ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1134    ; RV64ZBB-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 835    ; RV64ZBB-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 836    ; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[ASSERT_SEXT]], [[ASSERT_SEXT1]]37    ; RV64ZBB-NEXT: [[SMIN:%[0-9]+]]:_(s64) = G_SMIN [[ASSERT_SEXT]], [[ASSERT_SEXT1]]38    ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[SMAX]], [[SMIN]]39    ; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)40    ; RV64ZBB-NEXT: PseudoRET implicit $x1041    %1:_(s64) = COPY $x1042    %2:_(s64) = COPY $x1143    %3:_(s64) = G_ASSERT_SEXT %1, 844    %4:_(s64) = G_ASSERT_SEXT %2, 845    %5:_(s8) = G_TRUNC %3(s64)46    %6:_(s8) = G_TRUNC %4(s64)47    %7:_(s8) = G_ABDS %5, %648    %8:_(s64) = G_ANYEXT %7(s8)49    $x10 = COPY %8(s64)50    PseudoRET implicit $x1051...52---53name:            abds_i1654body:             |55  bb.0.entry:56    liveins: $x10, $x1157 58    ; RV64I-LABEL: name: abds_i1659    ; RV64I: liveins: $x10, $x1160    ; RV64I-NEXT: {{  $}}61    ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1062    ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1163    ; RV64I-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 1664    ; RV64I-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 1665    ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT]], [[ASSERT_SEXT1]]66    ; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT1]], [[ASSERT_SEXT]]67    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASSERT_SEXT]](s64), [[ASSERT_SEXT1]]68    ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SUB]](s64)69    ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SUB1]](s64)70    ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]71    ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)72    ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)73    ; RV64I-NEXT: PseudoRET implicit $x1074    ;75    ; RV64ZBB-LABEL: name: abds_i1676    ; RV64ZBB: liveins: $x10, $x1177    ; RV64ZBB-NEXT: {{  $}}78    ; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1079    ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1180    ; RV64ZBB-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 1681    ; RV64ZBB-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 1682    ; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[ASSERT_SEXT]], [[ASSERT_SEXT1]]83    ; RV64ZBB-NEXT: [[SMIN:%[0-9]+]]:_(s64) = G_SMIN [[ASSERT_SEXT]], [[ASSERT_SEXT1]]84    ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[SMAX]], [[SMIN]]85    ; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)86    ; RV64ZBB-NEXT: PseudoRET implicit $x1087    %1:_(s64) = COPY $x1088    %2:_(s64) = COPY $x1189    %3:_(s64) = G_ASSERT_SEXT %1, 1690    %4:_(s64) = G_ASSERT_SEXT %2, 1691    %5:_(s16) = G_TRUNC %3(s64)92    %6:_(s16) = G_TRUNC %4(s64)93    %7:_(s16) = G_ABDS %5, %694    %8:_(s64) = G_ANYEXT %7(s16)95    $x10 = COPY %8(s64)96    PseudoRET implicit $x1097...98---99name:            abds_i32100body:             |101  bb.0.entry:102    liveins: $x10, $x11103 104    ; RV64I-LABEL: name: abds_i32105    ; RV64I: liveins: $x10, $x11106    ; RV64I-NEXT: {{  $}}107    ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10108    ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11109    ; RV64I-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 32110    ; RV64I-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 32111    ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT]], [[ASSERT_SEXT1]]112    ; RV64I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SUB]], 32113    ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SEXT_INREG]](s64)114    ; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_SEXT1]], [[ASSERT_SEXT]]115    ; RV64I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SUB1]], 32116    ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SEXT_INREG1]](s64)117    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[ASSERT_SEXT]](s64), [[ASSERT_SEXT1]]118    ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]119    ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)120    ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)121    ; RV64I-NEXT: PseudoRET implicit $x10122    ;123    ; RV64ZBB-LABEL: name: abds_i32124    ; RV64ZBB: liveins: $x10, $x11125    ; RV64ZBB-NEXT: {{  $}}126    ; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10127    ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11128    ; RV64ZBB-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 32129    ; RV64ZBB-NEXT: [[ASSERT_SEXT1:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY1]], 32130    ; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[ASSERT_SEXT]], [[ASSERT_SEXT1]]131    ; RV64ZBB-NEXT: [[SMIN:%[0-9]+]]:_(s64) = G_SMIN [[ASSERT_SEXT]], [[ASSERT_SEXT1]]132    ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[SMAX]], [[SMIN]]133    ; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)134    ; RV64ZBB-NEXT: PseudoRET implicit $x10135    %1:_(s64) = COPY $x10136    %2:_(s64) = COPY $x11137    %3:_(s64) = G_ASSERT_SEXT %1, 32138    %4:_(s64) = G_ASSERT_SEXT %2, 32139    %5:_(s32) = G_TRUNC %3(s64)140    %6:_(s32) = G_TRUNC %4(s64)141    %7:_(s32) = G_ABDS %5, %6142    %8:_(s64) = G_ANYEXT %7(s32)143    $x10 = COPY %8(s64)144    PseudoRET implicit $x10145...146---147name:            abds_i64148body:             |149  bb.0.entry:150 151    ; RV64I-LABEL: name: abds_i64152    ; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10153    ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11154    ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]155    ; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[COPY1]], [[COPY]]156    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(sgt), [[COPY]](s64), [[COPY1]]157    ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s64), [[SUB]], [[SUB1]]158    ; RV64I-NEXT: $x10 = COPY [[SELECT]](s64)159    ; RV64I-NEXT: PseudoRET implicit $x10160    ;161    ; RV64ZBB-LABEL: name: abds_i64162    ; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x10163    ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11164    ; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[COPY]], [[COPY1]]165    ; RV64ZBB-NEXT: [[SMIN:%[0-9]+]]:_(s64) = G_SMIN [[COPY]], [[COPY1]]166    ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[SMAX]], [[SMIN]]167    ; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)168    ; RV64ZBB-NEXT: PseudoRET implicit $x10169    %1:_(s64) = COPY $x10170    %2:_(s64) = COPY $x11171    %3:_(s64) = G_ABDS %1, %2172    $x10 = COPY %3(s64)173    PseudoRET implicit $x10174...175---176name:            abdu_i8177body:             |178  bb.0.entry:179    liveins: $x10, $x11180    ; RV64I-LABEL: name: abdu_i8181    ; RV64I: liveins: $x10, $x11182    ; RV64I-NEXT: {{  $}}183    ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10184    ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11185    ; RV64I-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 8186    ; RV64I-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 8187    ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]188    ; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT1]], [[ASSERT_ZEXT]]189    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[ASSERT_ZEXT]](s64), [[ASSERT_ZEXT1]]190    ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SUB]](s64)191    ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SUB1]](s64)192    ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]193    ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)194    ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)195    ; RV64I-NEXT: PseudoRET implicit $x10196    ;197    ; RV64ZBB-LABEL: name: abdu_i8198    ; RV64ZBB: liveins: $x10, $x11199    ; RV64ZBB-NEXT: {{  $}}200    ; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10201    ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11202    ; RV64ZBB-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 8203    ; RV64ZBB-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 8204    ; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]205    ; RV64ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s64) = G_UMIN [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]206    ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[UMAX]], [[UMIN]]207    ; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)208    ; RV64ZBB-NEXT: PseudoRET implicit $x10209    %1:_(s64) = COPY $x10210    %2:_(s64) = COPY $x11211    %3:_(s64) = G_ASSERT_ZEXT %1, 8212    %4:_(s64) = G_ASSERT_ZEXT %2, 8213    %5:_(s8) = G_TRUNC %3(s64)214    %6:_(s8) = G_TRUNC %4(s64)215    %7:_(s8) = G_ABDU %5, %6216    %8:_(s64) = G_ANYEXT %7(s8)217    $x10 = COPY %8(s64)218    PseudoRET implicit $x10219...220---221name:            abdu_i16222body:             |223  bb.0.entry:224    liveins: $x10, $x11225 226    ; RV64I-LABEL: name: abdu_i16227    ; RV64I: liveins: $x10, $x11228    ; RV64I-NEXT: {{  $}}229    ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10230    ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11231    ; RV64I-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 16232    ; RV64I-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 16233    ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]234    ; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT1]], [[ASSERT_ZEXT]]235    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[ASSERT_ZEXT]](s64), [[ASSERT_ZEXT1]]236    ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SUB]](s64)237    ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SUB1]](s64)238    ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]239    ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)240    ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)241    ; RV64I-NEXT: PseudoRET implicit $x10242    ;243    ; RV64ZBB-LABEL: name: abdu_i16244    ; RV64ZBB: liveins: $x10, $x11245    ; RV64ZBB-NEXT: {{  $}}246    ; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10247    ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11248    ; RV64ZBB-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 16249    ; RV64ZBB-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 16250    ; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]251    ; RV64ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s64) = G_UMIN [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]252    ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[UMAX]], [[UMIN]]253    ; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)254    ; RV64ZBB-NEXT: PseudoRET implicit $x10255    %1:_(s64) = COPY $x10256    %2:_(s64) = COPY $x11257    %3:_(s64) = G_ASSERT_ZEXT %1, 16258    %4:_(s64) = G_ASSERT_ZEXT %2, 16259    %5:_(s16) = G_TRUNC %3(s64)260    %6:_(s16) = G_TRUNC %4(s64)261    %7:_(s16) = G_ABDU %5, %6262    %8:_(s64) = G_ANYEXT %7(s16)263    $x10 = COPY %8(s64)264    PseudoRET implicit $x10265...266---267name:            abdu_i32268body:             |269  bb.0.entry:270    liveins: $x10, $x11271 272    ; RV64I-LABEL: name: abdu_i32273    ; RV64I: liveins: $x10, $x11274    ; RV64I-NEXT: {{  $}}275    ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10276    ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11277    ; RV64I-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 32278    ; RV64I-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 32279    ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]280    ; RV64I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SUB]], 32281    ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[SEXT_INREG]](s64)282    ; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[ASSERT_ZEXT1]], [[ASSERT_ZEXT]]283    ; RV64I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SUB1]], 32284    ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[SEXT_INREG1]](s64)285    ; RV64I-NEXT: [[SEXT_INREG2:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ASSERT_ZEXT]], 32286    ; RV64I-NEXT: [[SEXT_INREG3:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ASSERT_ZEXT1]], 32287    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[SEXT_INREG2]](s64), [[SEXT_INREG3]]288    ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]289    ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)290    ; RV64I-NEXT: $x10 = COPY [[ANYEXT]](s64)291    ; RV64I-NEXT: PseudoRET implicit $x10292    ;293    ; RV64ZBB-LABEL: name: abdu_i32294    ; RV64ZBB: liveins: $x10, $x11295    ; RV64ZBB-NEXT: {{  $}}296    ; RV64ZBB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10297    ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11298    ; RV64ZBB-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 32299    ; RV64ZBB-NEXT: [[ASSERT_ZEXT1:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY1]], 32300    ; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]301    ; RV64ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s64) = G_UMIN [[ASSERT_ZEXT]], [[ASSERT_ZEXT1]]302    ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[UMAX]], [[UMIN]]303    ; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)304    ; RV64ZBB-NEXT: PseudoRET implicit $x10305    %1:_(s64) = COPY $x10306    %2:_(s64) = COPY $x11307    %3:_(s64) = G_ASSERT_ZEXT %1, 32308    %4:_(s64) = G_ASSERT_ZEXT %2, 32309    %5:_(s32) = G_TRUNC %3(s64)310    %6:_(s32) = G_TRUNC %4(s64)311    %7:_(s32) = G_ABDU %5, %6312    %8:_(s64) = G_ANYEXT %7(s32)313    $x10 = COPY %8(s64)314    PseudoRET implicit $x10315...316---317name:            abdu_i64318body:             |319  bb.0.entry:320 321    ; RV64I-LABEL: name: abdu_i64322    ; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10323    ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11324    ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]325    ; RV64I-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[COPY1]], [[COPY]]326    ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[COPY]](s64), [[COPY1]]327    ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s64), [[SUB]], [[SUB1]]328    ; RV64I-NEXT: $x10 = COPY [[SELECT]](s64)329    ; RV64I-NEXT: PseudoRET implicit $x10330    ;331    ; RV64ZBB-LABEL: name: abdu_i64332    ; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x10333    ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11334    ; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[COPY]], [[COPY1]]335    ; RV64ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s64) = G_UMIN [[COPY]], [[COPY1]]336    ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[UMAX]], [[UMIN]]337    ; RV64ZBB-NEXT: $x10 = COPY [[SUB]](s64)338    ; RV64ZBB-NEXT: PseudoRET implicit $x10339    %1:_(s64) = COPY $x10340    %2:_(s64) = COPY $x11341    %3:_(s64) = G_ABDU %1, %2342    $x10 = COPY %3(s64)343    PseudoRET implicit $x10344...345