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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \3# RUN: | FileCheck %s --check-prefix=RV64I4# RUN: llc -mtriple=riscv64 -mattr=+zbb -run-pass=legalizer %s -o - \5# RUN: | FileCheck %s --check-prefix=RV64ZBB6 7---8name: abs_i89body: |10 bb.0.entry:11 ; RV64I-LABEL: name: abs_i812 ; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x1013 ; RV64I-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 814 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 715 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 5616 ; RV64I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ASSERT_ZEXT]], [[C1]](s64)17 ; RV64I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C1]](s64)18 ; RV64I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[ASHR]], [[C]](s64)19 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[ASSERT_ZEXT]], [[ASHR1]]20 ; RV64I-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ADD]], [[ASHR1]]21 ; RV64I-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 25522 ; RV64I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[XOR]], [[C2]]23 ; RV64I-NEXT: $x10 = COPY [[AND]](s64)24 ; RV64I-NEXT: PseudoRET implicit $x1025 ;26 ; RV64ZBB-LABEL: name: abs_i827 ; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x1028 ; RV64ZBB-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 829 ; RV64ZBB-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ASSERT_ZEXT]], 830 ; RV64ZBB-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 031 ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[SEXT_INREG]]32 ; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[SEXT_INREG]], [[SUB]]33 ; RV64ZBB-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 25534 ; RV64ZBB-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[SMAX]], [[C1]]35 ; RV64ZBB-NEXT: $x10 = COPY [[AND]](s64)36 ; RV64ZBB-NEXT: PseudoRET implicit $x1037 %1:_(s64) = COPY $x1038 %2:_(s64) = G_ASSERT_ZEXT %1, 839 %0:_(s8) = G_TRUNC %2(s64)40 %3:_(s8) = G_ABS %041 %4:_(s64) = G_ZEXT %3(s8)42 $x10 = COPY %4(s64)43 PseudoRET implicit $x1044...45---46name: abs_i1647body: |48 bb.0.entry:49 ; RV64I-LABEL: name: abs_i1650 ; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x1051 ; RV64I-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 1652 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1553 ; RV64I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[ASSERT_SEXT]], [[C]](s64)54 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[ASSERT_SEXT]], [[ASHR]]55 ; RV64I-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ADD]], [[ASHR]]56 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4857 ; RV64I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[XOR]], [[C1]](s64)58 ; RV64I-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C1]](s64)59 ; RV64I-NEXT: $x10 = COPY [[ASHR1]](s64)60 ; RV64I-NEXT: PseudoRET implicit $x1061 ;62 ; RV64ZBB-LABEL: name: abs_i1663 ; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x1064 ; RV64ZBB-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 1665 ; RV64ZBB-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 066 ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[ASSERT_SEXT]]67 ; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[ASSERT_SEXT]], [[SUB]]68 ; RV64ZBB-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SMAX]], 1669 ; RV64ZBB-NEXT: $x10 = COPY [[SEXT_INREG]](s64)70 ; RV64ZBB-NEXT: PseudoRET implicit $x1071 %1:_(s64) = COPY $x1072 %2:_(s64) = G_ASSERT_SEXT %1, 1673 %0:_(s16) = G_TRUNC %2(s64)74 %3:_(s16) = G_ABS %075 %4:_(s64) = G_SEXT %3(s16)76 $x10 = COPY %4(s64)77 PseudoRET implicit $x1078...79---80name: abs_i3281body: |82 bb.0.entry:83 ; RV64I-LABEL: name: abs_i3284 ; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x1085 ; RV64I-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 3286 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 3187 ; RV64I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[ASSERT_SEXT]], [[C]](s64)88 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[ASSERT_SEXT]], [[ASHR]]89 ; RV64I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ADD]], 3290 ; RV64I-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SEXT_INREG]], [[ASHR]]91 ; RV64I-NEXT: $x10 = COPY [[XOR]](s64)92 ; RV64I-NEXT: PseudoRET implicit $x1093 ;94 ; RV64ZBB-LABEL: name: abs_i3295 ; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x1096 ; RV64ZBB-NEXT: [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 3297 ; RV64ZBB-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 098 ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[ASSERT_SEXT]]99 ; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[ASSERT_SEXT]], [[SUB]]100 ; RV64ZBB-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SMAX]], 32101 ; RV64ZBB-NEXT: $x10 = COPY [[SEXT_INREG]](s64)102 ; RV64ZBB-NEXT: PseudoRET implicit $x10103 %1:_(s64) = COPY $x10104 %2:_(s64) = G_ASSERT_SEXT %1, 32105 %0:_(s32) = G_TRUNC %2(s64)106 %3:_(s32) = G_ABS %0107 %4:_(s64) = G_SEXT %3(s32)108 $x10 = COPY %4(s64)109 PseudoRET implicit $x10110...111---112name: abs_i64113body: |114 bb.0.entry:115 ; RV64I-LABEL: name: abs_i64116 ; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10117 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 63118 ; RV64I-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[COPY]], [[C]](s64)119 ; RV64I-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[ASHR]]120 ; RV64I-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ADD]], [[ASHR]]121 ; RV64I-NEXT: $x10 = COPY [[XOR]](s64)122 ; RV64I-NEXT: PseudoRET implicit $x10123 ;124 ; RV64ZBB-LABEL: name: abs_i64125 ; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x10126 ; RV64ZBB-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0127 ; RV64ZBB-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY]]128 ; RV64ZBB-NEXT: [[SMAX:%[0-9]+]]:_(s64) = G_SMAX [[COPY]], [[SUB]]129 ; RV64ZBB-NEXT: $x10 = COPY [[SMAX]](s64)130 ; RV64ZBB-NEXT: PseudoRET implicit $x10131 %0:_(s64) = COPY $x10132 %1:_(s64) = G_ABS %0133 $x10 = COPY %1(s64)134 PseudoRET implicit $x10135...136