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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \3# RUN: | FileCheck %s --check-prefix=RV64I4# RUN: llc -mtriple=riscv64 -mattr=+zbb -run-pass=legalizer %s -o - \5# RUN: | FileCheck %s --check-prefix=RV64ZBB_OR_RV64ZBKB6# RUN: llc -mtriple=riscv64 -mattr=+zbkb -run-pass=legalizer %s -o - \7# RUN: | FileCheck %s --check-prefix=RV64ZBB_OR_RV64ZBKB8 9---10name: bswap_i1611body: |12 bb.0:13 liveins: $x1014 ; RV64I-LABEL: name: bswap_i1615 ; RV64I: liveins: $x1016 ; RV64I-NEXT: {{ $}}17 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1018 ; RV64I-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 1619 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 820 ; RV64I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ASSERT_ZEXT]], [[C]](s64)21 ; RV64I-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[ASSERT_ZEXT]], [[C]](s64)22 ; RV64I-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]23 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 6553524 ; RV64I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[OR]], [[C1]]25 ; RV64I-NEXT: $x10 = COPY [[AND]](s64)26 ; RV64I-NEXT: PseudoRET implicit $x1027 ;28 ; RV64ZBB_OR_RV64ZBKB-LABEL: name: bswap_i1629 ; RV64ZBB_OR_RV64ZBKB: liveins: $x1030 ; RV64ZBB_OR_RV64ZBKB-NEXT: {{ $}}31 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1032 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 1633 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[BSWAP:%[0-9]+]]:_(s64) = G_BSWAP [[ASSERT_ZEXT]]34 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4835 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[BSWAP]], [[C]](s64)36 ; RV64ZBB_OR_RV64ZBKB-NEXT: $x10 = COPY [[LSHR]](s64)37 ; RV64ZBB_OR_RV64ZBKB-NEXT: PseudoRET implicit $x1038 %0:_(s64) = COPY $x1039 %1:_(s64) = G_ASSERT_ZEXT %0, 1640 %2:_(s16) = G_TRUNC %1(s64)41 %3:_(s16) = G_BSWAP %242 %4:_(s64) = G_ZEXT %3(s16)43 $x10 = COPY %4(s64)44 PseudoRET implicit $x1045...46---47name: bswap_i3248body: |49 bb.0:50 liveins: $x1051 ; RV64I-LABEL: name: bswap_i3252 ; RV64I: liveins: $x1053 ; RV64I-NEXT: {{ $}}54 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1055 ; RV64I-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 3256 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 2457 ; RV64I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ASSERT_ZEXT]], [[C]](s64)58 ; RV64I-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[ASSERT_ZEXT]], [[C]](s64)59 ; RV64I-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]60 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 6528061 ; RV64I-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 862 ; RV64I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ASSERT_ZEXT]], [[C1]]63 ; RV64I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[AND]], [[C2]](s64)64 ; RV64I-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[SHL1]]65 ; RV64I-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[ASSERT_ZEXT]], [[C2]](s64)66 ; RV64I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[LSHR1]], [[C1]]67 ; RV64I-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[AND1]]68 ; RV64I-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 429496729569 ; RV64I-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[OR2]], [[C3]]70 ; RV64I-NEXT: $x10 = COPY [[AND2]](s64)71 ; RV64I-NEXT: PseudoRET implicit $x1072 ;73 ; RV64ZBB_OR_RV64ZBKB-LABEL: name: bswap_i3274 ; RV64ZBB_OR_RV64ZBKB: liveins: $x1075 ; RV64ZBB_OR_RV64ZBKB-NEXT: {{ $}}76 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1077 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 3278 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[BSWAP:%[0-9]+]]:_(s64) = G_BSWAP [[ASSERT_ZEXT]]79 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 3280 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[BSWAP]], [[C]](s64)81 ; RV64ZBB_OR_RV64ZBKB-NEXT: $x10 = COPY [[LSHR]](s64)82 ; RV64ZBB_OR_RV64ZBKB-NEXT: PseudoRET implicit $x1083 %0:_(s64) = COPY $x1084 %1:_(s64) = G_ASSERT_ZEXT %0, 3285 %2:_(s32) = G_TRUNC %1(s64)86 %3:_(s32) = G_BSWAP %287 %4:_(s64) = G_ZEXT %3(s32)88 $x10 = COPY %4(s64)89 PseudoRET implicit $x1090...91---92name: bswap_i6493body: |94 bb.0:95 liveins: $x1096 ; RV64I-LABEL: name: bswap_i6497 ; RV64I: liveins: $x1098 ; RV64I-NEXT: {{ $}}99 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10100 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 56101 ; RV64I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[C]](s64)102 ; RV64I-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[C]](s64)103 ; RV64I-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]104 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 65280105 ; RV64I-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 40106 ; RV64I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C1]]107 ; RV64I-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[AND]], [[C2]](s64)108 ; RV64I-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[SHL1]]109 ; RV64I-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[C2]](s64)110 ; RV64I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[LSHR1]], [[C1]]111 ; RV64I-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[AND1]]112 ; RV64I-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16711680113 ; RV64I-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 24114 ; RV64I-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C3]]115 ; RV64I-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[AND2]], [[C4]](s64)116 ; RV64I-NEXT: [[OR3:%[0-9]+]]:_(s64) = G_OR [[OR2]], [[SHL2]]117 ; RV64I-NEXT: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[C4]](s64)118 ; RV64I-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[LSHR2]], [[C3]]119 ; RV64I-NEXT: [[OR4:%[0-9]+]]:_(s64) = G_OR [[OR3]], [[AND3]]120 ; RV64I-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 -16777216121 ; RV64I-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 8122 ; RV64I-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C5]]123 ; RV64I-NEXT: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[AND4]], [[C6]](s64)124 ; RV64I-NEXT: [[OR5:%[0-9]+]]:_(s64) = G_OR [[OR4]], [[SHL3]]125 ; RV64I-NEXT: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[C6]](s64)126 ; RV64I-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[LSHR3]], [[C5]]127 ; RV64I-NEXT: [[OR6:%[0-9]+]]:_(s64) = G_OR [[OR5]], [[AND5]]128 ; RV64I-NEXT: $x10 = COPY [[OR6]](s64)129 ; RV64I-NEXT: PseudoRET implicit $x10130 ;131 ; RV64ZBB_OR_RV64ZBKB-LABEL: name: bswap_i64132 ; RV64ZBB_OR_RV64ZBKB: liveins: $x10133 ; RV64ZBB_OR_RV64ZBKB-NEXT: {{ $}}134 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10135 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[BSWAP:%[0-9]+]]:_(s64) = G_BSWAP [[COPY]]136 ; RV64ZBB_OR_RV64ZBKB-NEXT: $x10 = COPY [[BSWAP]](s64)137 ; RV64ZBB_OR_RV64ZBKB-NEXT: PseudoRET implicit $x10138 %0:_(s64) = COPY $x10139 %1:_(s64) = G_BSWAP %0140 $x10 = COPY %1(s64)141 PseudoRET implicit $x10142...143 144