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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \3# RUN: | FileCheck %s --check-prefixes=CHECK,RV64I4# RUN: llc -mtriple=riscv64 -mattr=+zbb -run-pass=legalizer %s -o - \5# RUN: | FileCheck %s --check-prefixes=CHECK,RV64ZBB_OR_RV64ZBKB6# RUN: llc -mtriple=riscv64 -mattr=+zbkb -run-pass=legalizer %s -o - \7# RUN: | FileCheck %s --check-prefixes=CHECK,RV64ZBB_OR_RV64ZBKB8 9---10name: rotl_i811body: |12 bb.1:13 liveins: $x10, $x1114 15 ; CHECK-LABEL: name: rotl_i816 ; CHECK: liveins: $x10, $x1117 ; CHECK-NEXT: {{ $}}18 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1019 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1120 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 021 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 722 ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY1]]23 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]24 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 25525 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[AND]], [[C2]]26 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND1]](s64)27 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C1]]28 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C2]]29 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND3]], [[AND2]](s64)30 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]]31 ; CHECK-NEXT: $x10 = COPY [[OR]](s64)32 ; CHECK-NEXT: PseudoRET implicit $x1033 %2:_(s64) = COPY $x1034 %0:_(s8) = G_TRUNC %2(s64)35 %3:_(s64) = COPY $x1136 %1:_(s8) = G_TRUNC %3(s64)37 %4:_(s8) = G_ROTL %0, %1(s8)38 %5:_(s64) = G_ANYEXT %4(s8)39 $x10 = COPY %5(s64)40 PseudoRET implicit $x1041 42...43---44name: rotl_i1645body: |46 bb.1:47 liveins: $x10, $x1148 49 ; CHECK-LABEL: name: rotl_i1650 ; CHECK: liveins: $x10, $x1151 ; CHECK-NEXT: {{ $}}52 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1053 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1154 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 055 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1556 ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY1]]57 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]58 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 6553559 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[AND]], [[C2]]60 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND1]](s64)61 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C1]]62 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C2]]63 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND3]], [[AND2]](s64)64 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]]65 ; CHECK-NEXT: $x10 = COPY [[OR]](s64)66 ; CHECK-NEXT: PseudoRET implicit $x1067 %2:_(s64) = COPY $x1068 %0:_(s16) = G_TRUNC %2(s64)69 %3:_(s64) = COPY $x1170 %1:_(s16) = G_TRUNC %3(s64)71 %4:_(s16) = G_ROTL %0, %1(s16)72 %5:_(s64) = G_ANYEXT %4(s16)73 $x10 = COPY %5(s64)74 PseudoRET implicit $x1075 76...77---78name: rotl_i3279body: |80 bb.1:81 liveins: $x10, $x1182 83 ; RV64I-LABEL: name: rotl_i3284 ; RV64I: liveins: $x10, $x1185 ; RV64I-NEXT: {{ $}}86 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1087 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1188 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 089 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 3190 ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY1]]91 ; RV64I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SUB]], 3292 ; RV64I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]93 ; RV64I-NEXT: [[SLLW:%[0-9]+]]:_(s64) = G_SLLW [[COPY]], [[AND]]94 ; RV64I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SEXT_INREG]], [[C1]]95 ; RV64I-NEXT: [[SRLW:%[0-9]+]]:_(s64) = G_SRLW [[COPY]], [[AND1]]96 ; RV64I-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SLLW]], [[SRLW]]97 ; RV64I-NEXT: $x10 = COPY [[OR]](s64)98 ; RV64I-NEXT: PseudoRET implicit $x1099 ;100 ; RV64ZBB_OR_RV64ZBKB-LABEL: name: rotl_i32101 ; RV64ZBB_OR_RV64ZBKB: liveins: $x10, $x11102 ; RV64ZBB_OR_RV64ZBKB-NEXT: {{ $}}103 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10104 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11105 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[ROLW:%[0-9]+]]:_(s64) = G_ROLW [[COPY]], [[COPY1]]106 ; RV64ZBB_OR_RV64ZBKB-NEXT: $x10 = COPY [[ROLW]](s64)107 ; RV64ZBB_OR_RV64ZBKB-NEXT: PseudoRET implicit $x10108 %2:_(s64) = COPY $x10109 %0:_(s32) = G_TRUNC %2(s64)110 %3:_(s64) = COPY $x11111 %1:_(s32) = G_TRUNC %3(s64)112 %4:_(s32) = G_ROTL %0, %1(s32)113 %5:_(s64) = G_ANYEXT %4(s32)114 $x10 = COPY %5(s64)115 PseudoRET implicit $x10116 117...118---119name: rotl_i64120body: |121 bb.1:122 liveins: $x10, $x11123 124 ; RV64I-LABEL: name: rotl_i64125 ; RV64I: liveins: $x10, $x11126 ; RV64I-NEXT: {{ $}}127 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10128 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11129 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0130 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 63131 ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY1]]132 ; RV64I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]133 ; RV64I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND]](s64)134 ; RV64I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C1]]135 ; RV64I-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[AND1]](s64)136 ; RV64I-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[LSHR]]137 ; RV64I-NEXT: $x10 = COPY [[OR]](s64)138 ; RV64I-NEXT: PseudoRET implicit $x10139 ;140 ; RV64ZBB_OR_RV64ZBKB-LABEL: name: rotl_i64141 ; RV64ZBB_OR_RV64ZBKB: liveins: $x10, $x11142 ; RV64ZBB_OR_RV64ZBKB-NEXT: {{ $}}143 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10144 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11145 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[ROTL:%[0-9]+]]:_(s64) = G_ROTL [[COPY]], [[COPY1]](s64)146 ; RV64ZBB_OR_RV64ZBKB-NEXT: $x10 = COPY [[ROTL]](s64)147 ; RV64ZBB_OR_RV64ZBKB-NEXT: PseudoRET implicit $x10148 %0:_(s64) = COPY $x10149 %1:_(s64) = COPY $x11150 %2:_(s64) = G_ROTL %0, %1(s64)151 $x10 = COPY %2(s64)152 PseudoRET implicit $x10153 154...155---156name: rotr_i8157body: |158 bb.1:159 liveins: $x10, $x11160 161 ; CHECK-LABEL: name: rotr_i8162 ; CHECK: liveins: $x10, $x11163 ; CHECK-NEXT: {{ $}}164 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10165 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11166 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0167 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 7168 ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY1]]169 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]170 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 255171 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[AND]], [[C2]]172 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C2]]173 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND2]], [[AND1]](s64)174 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C1]]175 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND3]](s64)176 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]177 ; CHECK-NEXT: $x10 = COPY [[OR]](s64)178 ; CHECK-NEXT: PseudoRET implicit $x10179 %2:_(s64) = COPY $x10180 %0:_(s8) = G_TRUNC %2(s64)181 %3:_(s64) = COPY $x11182 %1:_(s8) = G_TRUNC %3(s64)183 %4:_(s8) = G_ROTR %0, %1(s8)184 %5:_(s64) = G_ANYEXT %4(s8)185 $x10 = COPY %5(s64)186 PseudoRET implicit $x10187 188...189---190name: rotr_i16191body: |192 bb.1:193 liveins: $x10, $x11194 195 ; CHECK-LABEL: name: rotr_i16196 ; CHECK: liveins: $x10, $x11197 ; CHECK-NEXT: {{ $}}198 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10199 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11200 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0201 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15202 ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY1]]203 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]204 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535205 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[AND]], [[C2]]206 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C2]]207 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[AND2]], [[AND1]](s64)208 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C1]]209 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND3]](s64)210 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]211 ; CHECK-NEXT: $x10 = COPY [[OR]](s64)212 ; CHECK-NEXT: PseudoRET implicit $x10213 %2:_(s64) = COPY $x10214 %0:_(s16) = G_TRUNC %2(s64)215 %3:_(s64) = COPY $x11216 %1:_(s16) = G_TRUNC %3(s64)217 %4:_(s16) = G_ROTR %0, %1(s16)218 %5:_(s64) = G_ANYEXT %4(s16)219 $x10 = COPY %5(s64)220 PseudoRET implicit $x10221 222...223---224name: rotr_i32225body: |226 bb.1:227 liveins: $x10, $x11228 229 ; RV64I-LABEL: name: rotr_i32230 ; RV64I: liveins: $x10, $x11231 ; RV64I-NEXT: {{ $}}232 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10233 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11234 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0235 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 31236 ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY1]]237 ; RV64I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[SUB]], 32238 ; RV64I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]239 ; RV64I-NEXT: [[SRLW:%[0-9]+]]:_(s64) = G_SRLW [[COPY]], [[AND]]240 ; RV64I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SEXT_INREG]], [[C1]]241 ; RV64I-NEXT: [[SLLW:%[0-9]+]]:_(s64) = G_SLLW [[COPY]], [[AND1]]242 ; RV64I-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[SRLW]], [[SLLW]]243 ; RV64I-NEXT: $x10 = COPY [[OR]](s64)244 ; RV64I-NEXT: PseudoRET implicit $x10245 ;246 ; RV64ZBB_OR_RV64ZBKB-LABEL: name: rotr_i32247 ; RV64ZBB_OR_RV64ZBKB: liveins: $x10, $x11248 ; RV64ZBB_OR_RV64ZBKB-NEXT: {{ $}}249 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10250 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11251 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[RORW:%[0-9]+]]:_(s64) = G_RORW [[COPY]], [[COPY1]]252 ; RV64ZBB_OR_RV64ZBKB-NEXT: $x10 = COPY [[RORW]](s64)253 ; RV64ZBB_OR_RV64ZBKB-NEXT: PseudoRET implicit $x10254 %2:_(s64) = COPY $x10255 %0:_(s32) = G_TRUNC %2(s64)256 %3:_(s64) = COPY $x11257 %1:_(s32) = G_TRUNC %3(s64)258 %4:_(s32) = G_ROTR %0, %1(s32)259 %5:_(s64) = G_ANYEXT %4(s32)260 $x10 = COPY %5(s64)261 PseudoRET implicit $x10262 263...264---265name: rotr_i64266body: |267 bb.1:268 liveins: $x10, $x11269 270 ; RV64I-LABEL: name: rotr_i64271 ; RV64I: liveins: $x10, $x11272 ; RV64I-NEXT: {{ $}}273 ; RV64I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10274 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11275 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0276 ; RV64I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 63277 ; RV64I-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY1]]278 ; RV64I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]279 ; RV64I-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[COPY]], [[AND]](s64)280 ; RV64I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C1]]281 ; RV64I-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[AND1]](s64)282 ; RV64I-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]283 ; RV64I-NEXT: $x10 = COPY [[OR]](s64)284 ; RV64I-NEXT: PseudoRET implicit $x10285 ;286 ; RV64ZBB_OR_RV64ZBKB-LABEL: name: rotr_i64287 ; RV64ZBB_OR_RV64ZBKB: liveins: $x10, $x11288 ; RV64ZBB_OR_RV64ZBKB-NEXT: {{ $}}289 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10290 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11291 ; RV64ZBB_OR_RV64ZBKB-NEXT: [[ROTR:%[0-9]+]]:_(s64) = G_ROTR [[COPY]], [[COPY1]](s64)292 ; RV64ZBB_OR_RV64ZBKB-NEXT: $x10 = COPY [[ROTR]](s64)293 ; RV64ZBB_OR_RV64ZBKB-NEXT: PseudoRET implicit $x10294 %0:_(s64) = COPY $x10295 %1:_(s64) = COPY $x11296 %2:_(s64) = G_ROTR %0, %1(s64)297 $x10 = COPY %2(s64)298 PseudoRET implicit $x10299 300...301