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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=RV64I3# RUN: llc -mtriple=riscv64 -mattr=+zbb -run-pass=legalizer %s -o - \4# RUN: | FileCheck %s --check-prefixes=RV64ZBB5 6---7name: umax_i88body: |9 bb.0.entry:10 ; RV64I-LABEL: name: umax_i811 ; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x1012 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1113 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 25514 ; RV64I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]15 ; RV64I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]16 ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[AND]](s64), [[AND1]]17 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)18 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)19 ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]20 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)21 ; RV64I-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]22 ; RV64I-NEXT: $x10 = COPY [[AND2]](s64)23 ; RV64I-NEXT: PseudoRET implicit $x1024 ;25 ; RV64ZBB-LABEL: name: umax_i826 ; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x1027 ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1128 ; RV64ZBB-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 25529 ; RV64ZBB-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]30 ; RV64ZBB-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]31 ; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[AND]], [[AND1]]32 ; RV64ZBB-NEXT: $x10 = COPY [[UMAX]](s64)33 ; RV64ZBB-NEXT: PseudoRET implicit $x1034 %0:_(s64) = COPY $x1035 %1:_(s64) = COPY $x1136 %2:_(s8) = G_TRUNC %0(s64)37 %3:_(s8) = G_TRUNC %1(s64)38 %4:_(s8) = G_UMAX %2, %339 %5:_(s64) = G_ZEXT %4(s8)40 $x10 = COPY %5(s64)41 PseudoRET implicit $x1042...43 44---45name: umax_i1646body: |47 bb.0.entry:48 ; RV64I-LABEL: name: umax_i1649 ; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x1050 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1151 ; RV64I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 6553552 ; RV64I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]53 ; RV64I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]54 ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[AND]](s64), [[AND1]]55 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)56 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)57 ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]58 ; RV64I-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[SELECT]](s32)59 ; RV64I-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]60 ; RV64I-NEXT: $x10 = COPY [[AND2]](s64)61 ; RV64I-NEXT: PseudoRET implicit $x1062 ;63 ; RV64ZBB-LABEL: name: umax_i1664 ; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x1065 ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1166 ; RV64ZBB-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 6553567 ; RV64ZBB-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]68 ; RV64ZBB-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]69 ; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[AND]], [[AND1]]70 ; RV64ZBB-NEXT: $x10 = COPY [[UMAX]](s64)71 ; RV64ZBB-NEXT: PseudoRET implicit $x1072 %0:_(s64) = COPY $x1073 %1:_(s64) = COPY $x1174 %2:_(s16) = G_TRUNC %0(s64)75 %3:_(s16) = G_TRUNC %1(s64)76 %4:_(s16) = G_UMAX %2, %377 %5:_(s64) = G_ZEXT %4(s16)78 $x10 = COPY %5(s64)79 PseudoRET implicit $x1080...81 82---83name: umax_i3284body: |85 bb.0.entry:86 ; RV64I-LABEL: name: umax_i3287 ; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x1088 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1189 ; RV64I-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)90 ; RV64I-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)91 ; RV64I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 3292 ; RV64I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 3293 ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[SEXT_INREG]](s64), [[SEXT_INREG1]]94 ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s64), [[TRUNC]], [[TRUNC1]]95 ; RV64I-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[SELECT]](s32)96 ; RV64I-NEXT: $x10 = COPY [[ZEXT]](s64)97 ; RV64I-NEXT: PseudoRET implicit $x1098 ;99 ; RV64ZBB-LABEL: name: umax_i32100 ; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x10101 ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11102 ; RV64ZBB-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY]], 32103 ; RV64ZBB-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 32104 ; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[SEXT_INREG]], [[SEXT_INREG1]]105 ; RV64ZBB-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295106 ; RV64ZBB-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[UMAX]], [[C]]107 ; RV64ZBB-NEXT: $x10 = COPY [[AND]](s64)108 ; RV64ZBB-NEXT: PseudoRET implicit $x10109 %0:_(s64) = COPY $x10110 %1:_(s64) = COPY $x11111 %2:_(s32) = G_TRUNC %0(s64)112 %3:_(s32) = G_TRUNC %1(s64)113 %4:_(s32) = G_UMAX %2, %3114 %5:_(s64) = G_ZEXT %4(s32)115 $x10 = COPY %5(s64)116 PseudoRET implicit $x10117...118 119---120name: umax_i64121body: |122 bb.0.entry:123 ; RV64I-LABEL: name: umax_i64124 ; RV64I: [[COPY:%[0-9]+]]:_(s64) = COPY $x10125 ; RV64I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11126 ; RV64I-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[COPY]](s64), [[COPY1]]127 ; RV64I-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s64), [[COPY]], [[COPY1]]128 ; RV64I-NEXT: $x10 = COPY [[SELECT]](s64)129 ; RV64I-NEXT: PseudoRET implicit $x10130 ;131 ; RV64ZBB-LABEL: name: umax_i64132 ; RV64ZBB: [[COPY:%[0-9]+]]:_(s64) = COPY $x10133 ; RV64ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11134 ; RV64ZBB-NEXT: [[UMAX:%[0-9]+]]:_(s64) = G_UMAX [[COPY]], [[COPY1]]135 ; RV64ZBB-NEXT: $x10 = COPY [[UMAX]](s64)136 ; RV64ZBB-NEXT: PseudoRET implicit $x10137 %0:_(s64) = COPY $x10138 %1:_(s64) = COPY $x11139 %2:_(s64) = G_UMAX %0, %1140 $x10 = COPY %2(s64)141 PseudoRET implicit $x10142...143