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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,RV32I3# RUN: llc -mtriple=riscv32 -mattr=+zbb -run-pass=legalizer %s -o - \4# RUN: | FileCheck %s --check-prefixes=CHECK,RV32ZBB5 6---7name: umin_i88body: |9 bb.0.entry:10 ; RV32I-LABEL: name: umin_i811 ; RV32I: [[COPY:%[0-9]+]]:_(s32) = COPY $x1012 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x1113 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25514 ; RV32I-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]15 ; RV32I-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]16 ; RV32I-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND]](s32), [[AND1]]17 ; RV32I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[COPY]], [[COPY1]]18 ; RV32I-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SELECT]], [[C]]19 ; RV32I-NEXT: $x10 = COPY [[AND2]](s32)20 ; RV32I-NEXT: PseudoRET implicit $x1021 ;22 ; RV32ZBB-LABEL: name: umin_i823 ; RV32ZBB: [[COPY:%[0-9]+]]:_(s32) = COPY $x1024 ; RV32ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x1125 ; RV32ZBB-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25526 ; RV32ZBB-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]27 ; RV32ZBB-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]28 ; RV32ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[AND]], [[AND1]]29 ; RV32ZBB-NEXT: $x10 = COPY [[UMIN]](s32)30 ; RV32ZBB-NEXT: PseudoRET implicit $x1031 %0:_(s32) = COPY $x1032 %1:_(s32) = COPY $x1133 %2:_(s8) = G_TRUNC %0(s32)34 %3:_(s8) = G_TRUNC %1(s32)35 %4:_(s8) = G_UMIN %2, %336 %5:_(s32) = G_ZEXT %4(s8)37 $x10 = COPY %5(s32)38 PseudoRET implicit $x1039...40 41---42name: umin_i1643body: |44 bb.0.entry:45 ; RV32I-LABEL: name: umin_i1646 ; RV32I: [[COPY:%[0-9]+]]:_(s32) = COPY $x1047 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x1148 ; RV32I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 6553549 ; RV32I-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]50 ; RV32I-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]51 ; RV32I-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND]](s32), [[AND1]]52 ; RV32I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[COPY]], [[COPY1]]53 ; RV32I-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SELECT]], [[C]]54 ; RV32I-NEXT: $x10 = COPY [[AND2]](s32)55 ; RV32I-NEXT: PseudoRET implicit $x1056 ;57 ; RV32ZBB-LABEL: name: umin_i1658 ; RV32ZBB: [[COPY:%[0-9]+]]:_(s32) = COPY $x1059 ; RV32ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x1160 ; RV32ZBB-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 6553561 ; RV32ZBB-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]62 ; RV32ZBB-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]63 ; RV32ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[AND]], [[AND1]]64 ; RV32ZBB-NEXT: $x10 = COPY [[UMIN]](s32)65 ; RV32ZBB-NEXT: PseudoRET implicit $x1066 %0:_(s32) = COPY $x1067 %1:_(s32) = COPY $x1168 %2:_(s16) = G_TRUNC %0(s32)69 %3:_(s16) = G_TRUNC %1(s32)70 %4:_(s16) = G_UMIN %2, %371 %5:_(s32) = G_ZEXT %4(s16)72 $x10 = COPY %5(s32)73 PseudoRET implicit $x1074...75 76---77name: umin_i3278body: |79 bb.0.entry:80 ; RV32I-LABEL: name: umin_i3281 ; RV32I: [[COPY:%[0-9]+]]:_(s32) = COPY $x1082 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x1183 ; RV32I-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY1]]84 ; RV32I-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[COPY]], [[COPY1]]85 ; RV32I-NEXT: $x10 = COPY [[SELECT]](s32)86 ; RV32I-NEXT: PseudoRET implicit $x1087 ;88 ; RV32ZBB-LABEL: name: umin_i3289 ; RV32ZBB: [[COPY:%[0-9]+]]:_(s32) = COPY $x1090 ; RV32ZBB-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x1191 ; RV32ZBB-NEXT: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[COPY]], [[COPY1]]92 ; RV32ZBB-NEXT: $x10 = COPY [[UMIN]](s32)93 ; RV32ZBB-NEXT: PseudoRET implicit $x1094 %0:_(s32) = COPY $x1095 %1:_(s32) = COPY $x1196 %2:_(s32) = G_UMIN %0, %197 $x10 = COPY %2(s32)98 PseudoRET implicit $x1099...100 101---102name: umin_i64103body: |104 bb.0.entry:105 ; CHECK-LABEL: name: umin_i64106 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10107 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11108 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12109 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x13110 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY2]]111 ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY1]](s32), [[COPY3]]112 ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY3]]113 ; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP2]](s32), [[ICMP]], [[ICMP1]]114 ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[SELECT]](s32), [[COPY]], [[COPY2]]115 ; CHECK-NEXT: $x10 = COPY [[SELECT1]](s32)116 ; CHECK-NEXT: PseudoRET implicit $x10117 %0:_(s32) = COPY $x10118 %1:_(s32) = COPY $x11119 %2:_(s32) = COPY $x12120 %3:_(s32) = COPY $x13121 %4:_(s64) = G_MERGE_VALUES %0(s32), %1(s32)122 %5:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)123 %6:_(s64) = G_UMIN %4, %5124 %7:_(s32) = G_TRUNC %6(s64)125 $x10 = COPY %7(s32)126 PseudoRET implicit $x10127...128