713 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+v -run-pass=legalizer %s -o - | FileCheck --check-prefix=RV32 %s3# RUN: llc -mtriple=riscv64 -mattr=+v -run-pass=legalizer %s -o - | FileCheck --check-prefix=RV64 %s4 5---6name: icmp_nxv1i17legalized: true8tracksRegLiveness: true9body: |10 bb.0.entry:11 ; RV32-LABEL: name: icmp_nxv1i112 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF13 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 014 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[C]](s32)15 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -116 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[C1]](s32)17 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]18 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 1 x s8>), [[SELECT]]19 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)20 ; RV32-NEXT: PseudoRET implicit $v821 ;22 ; RV64-LABEL: name: icmp_nxv1i123 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF24 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 025 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[C]](s64)26 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -127 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[C1]](s64)28 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]29 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 1 x s8>), [[SELECT]]30 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)31 ; RV64-NEXT: PseudoRET implicit $v832 %0:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF33 %1:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), %0, %034 $v8 = COPY %1(<vscale x 1 x s1>)35 PseudoRET implicit $v836...37---38name: icmp_nxv2i139legalized: true40tracksRegLiveness: true41body: |42 bb.0.entry:43 ; RV32-LABEL: name: icmp_nxv2i144 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF45 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 046 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[C]](s32)47 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -148 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[C1]](s32)49 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]50 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 2 x s8>), [[SELECT]]51 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)52 ; RV32-NEXT: PseudoRET implicit $v853 ;54 ; RV64-LABEL: name: icmp_nxv2i155 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF56 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 057 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[C]](s64)58 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -159 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[C1]](s64)60 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]61 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 2 x s8>), [[SELECT]]62 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)63 ; RV64-NEXT: PseudoRET implicit $v864 %0:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF65 %1:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), %0, %066 $v8 = COPY %1(<vscale x 2 x s1>)67 PseudoRET implicit $v868...69---70name: icmp_nxv4i171legalized: true72tracksRegLiveness: true73body: |74 bb.0.entry:75 ; RV32-LABEL: name: icmp_nxv4i176 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF77 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 078 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[C]](s32)79 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -180 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[C1]](s32)81 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]82 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 4 x s8>), [[SELECT]]83 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)84 ; RV32-NEXT: PseudoRET implicit $v885 ;86 ; RV64-LABEL: name: icmp_nxv4i187 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF88 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 089 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[C]](s64)90 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -191 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[C1]](s64)92 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]93 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 4 x s8>), [[SELECT]]94 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)95 ; RV64-NEXT: PseudoRET implicit $v896 %0:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF97 %1:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), %0, %098 $v8 = COPY %1(<vscale x 4 x s1>)99 PseudoRET implicit $v8100...101---102name: icmp_nxv8i1103legalized: true104tracksRegLiveness: true105body: |106 bb.0.entry:107 ; RV32-LABEL: name: icmp_nxv8i1108 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF109 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0110 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[C]](s32)111 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1112 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[C1]](s32)113 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]114 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 8 x s8>), [[SELECT]]115 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)116 ; RV32-NEXT: PseudoRET implicit $v8117 ;118 ; RV64-LABEL: name: icmp_nxv8i1119 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF120 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0121 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[C]](s64)122 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1123 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[C1]](s64)124 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]125 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 8 x s8>), [[SELECT]]126 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)127 ; RV64-NEXT: PseudoRET implicit $v8128 %0:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF129 %1:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), %0, %0130 $v8 = COPY %1(<vscale x 8 x s1>)131 PseudoRET implicit $v8132...133---134name: icmp_nxv16i1135legalized: true136tracksRegLiveness: true137body: |138 bb.0.entry:139 ; RV32-LABEL: name: icmp_nxv16i1140 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF141 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0142 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[C]](s32)143 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1144 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[C1]](s32)145 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]146 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 16 x s8>), [[SELECT]]147 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)148 ; RV32-NEXT: PseudoRET implicit $v8149 ;150 ; RV64-LABEL: name: icmp_nxv16i1151 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF152 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0153 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[C]](s64)154 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1155 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[C1]](s64)156 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]157 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 16 x s8>), [[SELECT]]158 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)159 ; RV64-NEXT: PseudoRET implicit $v8160 %0:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF161 %1:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), %0, %0162 $v8 = COPY %1(<vscale x 16 x s1>)163 PseudoRET implicit $v8164...165---166name: icmp_nxv32i1167legalized: true168tracksRegLiveness: true169body: |170 bb.0.entry:171 ; RV32-LABEL: name: icmp_nxv32i1172 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 32 x s1>) = G_IMPLICIT_DEF173 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0174 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[C]](s32)175 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1176 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[C1]](s32)177 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SELECT [[DEF]](<vscale x 32 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]178 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 32 x s8>), [[SELECT]]179 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)180 ; RV32-NEXT: PseudoRET implicit $v8181 ;182 ; RV64-LABEL: name: icmp_nxv32i1183 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 32 x s1>) = G_IMPLICIT_DEF184 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0185 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[C]](s64)186 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1187 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[C1]](s64)188 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SELECT [[DEF]](<vscale x 32 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]189 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 32 x s8>), [[SELECT]]190 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)191 ; RV64-NEXT: PseudoRET implicit $v8192 %0:_(<vscale x 32 x s1>) = G_IMPLICIT_DEF193 %1:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), %0, %0194 $v8 = COPY %1(<vscale x 32 x s1>)195 PseudoRET implicit $v8196...197---198name: icmp_nxv64i1199legalized: true200tracksRegLiveness: true201body: |202 bb.0.entry:203 ; RV32-LABEL: name: icmp_nxv64i1204 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 64 x s1>) = G_IMPLICIT_DEF205 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0206 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[C]](s32)207 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1208 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[C1]](s32)209 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SELECT [[DEF]](<vscale x 64 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]210 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 64 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 64 x s8>), [[SELECT]]211 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 64 x s1>)212 ; RV32-NEXT: PseudoRET implicit $v8213 ;214 ; RV64-LABEL: name: icmp_nxv64i1215 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 64 x s1>) = G_IMPLICIT_DEF216 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0217 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[C]](s64)218 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1219 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[C1]](s64)220 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SELECT [[DEF]](<vscale x 64 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]221 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 64 x s1>) = G_ICMP intpred(sgt), [[SELECT]](<vscale x 64 x s8>), [[SELECT]]222 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 64 x s1>)223 ; RV64-NEXT: PseudoRET implicit $v8224 %0:_(<vscale x 64 x s1>) = G_IMPLICIT_DEF225 %1:_(<vscale x 64 x s1>) = G_ICMP intpred(sgt), %0, %0226 $v8 = COPY %1(<vscale x 64 x s1>)227 PseudoRET implicit $v8228...229---230name: icmp_nxv1i8231legalized: true232tracksRegLiveness: true233body: |234 bb.0.entry:235 ; RV32-LABEL: name: icmp_nxv1i8236 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF237 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s8>), [[DEF]]238 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)239 ; RV32-NEXT: PseudoRET implicit $v8240 ;241 ; RV64-LABEL: name: icmp_nxv1i8242 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF243 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s8>), [[DEF]]244 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)245 ; RV64-NEXT: PseudoRET implicit $v8246 %0:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF247 %1:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), %0, %0248 $v8 = COPY %1(<vscale x 1 x s1>)249 PseudoRET implicit $v8250...251---252name: icmp_nxv2i8253legalized: true254tracksRegLiveness: true255body: |256 bb.0.entry:257 ; RV32-LABEL: name: icmp_nxv2i8258 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF259 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s8>), [[DEF]]260 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)261 ; RV32-NEXT: PseudoRET implicit $v8262 ;263 ; RV64-LABEL: name: icmp_nxv2i8264 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF265 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s8>), [[DEF]]266 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)267 ; RV64-NEXT: PseudoRET implicit $v8268 %0:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF269 %1:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), %0, %0270 $v8 = COPY %1(<vscale x 2 x s1>)271 PseudoRET implicit $v8272...273---274name: icmp_nxv4i8275legalized: true276tracksRegLiveness: true277body: |278 bb.0.entry:279 ; RV32-LABEL: name: icmp_nxv4i8280 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF281 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s8>), [[DEF]]282 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)283 ; RV32-NEXT: PseudoRET implicit $v8284 ;285 ; RV64-LABEL: name: icmp_nxv4i8286 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF287 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s8>), [[DEF]]288 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)289 ; RV64-NEXT: PseudoRET implicit $v8290 %0:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF291 %1:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), %0, %0292 $v8 = COPY %1(<vscale x 4 x s1>)293 PseudoRET implicit $v8294...295---296name: icmp_nxv8i8297legalized: true298tracksRegLiveness: true299body: |300 bb.0.entry:301 ; RV32-LABEL: name: icmp_nxv8i8302 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF303 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s8>), [[DEF]]304 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)305 ; RV32-NEXT: PseudoRET implicit $v8306 ;307 ; RV64-LABEL: name: icmp_nxv8i8308 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF309 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s8>), [[DEF]]310 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)311 ; RV64-NEXT: PseudoRET implicit $v8312 %0:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF313 %1:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), %0, %0314 $v8 = COPY %1(<vscale x 8 x s1>)315 PseudoRET implicit $v8316...317---318name: icmp_nxv16i8319legalized: true320tracksRegLiveness: true321body: |322 bb.0.entry:323 ; RV32-LABEL: name: icmp_nxv16i8324 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF325 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s8>), [[DEF]]326 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)327 ; RV32-NEXT: PseudoRET implicit $v8328 ;329 ; RV64-LABEL: name: icmp_nxv16i8330 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF331 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s8>), [[DEF]]332 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)333 ; RV64-NEXT: PseudoRET implicit $v8334 %0:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF335 %1:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), %0, %0336 $v8 = COPY %1(<vscale x 16 x s1>)337 PseudoRET implicit $v8338...339---340name: icmp_nxv32i8341legalized: true342tracksRegLiveness: true343body: |344 bb.0.entry:345 ; RV32-LABEL: name: icmp_nxv32i8346 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 32 x s8>) = G_IMPLICIT_DEF347 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 32 x s8>), [[DEF]]348 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)349 ; RV32-NEXT: PseudoRET implicit $v8350 ;351 ; RV64-LABEL: name: icmp_nxv32i8352 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 32 x s8>) = G_IMPLICIT_DEF353 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 32 x s8>), [[DEF]]354 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)355 ; RV64-NEXT: PseudoRET implicit $v8356 %0:_(<vscale x 32 x s8>) = G_IMPLICIT_DEF357 %1:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), %0, %0358 $v8 = COPY %1(<vscale x 32 x s1>)359 PseudoRET implicit $v8360...361---362name: icmp_nxv64i8363legalized: true364tracksRegLiveness: true365body: |366 bb.0.entry:367 ; RV32-LABEL: name: icmp_nxv64i8368 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 64 x s8>) = G_IMPLICIT_DEF369 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 64 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 64 x s8>), [[DEF]]370 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 64 x s1>)371 ; RV32-NEXT: PseudoRET implicit $v8372 ;373 ; RV64-LABEL: name: icmp_nxv64i8374 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 64 x s8>) = G_IMPLICIT_DEF375 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 64 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 64 x s8>), [[DEF]]376 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 64 x s1>)377 ; RV64-NEXT: PseudoRET implicit $v8378 %0:_(<vscale x 64 x s8>) = G_IMPLICIT_DEF379 %1:_(<vscale x 64 x s1>) = G_ICMP intpred(sgt), %0, %0380 $v8 = COPY %1(<vscale x 64 x s1>)381 PseudoRET implicit $v8382...383---384name: icmp_nxv1i16385legalized: true386tracksRegLiveness: true387body: |388 bb.0.entry:389 ; RV32-LABEL: name: icmp_nxv1i16390 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF391 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s16>), [[DEF]]392 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)393 ; RV32-NEXT: PseudoRET implicit $v8394 ;395 ; RV64-LABEL: name: icmp_nxv1i16396 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF397 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s16>), [[DEF]]398 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)399 ; RV64-NEXT: PseudoRET implicit $v8400 %0:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF401 %1:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), %0, %0402 $v8 = COPY %1(<vscale x 1 x s1>)403 PseudoRET implicit $v8404...405---406name: icmp_nxv2i16407legalized: true408tracksRegLiveness: true409body: |410 bb.0.entry:411 ; RV32-LABEL: name: icmp_nxv2i16412 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF413 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s16>), [[DEF]]414 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)415 ; RV32-NEXT: PseudoRET implicit $v8416 ;417 ; RV64-LABEL: name: icmp_nxv2i16418 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF419 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s16>), [[DEF]]420 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)421 ; RV64-NEXT: PseudoRET implicit $v8422 %0:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF423 %1:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), %0, %0424 $v8 = COPY %1(<vscale x 2 x s1>)425 PseudoRET implicit $v8426...427---428name: icmp_nxv4i16429legalized: true430tracksRegLiveness: true431body: |432 bb.0.entry:433 ; RV32-LABEL: name: icmp_nxv4i16434 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF435 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s16>), [[DEF]]436 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)437 ; RV32-NEXT: PseudoRET implicit $v8438 ;439 ; RV64-LABEL: name: icmp_nxv4i16440 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF441 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s16>), [[DEF]]442 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)443 ; RV64-NEXT: PseudoRET implicit $v8444 %0:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF445 %1:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), %0, %0446 $v8 = COPY %1(<vscale x 4 x s1>)447 PseudoRET implicit $v8448...449---450name: icmp_nxv8i16451legalized: true452tracksRegLiveness: true453body: |454 bb.0.entry:455 ; RV32-LABEL: name: icmp_nxv8i16456 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF457 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s16>), [[DEF]]458 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)459 ; RV32-NEXT: PseudoRET implicit $v8460 ;461 ; RV64-LABEL: name: icmp_nxv8i16462 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF463 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s16>), [[DEF]]464 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)465 ; RV64-NEXT: PseudoRET implicit $v8466 %0:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF467 %1:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), %0, %0468 $v8 = COPY %1(<vscale x 8 x s1>)469 PseudoRET implicit $v8470...471---472name: icmp_nxv16i16473legalized: true474tracksRegLiveness: true475body: |476 bb.0.entry:477 ; RV32-LABEL: name: icmp_nxv16i16478 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF479 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s16>), [[DEF]]480 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)481 ; RV32-NEXT: PseudoRET implicit $v8482 ;483 ; RV64-LABEL: name: icmp_nxv16i16484 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF485 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s16>), [[DEF]]486 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)487 ; RV64-NEXT: PseudoRET implicit $v8488 %0:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF489 %1:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), %0, %0490 $v8 = COPY %1(<vscale x 16 x s1>)491 PseudoRET implicit $v8492...493---494name: icmp_nxv32i16495legalized: true496tracksRegLiveness: true497body: |498 bb.0.entry:499 ; RV32-LABEL: name: icmp_nxv32i16500 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 32 x s16>) = G_IMPLICIT_DEF501 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 32 x s16>), [[DEF]]502 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)503 ; RV32-NEXT: PseudoRET implicit $v8504 ;505 ; RV64-LABEL: name: icmp_nxv32i16506 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 32 x s16>) = G_IMPLICIT_DEF507 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 32 x s16>), [[DEF]]508 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 32 x s1>)509 ; RV64-NEXT: PseudoRET implicit $v8510 %0:_(<vscale x 32 x s16>) = G_IMPLICIT_DEF511 %1:_(<vscale x 32 x s1>) = G_ICMP intpred(sgt), %0, %0512 $v8 = COPY %1(<vscale x 32 x s1>)513 PseudoRET implicit $v8514...515---516name: icmp_nxv1i32517legalized: true518tracksRegLiveness: true519body: |520 bb.0.entry:521 ; RV32-LABEL: name: icmp_nxv1i32522 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF523 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s32>), [[DEF]]524 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)525 ; RV32-NEXT: PseudoRET implicit $v8526 ;527 ; RV64-LABEL: name: icmp_nxv1i32528 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF529 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s32>), [[DEF]]530 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)531 ; RV64-NEXT: PseudoRET implicit $v8532 %0:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF533 %1:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), %0, %0534 $v8 = COPY %1(<vscale x 1 x s1>)535 PseudoRET implicit $v8536...537---538name: icmp_nxv2i32539legalized: true540tracksRegLiveness: true541body: |542 bb.0.entry:543 ; RV32-LABEL: name: icmp_nxv2i32544 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF545 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s32>), [[DEF]]546 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)547 ; RV32-NEXT: PseudoRET implicit $v8548 ;549 ; RV64-LABEL: name: icmp_nxv2i32550 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF551 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s32>), [[DEF]]552 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)553 ; RV64-NEXT: PseudoRET implicit $v8554 %0:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF555 %1:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), %0, %0556 $v8 = COPY %1(<vscale x 2 x s1>)557 PseudoRET implicit $v8558...559---560name: icmp_nxv4i32561legalized: true562tracksRegLiveness: true563body: |564 bb.0.entry:565 ; RV32-LABEL: name: icmp_nxv4i32566 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF567 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s32>), [[DEF]]568 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)569 ; RV32-NEXT: PseudoRET implicit $v8570 ;571 ; RV64-LABEL: name: icmp_nxv4i32572 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF573 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s32>), [[DEF]]574 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)575 ; RV64-NEXT: PseudoRET implicit $v8576 %0:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF577 %1:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), %0, %0578 $v8 = COPY %1(<vscale x 4 x s1>)579 PseudoRET implicit $v8580...581---582name: icmp_nxv8i32583legalized: true584tracksRegLiveness: true585body: |586 bb.0.entry:587 ; RV32-LABEL: name: icmp_nxv8i32588 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF589 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s32>), [[DEF]]590 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)591 ; RV32-NEXT: PseudoRET implicit $v8592 ;593 ; RV64-LABEL: name: icmp_nxv8i32594 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF595 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s32>), [[DEF]]596 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)597 ; RV64-NEXT: PseudoRET implicit $v8598 %0:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF599 %1:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), %0, %0600 $v8 = COPY %1(<vscale x 8 x s1>)601 PseudoRET implicit $v8602...603---604name: icmp_nxv16i32605legalized: true606tracksRegLiveness: true607body: |608 bb.0.entry:609 ; RV32-LABEL: name: icmp_nxv16i32610 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF611 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s32>), [[DEF]]612 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)613 ; RV32-NEXT: PseudoRET implicit $v8614 ;615 ; RV64-LABEL: name: icmp_nxv16i32616 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF617 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 16 x s32>), [[DEF]]618 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 16 x s1>)619 ; RV64-NEXT: PseudoRET implicit $v8620 %0:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF621 %1:_(<vscale x 16 x s1>) = G_ICMP intpred(sgt), %0, %0622 $v8 = COPY %1(<vscale x 16 x s1>)623 PseudoRET implicit $v8624...625---626name: icmp_nxv1i64627legalized: true628tracksRegLiveness: true629body: |630 bb.0.entry:631 ; RV32-LABEL: name: icmp_nxv1i64632 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF633 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s64>), [[DEF]]634 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)635 ; RV32-NEXT: PseudoRET implicit $v8636 ;637 ; RV64-LABEL: name: icmp_nxv1i64638 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF639 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 1 x s64>), [[DEF]]640 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 1 x s1>)641 ; RV64-NEXT: PseudoRET implicit $v8642 %0:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF643 %1:_(<vscale x 1 x s1>) = G_ICMP intpred(sgt), %0, %0644 $v8 = COPY %1(<vscale x 1 x s1>)645 PseudoRET implicit $v8646...647---648name: icmp_nxv2i64649legalized: true650tracksRegLiveness: true651body: |652 bb.0.entry:653 ; RV32-LABEL: name: icmp_nxv2i64654 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF655 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s64>), [[DEF]]656 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)657 ; RV32-NEXT: PseudoRET implicit $v8658 ;659 ; RV64-LABEL: name: icmp_nxv2i64660 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF661 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 2 x s64>), [[DEF]]662 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 2 x s1>)663 ; RV64-NEXT: PseudoRET implicit $v8664 %0:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF665 %1:_(<vscale x 2 x s1>) = G_ICMP intpred(sgt), %0, %0666 $v8 = COPY %1(<vscale x 2 x s1>)667 PseudoRET implicit $v8668...669---670name: icmp_nxv4i64671legalized: true672tracksRegLiveness: true673body: |674 bb.0.entry:675 ; RV32-LABEL: name: icmp_nxv4i64676 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF677 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s64>), [[DEF]]678 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)679 ; RV32-NEXT: PseudoRET implicit $v8680 ;681 ; RV64-LABEL: name: icmp_nxv4i64682 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF683 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 4 x s64>), [[DEF]]684 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 4 x s1>)685 ; RV64-NEXT: PseudoRET implicit $v8686 %0:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF687 %1:_(<vscale x 4 x s1>) = G_ICMP intpred(sgt), %0, %0688 $v8 = COPY %1(<vscale x 4 x s1>)689 PseudoRET implicit $v8690...691---692name: icmp_nxv8i64693legalized: true694tracksRegLiveness: true695body: |696 bb.0.entry:697 ; RV32-LABEL: name: icmp_nxv8i64698 ; RV32: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF699 ; RV32-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s64>), [[DEF]]700 ; RV32-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)701 ; RV32-NEXT: PseudoRET implicit $v8702 ;703 ; RV64-LABEL: name: icmp_nxv8i64704 ; RV64: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF705 ; RV64-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), [[DEF]](<vscale x 8 x s64>), [[DEF]]706 ; RV64-NEXT: $v8 = COPY [[ICMP]](<vscale x 8 x s1>)707 ; RV64-NEXT: PseudoRET implicit $v8708 %0:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF709 %1:_(<vscale x 8 x s1>) = G_ICMP intpred(sgt), %0, %0710 $v8 = COPY %1(<vscale x 8 x s1>)711 PseudoRET implicit $v8712...713