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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+v -run-pass=legalizer %s -o - | FileCheck %s3 4---5name: insertelement_nxv1i1_06legalized: false7tracksRegLiveness: true8body: |9 bb.0.entry:10 ; CHECK-LABEL: name: insertelement_nxv1i1_011 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF12 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 013 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)14 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 015 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s32)16 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 1 x s1>)17 ; CHECK-NEXT: PseudoRET implicit $v018 %1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF19 %2:_(s1) = G_CONSTANT i1 false20 %3:_(s32) = G_CONSTANT i32 021 %0:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s32)22 $v0 = COPY %0(<vscale x 1 x s1>)23 PseudoRET implicit $v024...25---26name: insertelement_nxv1i1_127legalized: false28tracksRegLiveness: true29body: |30 bb.0.entry:31 ; CHECK-LABEL: name: insertelement_nxv1i1_132 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF33 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 134 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)35 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 036 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s32)37 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 1 x s1>)38 ; CHECK-NEXT: PseudoRET implicit $v039 %1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF40 %2:_(s1) = G_CONSTANT i1 true41 %3:_(s32) = G_CONSTANT i32 042 %0:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s32)43 $v0 = COPY %0(<vscale x 1 x s1>)44 PseudoRET implicit $v045...46---47name: insertelement_nxv1i1_248legalized: false49tracksRegLiveness: true50body: |51 bb.0.entry:52 liveins: $x10, $x1153 54 ; CHECK-LABEL: name: insertelement_nxv1i1_255 ; CHECK: liveins: $x10, $x1156 ; CHECK-NEXT: {{ $}}57 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x1058 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)59 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x1160 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF61 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[COPY1]](s32)62 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 1 x s1>)63 ; CHECK-NEXT: PseudoRET implicit $v064 %2:_(s32) = COPY $x1065 %0:_(s1) = G_TRUNC %2(s32)66 %1:_(s32) = COPY $x1167 %4:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF68 %3:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT %4, %0(s1), %1(s32)69 $v0 = COPY %3(<vscale x 1 x s1>)70 PseudoRET implicit $v071...72---73name: insertelement_nxv2i1_074legalized: false75tracksRegLiveness: true76body: |77 bb.0.entry:78 ; CHECK-LABEL: name: insertelement_nxv2i1_079 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF80 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 081 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)82 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 183 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s32)84 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 2 x s1>)85 ; CHECK-NEXT: PseudoRET implicit $v086 %1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF87 %2:_(s1) = G_CONSTANT i1 false88 %3:_(s32) = G_CONSTANT i32 189 %0:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s32)90 $v0 = COPY %0(<vscale x 2 x s1>)91 PseudoRET implicit $v092...93---94name: insertelement_nxv2i1_195legalized: false96tracksRegLiveness: true97body: |98 bb.0.entry:99 ; CHECK-LABEL: name: insertelement_nxv2i1_1100 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF101 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1102 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)103 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0104 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s32)105 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 2 x s1>)106 ; CHECK-NEXT: PseudoRET implicit $v0107 %1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF108 %2:_(s1) = G_CONSTANT i1 true109 %3:_(s32) = G_CONSTANT i32 0110 %0:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s32)111 $v0 = COPY %0(<vscale x 2 x s1>)112 PseudoRET implicit $v0113...114---115name: insertelement_nxv2i1_2116legalized: false117tracksRegLiveness: true118body: |119 bb.0.entry:120 liveins: $x10, $x11121 122 ; CHECK-LABEL: name: insertelement_nxv2i1_2123 ; CHECK: liveins: $x10, $x11124 ; CHECK-NEXT: {{ $}}125 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10126 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)127 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11128 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF129 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[COPY1]](s32)130 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 2 x s1>)131 ; CHECK-NEXT: PseudoRET implicit $v0132 %2:_(s32) = COPY $x10133 %0:_(s1) = G_TRUNC %2(s32)134 %1:_(s32) = COPY $x11135 %4:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF136 %3:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT %4, %0(s1), %1(s32)137 $v0 = COPY %3(<vscale x 2 x s1>)138 PseudoRET implicit $v0139...140---141name: insertelement_nxv4i1_0142legalized: false143tracksRegLiveness: true144body: |145 bb.0.entry:146 ; CHECK-LABEL: name: insertelement_nxv4i1_0147 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF148 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0149 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)150 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2151 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s32)152 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 4 x s1>)153 ; CHECK-NEXT: PseudoRET implicit $v0154 %1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF155 %2:_(s1) = G_CONSTANT i1 false156 %3:_(s32) = G_CONSTANT i32 2157 %0:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s32)158 $v0 = COPY %0(<vscale x 4 x s1>)159 PseudoRET implicit $v0160...161---162name: insertelement_nxv4i1_1163legalized: false164tracksRegLiveness: true165body: |166 bb.0.entry:167 ; CHECK-LABEL: name: insertelement_nxv4i1_1168 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF169 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1170 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)171 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0172 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s32)173 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 4 x s1>)174 ; CHECK-NEXT: PseudoRET implicit $v0175 %1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF176 %2:_(s1) = G_CONSTANT i1 true177 %3:_(s32) = G_CONSTANT i32 0178 %0:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s32)179 $v0 = COPY %0(<vscale x 4 x s1>)180 PseudoRET implicit $v0181...182---183name: insertelement_nxv4i1_2184legalized: false185tracksRegLiveness: true186body: |187 bb.0.entry:188 liveins: $x10189 190 ; CHECK-LABEL: name: insertelement_nxv4i1_2191 ; CHECK: liveins: $x10192 ; CHECK-NEXT: {{ $}}193 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10194 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)195 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF196 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0197 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C]](s32)198 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 4 x s1>)199 ; CHECK-NEXT: PseudoRET implicit $v0200 %1:_(s32) = COPY $x10201 %0:_(s1) = G_TRUNC %1(s32)202 %3:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF203 %4:_(s32) = G_CONSTANT i32 0204 %2:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT %3, %0(s1), %4(s32)205 $v0 = COPY %2(<vscale x 4 x s1>)206 PseudoRET implicit $v0207...208---209name: insertelement_nxv8i1_0210legalized: false211tracksRegLiveness: true212body: |213 bb.0.entry:214 ; CHECK-LABEL: name: insertelement_nxv8i1_0215 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF216 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0217 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)218 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0219 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s32)220 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 8 x s1>)221 ; CHECK-NEXT: PseudoRET implicit $v0222 %1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF223 %2:_(s1) = G_CONSTANT i1 false224 %3:_(s32) = G_CONSTANT i32 0225 %0:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s32)226 $v0 = COPY %0(<vscale x 8 x s1>)227 PseudoRET implicit $v0228...229---230name: insertelement_nxv8i1_1231legalized: false232tracksRegLiveness: true233body: |234 bb.0.entry:235 ; CHECK-LABEL: name: insertelement_nxv8i1_1236 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF237 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1238 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)239 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0240 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s32)241 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 8 x s1>)242 ; CHECK-NEXT: PseudoRET implicit $v0243 %1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF244 %2:_(s1) = G_CONSTANT i1 true245 %3:_(s32) = G_CONSTANT i32 0246 %0:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s32)247 $v0 = COPY %0(<vscale x 8 x s1>)248 PseudoRET implicit $v0249...250---251name: insertelement_nxv8i1_2252legalized: false253tracksRegLiveness: true254body: |255 bb.0.entry:256 liveins: $x10, $x11257 258 ; CHECK-LABEL: name: insertelement_nxv8i1_2259 ; CHECK: liveins: $x10, $x11260 ; CHECK-NEXT: {{ $}}261 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10262 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)263 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11264 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF265 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[COPY1]](s32)266 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 8 x s1>)267 ; CHECK-NEXT: PseudoRET implicit $v0268 %2:_(s32) = COPY $x10269 %0:_(s1) = G_TRUNC %2(s32)270 %1:_(s32) = COPY $x11271 %4:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF272 %3:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT %4, %0(s1), %1(s32)273 $v0 = COPY %3(<vscale x 8 x s1>)274 PseudoRET implicit $v0275...276---277name: insertelement_nxv16i1_0278legalized: false279tracksRegLiveness: true280body: |281 bb.0.entry:282 ; CHECK-LABEL: name: insertelement_nxv16i1_0283 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF284 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0285 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)286 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 15287 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s32)288 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 16 x s1>)289 ; CHECK-NEXT: PseudoRET implicit $v0290 %1:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF291 %2:_(s1) = G_CONSTANT i1 false292 %3:_(s32) = G_CONSTANT i32 15293 %0:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s32)294 $v0 = COPY %0(<vscale x 16 x s1>)295 PseudoRET implicit $v0296...297---298name: insertelement_nxv16i1_1299legalized: false300tracksRegLiveness: true301body: |302 bb.0.entry:303 ; CHECK-LABEL: name: insertelement_nxv16i1_1304 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF305 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1306 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s32)307 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0308 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s32)309 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 16 x s1>)310 ; CHECK-NEXT: PseudoRET implicit $v0311 %1:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF312 %2:_(s1) = G_CONSTANT i1 true313 %3:_(s32) = G_CONSTANT i32 0314 %0:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s32)315 $v0 = COPY %0(<vscale x 16 x s1>)316 PseudoRET implicit $v0317...318---319name: insertelement_nxv16i1_2320legalized: false321tracksRegLiveness: true322body: |323 bb.0.entry:324 liveins: $x10, $x11325 326 ; CHECK-LABEL: name: insertelement_nxv16i1_2327 ; CHECK: liveins: $x10, $x11328 ; CHECK-NEXT: {{ $}}329 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10330 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)331 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11332 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF333 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[COPY1]](s32)334 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 16 x s1>)335 ; CHECK-NEXT: PseudoRET implicit $v0336 %2:_(s32) = COPY $x10337 %0:_(s1) = G_TRUNC %2(s32)338 %1:_(s32) = COPY $x11339 %4:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF340 %3:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT %4, %0(s1), %1(s32)341 $v0 = COPY %3(<vscale x 16 x s1>)342 PseudoRET implicit $v0343...344---345name: insertelement_nxv4i1_3346legalized: false347tracksRegLiveness: true348body: |349 bb.0.entry:350 liveins: $v0, $x10351 352 ; CHECK-LABEL: name: insertelement_nxv4i1_3353 ; CHECK: liveins: $v0, $x10354 ; CHECK-NEXT: {{ $}}355 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0356 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10357 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY1]](s32)358 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0359 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT [[COPY]], [[TRUNC]](s1), [[C]](s32)360 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 4 x s1>)361 ; CHECK-NEXT: PseudoRET implicit $v0362 %0:_(<vscale x 4 x s1>) = COPY $v0363 %2:_(s32) = COPY $x10364 %1:_(s1) = G_TRUNC %2(s32)365 %4:_(s32) = G_CONSTANT i32 0366 %3:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT %0, %1(s1), %4(s32)367 $v0 = COPY %3(<vscale x 4 x s1>)368 PseudoRET implicit $v0369...370---371name: insertelement_nxv1i8_0372legalized: false373tracksRegLiveness: true374body: |375 bb.0.entry:376 ; CHECK-LABEL: name: insertelement_nxv1i8_0377 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF378 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0379 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)380 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0381 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s32)382 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s8>)383 ; CHECK-NEXT: PseudoRET implicit $v8384 %1:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF385 %2:_(s8) = G_CONSTANT i8 0386 %3:_(s32) = G_CONSTANT i32 0387 %0:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s32)388 $v8 = COPY %0(<vscale x 1 x s8>)389 PseudoRET implicit $v8390...391---392name: insertelement_nxv1i8_1393legalized: false394tracksRegLiveness: true395body: |396 bb.0.entry:397 ; CHECK-LABEL: name: insertelement_nxv1i8_1398 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF399 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1400 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)401 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0402 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s32)403 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s8>)404 ; CHECK-NEXT: PseudoRET implicit $v8405 %1:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF406 %2:_(s8) = G_CONSTANT i8 -1407 %3:_(s32) = G_CONSTANT i32 0408 %0:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s32)409 $v8 = COPY %0(<vscale x 1 x s8>)410 PseudoRET implicit $v8411...412---413name: insertelement_nxv1i8_2414legalized: false415tracksRegLiveness: true416body: |417 bb.0.entry:418 liveins: $x10419 420 ; CHECK-LABEL: name: insertelement_nxv1i8_2421 ; CHECK: liveins: $x10422 ; CHECK-NEXT: {{ $}}423 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10424 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)425 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF426 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0427 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C]](s32)428 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s8>)429 ; CHECK-NEXT: PseudoRET implicit $v8430 %1:_(s32) = COPY $x10431 %0:_(s8) = G_TRUNC %1(s32)432 %3:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF433 %4:_(s32) = G_CONSTANT i32 0434 %2:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT %3, %0(s8), %4(s32)435 $v8 = COPY %2(<vscale x 1 x s8>)436 PseudoRET implicit $v8437...438---439name: insertelement_nxv2i8_0440legalized: false441tracksRegLiveness: true442body: |443 bb.0.entry:444 ; CHECK-LABEL: name: insertelement_nxv2i8_0445 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF446 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0447 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)448 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0449 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s32)450 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s8>)451 ; CHECK-NEXT: PseudoRET implicit $v8452 %1:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF453 %2:_(s8) = G_CONSTANT i8 0454 %3:_(s32) = G_CONSTANT i32 0455 %0:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s32)456 $v8 = COPY %0(<vscale x 2 x s8>)457 PseudoRET implicit $v8458...459---460name: insertelement_nxv2i8_1461legalized: false462tracksRegLiveness: true463body: |464 bb.0.entry:465 ; CHECK-LABEL: name: insertelement_nxv2i8_1466 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF467 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1468 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)469 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0470 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s32)471 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s8>)472 ; CHECK-NEXT: PseudoRET implicit $v8473 %1:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF474 %2:_(s8) = G_CONSTANT i8 -1475 %3:_(s32) = G_CONSTANT i32 0476 %0:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s32)477 $v8 = COPY %0(<vscale x 2 x s8>)478 PseudoRET implicit $v8479...480---481name: insertelement_nxv2i8_2482legalized: false483tracksRegLiveness: true484body: |485 bb.0.entry:486 liveins: $x10487 488 ; CHECK-LABEL: name: insertelement_nxv2i8_2489 ; CHECK: liveins: $x10490 ; CHECK-NEXT: {{ $}}491 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10492 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)493 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF494 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0495 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C]](s32)496 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s8>)497 ; CHECK-NEXT: PseudoRET implicit $v8498 %1:_(s32) = COPY $x10499 %0:_(s8) = G_TRUNC %1(s32)500 %3:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF501 %4:_(s32) = G_CONSTANT i32 0502 %2:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT %3, %0(s8), %4(s32)503 $v8 = COPY %2(<vscale x 2 x s8>)504 PseudoRET implicit $v8505...506---507name: insertelement_nxv4i8_0508legalized: false509tracksRegLiveness: true510body: |511 bb.0.entry:512 ; CHECK-LABEL: name: insertelement_nxv4i8_0513 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF514 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0515 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)516 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0517 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s32)518 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s8>)519 ; CHECK-NEXT: PseudoRET implicit $v8520 %1:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF521 %2:_(s8) = G_CONSTANT i8 0522 %3:_(s32) = G_CONSTANT i32 0523 %0:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s32)524 $v8 = COPY %0(<vscale x 4 x s8>)525 PseudoRET implicit $v8526...527---528name: insertelement_nxv4i8_1529legalized: false530tracksRegLiveness: true531body: |532 bb.0.entry:533 ; CHECK-LABEL: name: insertelement_nxv4i8_1534 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF535 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1536 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)537 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0538 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s32)539 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s8>)540 ; CHECK-NEXT: PseudoRET implicit $v8541 %1:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF542 %2:_(s8) = G_CONSTANT i8 -1543 %3:_(s32) = G_CONSTANT i32 0544 %0:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s32)545 $v8 = COPY %0(<vscale x 4 x s8>)546 PseudoRET implicit $v8547...548---549name: insertelement_nxv4i8_2550legalized: false551tracksRegLiveness: true552body: |553 bb.0.entry:554 liveins: $x10555 556 ; CHECK-LABEL: name: insertelement_nxv4i8_2557 ; CHECK: liveins: $x10558 ; CHECK-NEXT: {{ $}}559 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10560 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)561 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF562 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0563 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C]](s32)564 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s8>)565 ; CHECK-NEXT: PseudoRET implicit $v8566 %1:_(s32) = COPY $x10567 %0:_(s8) = G_TRUNC %1(s32)568 %3:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF569 %4:_(s32) = G_CONSTANT i32 0570 %2:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT %3, %0(s8), %4(s32)571 $v8 = COPY %2(<vscale x 4 x s8>)572 PseudoRET implicit $v8573...574---575name: insertelement_nxv8i8_0576legalized: false577tracksRegLiveness: true578body: |579 bb.0.entry:580 ; CHECK-LABEL: name: insertelement_nxv8i8_0581 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF582 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0583 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)584 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0585 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s32)586 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 8 x s8>)587 ; CHECK-NEXT: PseudoRET implicit $v8588 %1:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF589 %2:_(s8) = G_CONSTANT i8 0590 %3:_(s32) = G_CONSTANT i32 0591 %0:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s32)592 $v8 = COPY %0(<vscale x 8 x s8>)593 PseudoRET implicit $v8594...595---596name: insertelement_nxv8i8_1597legalized: false598tracksRegLiveness: true599body: |600 bb.0.entry:601 ; CHECK-LABEL: name: insertelement_nxv8i8_1602 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF603 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1604 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)605 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0606 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s32)607 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 8 x s8>)608 ; CHECK-NEXT: PseudoRET implicit $v8609 %1:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF610 %2:_(s8) = G_CONSTANT i8 -1611 %3:_(s32) = G_CONSTANT i32 0612 %0:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s32)613 $v8 = COPY %0(<vscale x 8 x s8>)614 PseudoRET implicit $v8615...616---617name: insertelement_nxv8i8_2618legalized: false619tracksRegLiveness: true620body: |621 bb.0.entry:622 liveins: $x10623 624 ; CHECK-LABEL: name: insertelement_nxv8i8_2625 ; CHECK: liveins: $x10626 ; CHECK-NEXT: {{ $}}627 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10628 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)629 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF630 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0631 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C]](s32)632 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 8 x s8>)633 ; CHECK-NEXT: PseudoRET implicit $v8634 %1:_(s32) = COPY $x10635 %0:_(s8) = G_TRUNC %1(s32)636 %3:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF637 %4:_(s32) = G_CONSTANT i32 0638 %2:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT %3, %0(s8), %4(s32)639 $v8 = COPY %2(<vscale x 8 x s8>)640 PseudoRET implicit $v8641...642---643name: insertelement_nxv16i8_0644legalized: false645tracksRegLiveness: true646body: |647 bb.0.entry:648 ; CHECK-LABEL: name: insertelement_nxv16i8_0649 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF650 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0651 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)652 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0653 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s32)654 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 16 x s8>)655 ; CHECK-NEXT: PseudoRET implicit $v8m2656 %1:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF657 %2:_(s8) = G_CONSTANT i8 0658 %3:_(s32) = G_CONSTANT i32 0659 %0:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s32)660 $v8m2 = COPY %0(<vscale x 16 x s8>)661 PseudoRET implicit $v8m2662...663---664name: insertelement_nxv16i8_1665legalized: false666tracksRegLiveness: true667body: |668 bb.0.entry:669 ; CHECK-LABEL: name: insertelement_nxv16i8_1670 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF671 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1672 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s32)673 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0674 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s32)675 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 16 x s8>)676 ; CHECK-NEXT: PseudoRET implicit $v8m2677 %1:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF678 %2:_(s8) = G_CONSTANT i8 -1679 %3:_(s32) = G_CONSTANT i32 0680 %0:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s32)681 $v8m2 = COPY %0(<vscale x 16 x s8>)682 PseudoRET implicit $v8m2683...684---685name: insertelement_nxv16i8_2686legalized: false687tracksRegLiveness: true688body: |689 bb.0.entry:690 liveins: $x10, $x11, $x12691 692 ; CHECK-LABEL: name: insertelement_nxv16i8_2693 ; CHECK: liveins: $x10, $x11, $x12694 ; CHECK-NEXT: {{ $}}695 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10696 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)697 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11698 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF699 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[COPY1]](s32)700 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 16 x s8>)701 ; CHECK-NEXT: PseudoRET implicit $v8m2702 %2:_(s32) = COPY $x10703 %0:_(s8) = G_TRUNC %2(s32)704 %3:_(s32) = COPY $x11705 %4:_(s32) = COPY $x12706 %1:_(s64) = G_MERGE_VALUES %3(s32), %4(s32)707 %6:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF708 %7:_(s32) = G_TRUNC %1(s64)709 %5:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT %6, %0(s8), %7(s32)710 $v8m2 = COPY %5(<vscale x 16 x s8>)711 PseudoRET implicit $v8m2712...713---714name: insertelement_nxv4i8_3715legalized: false716tracksRegLiveness: true717body: |718 bb.0.entry:719 liveins: $v8, $x10720 721 ; CHECK-LABEL: name: insertelement_nxv4i8_3722 ; CHECK: liveins: $v8, $x10723 ; CHECK-NEXT: {{ $}}724 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8725 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x10726 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)727 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0728 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT [[COPY]], [[TRUNC]](s8), [[C]](s32)729 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s8>)730 ; CHECK-NEXT: PseudoRET implicit $v8731 %0:_(<vscale x 4 x s8>) = COPY $v8732 %2:_(s32) = COPY $x10733 %1:_(s8) = G_TRUNC %2(s32)734 %4:_(s32) = G_CONSTANT i32 0735 %3:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT %0, %1(s8), %4(s32)736 $v8 = COPY %3(<vscale x 4 x s8>)737 PseudoRET implicit $v8738...739---740name: insertelement_nxv1i16_0741legalized: false742tracksRegLiveness: true743body: |744 bb.0.entry:745 ; CHECK-LABEL: name: insertelement_nxv1i16_0746 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF747 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0748 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)749 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0750 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s32)751 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s16>)752 ; CHECK-NEXT: PseudoRET implicit $v8753 %1:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF754 %2:_(s16) = G_CONSTANT i16 0755 %3:_(s32) = G_CONSTANT i32 0756 %0:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s32)757 $v8 = COPY %0(<vscale x 1 x s16>)758 PseudoRET implicit $v8759...760---761name: insertelement_nxv1i16_1762legalized: false763tracksRegLiveness: true764body: |765 bb.0.entry:766 ; CHECK-LABEL: name: insertelement_nxv1i16_1767 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF768 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1769 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)770 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0771 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s32)772 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s16>)773 ; CHECK-NEXT: PseudoRET implicit $v8774 %1:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF775 %2:_(s16) = G_CONSTANT i16 -1776 %3:_(s32) = G_CONSTANT i32 0777 %0:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s32)778 $v8 = COPY %0(<vscale x 1 x s16>)779 PseudoRET implicit $v8780...781---782name: insertelement_nxv1i16_2783legalized: false784tracksRegLiveness: true785body: |786 bb.0.entry:787 liveins: $x10788 789 ; CHECK-LABEL: name: insertelement_nxv1i16_2790 ; CHECK: liveins: $x10791 ; CHECK-NEXT: {{ $}}792 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10793 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)794 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF795 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0796 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C]](s32)797 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s16>)798 ; CHECK-NEXT: PseudoRET implicit $v8799 %1:_(s32) = COPY $x10800 %0:_(s16) = G_TRUNC %1(s32)801 %3:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF802 %4:_(s32) = G_CONSTANT i32 0803 %2:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT %3, %0(s16), %4(s32)804 $v8 = COPY %2(<vscale x 1 x s16>)805 PseudoRET implicit $v8806...807---808name: insertelement_nxv2i16_0809legalized: false810tracksRegLiveness: true811body: |812 bb.0.entry:813 ; CHECK-LABEL: name: insertelement_nxv2i16_0814 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF815 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0816 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)817 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1818 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s32)819 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s16>)820 ; CHECK-NEXT: PseudoRET implicit $v8821 %1:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF822 %2:_(s16) = G_CONSTANT i16 0823 %3:_(s32) = G_CONSTANT i32 1824 %0:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s32)825 $v8 = COPY %0(<vscale x 2 x s16>)826 PseudoRET implicit $v8827...828---829name: insertelement_nxv2i16_1830legalized: false831tracksRegLiveness: true832body: |833 bb.0.entry:834 ; CHECK-LABEL: name: insertelement_nxv2i16_1835 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF836 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1837 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)838 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0839 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s32)840 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s16>)841 ; CHECK-NEXT: PseudoRET implicit $v8842 %1:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF843 %2:_(s16) = G_CONSTANT i16 -1844 %3:_(s32) = G_CONSTANT i32 0845 %0:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s32)846 $v8 = COPY %0(<vscale x 2 x s16>)847 PseudoRET implicit $v8848...849---850name: insertelement_nxv2i16_2851legalized: false852tracksRegLiveness: true853body: |854 bb.0.entry:855 liveins: $x10856 857 ; CHECK-LABEL: name: insertelement_nxv2i16_2858 ; CHECK: liveins: $x10859 ; CHECK-NEXT: {{ $}}860 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10861 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)862 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF863 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0864 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C]](s32)865 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s16>)866 ; CHECK-NEXT: PseudoRET implicit $v8867 %1:_(s32) = COPY $x10868 %0:_(s16) = G_TRUNC %1(s32)869 %3:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF870 %4:_(s32) = G_CONSTANT i32 0871 %2:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT %3, %0(s16), %4(s32)872 $v8 = COPY %2(<vscale x 2 x s16>)873 PseudoRET implicit $v8874...875---876name: insertelement_nxv4i16_0877legalized: false878tracksRegLiveness: true879body: |880 bb.0.entry:881 ; CHECK-LABEL: name: insertelement_nxv4i16_0882 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF883 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0884 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)885 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0886 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s32)887 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s16>)888 ; CHECK-NEXT: PseudoRET implicit $v8889 %1:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF890 %2:_(s16) = G_CONSTANT i16 0891 %3:_(s32) = G_CONSTANT i32 0892 %0:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s32)893 $v8 = COPY %0(<vscale x 4 x s16>)894 PseudoRET implicit $v8895...896---897name: insertelement_nxv4i16_1898legalized: false899tracksRegLiveness: true900body: |901 bb.0.entry:902 ; CHECK-LABEL: name: insertelement_nxv4i16_1903 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF904 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1905 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)906 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0907 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s32)908 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s16>)909 ; CHECK-NEXT: PseudoRET implicit $v8910 %1:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF911 %2:_(s16) = G_CONSTANT i16 -1912 %3:_(s32) = G_CONSTANT i32 0913 %0:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s32)914 $v8 = COPY %0(<vscale x 4 x s16>)915 PseudoRET implicit $v8916...917---918name: insertelement_nxv4i16_2919legalized: false920tracksRegLiveness: true921body: |922 bb.0.entry:923 liveins: $x10924 925 ; CHECK-LABEL: name: insertelement_nxv4i16_2926 ; CHECK: liveins: $x10927 ; CHECK-NEXT: {{ $}}928 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10929 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)930 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF931 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0932 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C]](s32)933 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s16>)934 ; CHECK-NEXT: PseudoRET implicit $v8935 %1:_(s32) = COPY $x10936 %0:_(s16) = G_TRUNC %1(s32)937 %3:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF938 %4:_(s32) = G_CONSTANT i32 0939 %2:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT %3, %0(s16), %4(s32)940 $v8 = COPY %2(<vscale x 4 x s16>)941 PseudoRET implicit $v8942...943---944name: insertelement_nxv8i16_0945legalized: false946tracksRegLiveness: true947body: |948 bb.0.entry:949 ; CHECK-LABEL: name: insertelement_nxv8i16_0950 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF951 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0952 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)953 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0954 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s32)955 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 8 x s16>)956 ; CHECK-NEXT: PseudoRET implicit $v8m2957 %1:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF958 %2:_(s16) = G_CONSTANT i16 0959 %3:_(s32) = G_CONSTANT i32 0960 %0:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s32)961 $v8m2 = COPY %0(<vscale x 8 x s16>)962 PseudoRET implicit $v8m2963...964---965name: insertelement_nxv8i16_1966legalized: false967tracksRegLiveness: true968body: |969 bb.0.entry:970 ; CHECK-LABEL: name: insertelement_nxv8i16_1971 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF972 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1973 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)974 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0975 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s32)976 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 8 x s16>)977 ; CHECK-NEXT: PseudoRET implicit $v8m2978 %1:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF979 %2:_(s16) = G_CONSTANT i16 -1980 %3:_(s32) = G_CONSTANT i32 0981 %0:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s32)982 $v8m2 = COPY %0(<vscale x 8 x s16>)983 PseudoRET implicit $v8m2984...985---986name: insertelement_nxv8i16_2987legalized: false988tracksRegLiveness: true989body: |990 bb.0.entry:991 liveins: $x10992 993 ; CHECK-LABEL: name: insertelement_nxv8i16_2994 ; CHECK: liveins: $x10995 ; CHECK-NEXT: {{ $}}996 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10997 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)998 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF999 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01000 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C]](s32)1001 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 8 x s16>)1002 ; CHECK-NEXT: PseudoRET implicit $v8m21003 %1:_(s32) = COPY $x101004 %0:_(s16) = G_TRUNC %1(s32)1005 %3:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF1006 %4:_(s32) = G_CONSTANT i32 01007 %2:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT %3, %0(s16), %4(s32)1008 $v8m2 = COPY %2(<vscale x 8 x s16>)1009 PseudoRET implicit $v8m21010...1011---1012name: insertelement_nxv16i16_01013legalized: false1014tracksRegLiveness: true1015body: |1016 bb.0.entry:1017 ; CHECK-LABEL: name: insertelement_nxv16i16_01018 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1019 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01020 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)1021 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01022 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s32)1023 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 16 x s16>)1024 ; CHECK-NEXT: PseudoRET implicit $v8m41025 %1:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1026 %2:_(s16) = G_CONSTANT i16 01027 %3:_(s32) = G_CONSTANT i32 01028 %0:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s32)1029 $v8m4 = COPY %0(<vscale x 16 x s16>)1030 PseudoRET implicit $v8m41031...1032---1033name: insertelement_nxv16i16_11034legalized: false1035tracksRegLiveness: true1036body: |1037 bb.0.entry:1038 ; CHECK-LABEL: name: insertelement_nxv16i16_11039 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1040 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -11041 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)1042 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01043 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s32)1044 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 16 x s16>)1045 ; CHECK-NEXT: PseudoRET implicit $v8m41046 %1:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1047 %2:_(s16) = G_CONSTANT i16 -11048 %3:_(s32) = G_CONSTANT i32 01049 %0:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s32)1050 $v8m4 = COPY %0(<vscale x 16 x s16>)1051 PseudoRET implicit $v8m41052...1053---1054name: insertelement_nxv16i16_21055legalized: false1056tracksRegLiveness: true1057body: |1058 bb.0.entry:1059 liveins: $x101060 1061 ; CHECK-LABEL: name: insertelement_nxv16i16_21062 ; CHECK: liveins: $x101063 ; CHECK-NEXT: {{ $}}1064 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x101065 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)1066 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1067 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01068 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C]](s32)1069 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 16 x s16>)1070 ; CHECK-NEXT: PseudoRET implicit $v8m41071 %1:_(s32) = COPY $x101072 %0:_(s16) = G_TRUNC %1(s32)1073 %3:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1074 %4:_(s32) = G_CONSTANT i32 01075 %2:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT %3, %0(s16), %4(s32)1076 $v8m4 = COPY %2(<vscale x 16 x s16>)1077 PseudoRET implicit $v8m41078...1079---1080name: insertelement_nxv4i161081legalized: false1082tracksRegLiveness: true1083body: |1084 bb.0.entry:1085 liveins: $v8, $x101086 1087 ; CHECK-LABEL: name: insertelement_nxv4i161088 ; CHECK: liveins: $v8, $x101089 ; CHECK-NEXT: {{ $}}1090 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v81091 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x101092 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)1093 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01094 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT [[COPY]], [[TRUNC]](s16), [[C]](s32)1095 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s16>)1096 ; CHECK-NEXT: PseudoRET implicit $v81097 %0:_(<vscale x 4 x s16>) = COPY $v81098 %2:_(s32) = COPY $x101099 %1:_(s16) = G_TRUNC %2(s32)1100 %4:_(s32) = G_CONSTANT i32 01101 %3:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT %0, %1(s16), %4(s32)1102 $v8 = COPY %3(<vscale x 4 x s16>)1103 PseudoRET implicit $v81104...1105---1106name: insertelement_nxv1i32_01107legalized: false1108tracksRegLiveness: true1109body: |1110 bb.0.entry:1111 ; CHECK-LABEL: name: insertelement_nxv1i32_01112 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1113 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01114 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s32), [[C]](s32)1115 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s32>)1116 ; CHECK-NEXT: PseudoRET implicit $v81117 %1:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1118 %2:_(s32) = G_CONSTANT i32 01119 %0:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %2(s32)1120 $v8 = COPY %0(<vscale x 1 x s32>)1121 PseudoRET implicit $v81122...1123---1124name: insertelement_nxv1i32_11125legalized: false1126tracksRegLiveness: true1127body: |1128 bb.0.entry:1129 ; CHECK-LABEL: name: insertelement_nxv1i32_11130 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1131 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -11132 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01133 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s32), [[C1]](s32)1134 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s32>)1135 ; CHECK-NEXT: PseudoRET implicit $v81136 %1:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1137 %2:_(s32) = G_CONSTANT i32 -11138 %3:_(s32) = G_CONSTANT i32 01139 %0:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s32)1140 $v8 = COPY %0(<vscale x 1 x s32>)1141 PseudoRET implicit $v81142...1143---1144name: insertelement_nxv1i32_21145legalized: false1146tracksRegLiveness: true1147body: |1148 bb.0.entry:1149 liveins: $x101150 1151 ; CHECK-LABEL: name: insertelement_nxv1i32_21152 ; CHECK: liveins: $x101153 ; CHECK-NEXT: {{ $}}1154 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x101155 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1156 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01157 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY]](s32), [[C]](s32)1158 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s32>)1159 ; CHECK-NEXT: PseudoRET implicit $v81160 %0:_(s32) = COPY $x101161 %2:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1162 %3:_(s32) = G_CONSTANT i32 01163 %1:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT %2, %0(s32), %3(s32)1164 $v8 = COPY %1(<vscale x 1 x s32>)1165 PseudoRET implicit $v81166...1167---1168name: insertelement_nxv2i32_01169legalized: false1170tracksRegLiveness: true1171body: |1172 bb.0.entry:1173 ; CHECK-LABEL: name: insertelement_nxv2i32_01174 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1175 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01176 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s32), [[C]](s32)1177 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s32>)1178 ; CHECK-NEXT: PseudoRET implicit $v81179 %1:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1180 %2:_(s32) = G_CONSTANT i32 01181 %0:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %2(s32)1182 $v8 = COPY %0(<vscale x 2 x s32>)1183 PseudoRET implicit $v81184...1185---1186name: insertelement_nxv2i32_11187legalized: false1188tracksRegLiveness: true1189body: |1190 bb.0.entry:1191 ; CHECK-LABEL: name: insertelement_nxv2i32_11192 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1193 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -11194 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01195 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s32), [[C1]](s32)1196 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s32>)1197 ; CHECK-NEXT: PseudoRET implicit $v81198 %1:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1199 %2:_(s32) = G_CONSTANT i32 -11200 %3:_(s32) = G_CONSTANT i32 01201 %0:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s32)1202 $v8 = COPY %0(<vscale x 2 x s32>)1203 PseudoRET implicit $v81204...1205---1206name: insertelement_nxv2i32_21207legalized: false1208tracksRegLiveness: true1209body: |1210 bb.0.entry:1211 liveins: $x101212 1213 ; CHECK-LABEL: name: insertelement_nxv2i32_21214 ; CHECK: liveins: $x101215 ; CHECK-NEXT: {{ $}}1216 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x101217 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1218 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01219 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY]](s32), [[C]](s32)1220 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s32>)1221 ; CHECK-NEXT: PseudoRET implicit $v81222 %0:_(s32) = COPY $x101223 %2:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1224 %3:_(s32) = G_CONSTANT i32 01225 %1:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT %2, %0(s32), %3(s32)1226 $v8 = COPY %1(<vscale x 2 x s32>)1227 PseudoRET implicit $v81228...1229---1230name: insertelement_nxv4i32_01231legalized: false1232tracksRegLiveness: true1233body: |1234 bb.0.entry:1235 ; CHECK-LABEL: name: insertelement_nxv4i32_01236 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1237 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01238 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s32), [[C]](s32)1239 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 4 x s32>)1240 ; CHECK-NEXT: PseudoRET implicit $v8m21241 %1:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1242 %2:_(s32) = G_CONSTANT i32 01243 %0:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %2(s32)1244 $v8m2 = COPY %0(<vscale x 4 x s32>)1245 PseudoRET implicit $v8m21246...1247---1248name: insertelement_nxv4i32_11249legalized: false1250tracksRegLiveness: true1251body: |1252 bb.0.entry:1253 ; CHECK-LABEL: name: insertelement_nxv4i32_11254 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1255 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -11256 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01257 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s32), [[C1]](s32)1258 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 4 x s32>)1259 ; CHECK-NEXT: PseudoRET implicit $v8m21260 %1:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1261 %2:_(s32) = G_CONSTANT i32 -11262 %3:_(s32) = G_CONSTANT i32 01263 %0:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s32)1264 $v8m2 = COPY %0(<vscale x 4 x s32>)1265 PseudoRET implicit $v8m21266...1267---1268name: insertelement_nxv4i32_21269legalized: false1270tracksRegLiveness: true1271body: |1272 bb.0.entry:1273 liveins: $x101274 1275 ; CHECK-LABEL: name: insertelement_nxv4i32_21276 ; CHECK: liveins: $x101277 ; CHECK-NEXT: {{ $}}1278 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x101279 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1280 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01281 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY]](s32), [[C]](s32)1282 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 4 x s32>)1283 ; CHECK-NEXT: PseudoRET implicit $v8m21284 %0:_(s32) = COPY $x101285 %2:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1286 %3:_(s32) = G_CONSTANT i32 01287 %1:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT %2, %0(s32), %3(s32)1288 $v8m2 = COPY %1(<vscale x 4 x s32>)1289 PseudoRET implicit $v8m21290...1291---1292name: insertelement_nxv8i32_01293legalized: false1294tracksRegLiveness: true1295body: |1296 bb.0.entry:1297 ; CHECK-LABEL: name: insertelement_nxv8i32_01298 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1299 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01300 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s32), [[C]](s32)1301 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 8 x s32>)1302 ; CHECK-NEXT: PseudoRET implicit $v8m41303 %1:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1304 %2:_(s32) = G_CONSTANT i32 01305 %0:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %2(s32)1306 $v8m4 = COPY %0(<vscale x 8 x s32>)1307 PseudoRET implicit $v8m41308...1309---1310name: insertelement_nxv8i32_11311legalized: false1312tracksRegLiveness: true1313body: |1314 bb.0.entry:1315 ; CHECK-LABEL: name: insertelement_nxv8i32_11316 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1317 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -11318 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01319 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s32), [[C1]](s32)1320 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 8 x s32>)1321 ; CHECK-NEXT: PseudoRET implicit $v8m41322 %1:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1323 %2:_(s32) = G_CONSTANT i32 -11324 %3:_(s32) = G_CONSTANT i32 01325 %0:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s32)1326 $v8m4 = COPY %0(<vscale x 8 x s32>)1327 PseudoRET implicit $v8m41328...1329---1330name: insertelement_nxv8i32_21331legalized: false1332tracksRegLiveness: true1333body: |1334 bb.0.entry:1335 liveins: $x101336 1337 ; CHECK-LABEL: name: insertelement_nxv8i32_21338 ; CHECK: liveins: $x101339 ; CHECK-NEXT: {{ $}}1340 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x101341 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1342 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01343 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY]](s32), [[C]](s32)1344 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 8 x s32>)1345 ; CHECK-NEXT: PseudoRET implicit $v8m41346 %0:_(s32) = COPY $x101347 %2:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1348 %3:_(s32) = G_CONSTANT i32 01349 %1:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT %2, %0(s32), %3(s32)1350 $v8m4 = COPY %1(<vscale x 8 x s32>)1351 PseudoRET implicit $v8m41352...1353---1354name: insertelement_nxv16i32_01355legalized: false1356tracksRegLiveness: true1357body: |1358 bb.0.entry:1359 ; CHECK-LABEL: name: insertelement_nxv16i32_01360 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1361 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01362 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s32), [[C]](s32)1363 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 16 x s32>)1364 ; CHECK-NEXT: PseudoRET implicit $v8m81365 %1:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1366 %2:_(s32) = G_CONSTANT i32 01367 %0:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %2(s32)1368 $v8m8 = COPY %0(<vscale x 16 x s32>)1369 PseudoRET implicit $v8m81370...1371---1372name: insertelement_nxv16i32_11373legalized: false1374tracksRegLiveness: true1375body: |1376 bb.0.entry:1377 ; CHECK-LABEL: name: insertelement_nxv16i32_11378 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1379 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -11380 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01381 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s32), [[C1]](s32)1382 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 16 x s32>)1383 ; CHECK-NEXT: PseudoRET implicit $v8m81384 %1:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1385 %2:_(s32) = G_CONSTANT i32 -11386 %3:_(s32) = G_CONSTANT i32 01387 %0:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s32)1388 $v8m8 = COPY %0(<vscale x 16 x s32>)1389 PseudoRET implicit $v8m81390...1391---1392name: insertelement_nxv16i32_21393legalized: false1394tracksRegLiveness: true1395body: |1396 bb.0.entry:1397 liveins: $x101398 1399 ; CHECK-LABEL: name: insertelement_nxv16i32_21400 ; CHECK: liveins: $x101401 ; CHECK-NEXT: {{ $}}1402 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x101403 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1404 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01405 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY]](s32), [[C]](s32)1406 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 16 x s32>)1407 ; CHECK-NEXT: PseudoRET implicit $v8m81408 %0:_(s32) = COPY $x101409 %2:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1410 %3:_(s32) = G_CONSTANT i32 01411 %1:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT %2, %0(s32), %3(s32)1412 $v8m8 = COPY %1(<vscale x 16 x s32>)1413 PseudoRET implicit $v8m81414...1415---1416name: insertelement_nxv4i321417legalized: false1418tracksRegLiveness: true1419body: |1420 bb.0.entry:1421 liveins: $x10, $v8m21422 1423 ; CHECK-LABEL: name: insertelement_nxv4i321424 ; CHECK: liveins: $x10, $v8m21425 ; CHECK-NEXT: {{ $}}1426 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $v8m21427 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x101428 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01429 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT [[COPY]], [[COPY1]](s32), [[C]](s32)1430 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 4 x s32>)1431 ; CHECK-NEXT: PseudoRET implicit $v8m21432 %0:_(<vscale x 4 x s32>) = COPY $v8m21433 %1:_(s32) = COPY $x101434 %3:_(s32) = G_CONSTANT i32 01435 %2:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT %0, %1(s32), %3(s32)1436 $v8m2 = COPY %2(<vscale x 4 x s32>)1437 PseudoRET implicit $v8m21438...1439---1440name: insertelement_nxv1i64_01441legalized: false1442tracksRegLiveness: true1443body: |1444 bb.0.entry:1445 ; CHECK-LABEL: name: insertelement_nxv1i64_01446 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1447 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01448 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)1449 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C]](s32)1450 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s64>)1451 ; CHECK-NEXT: PseudoRET implicit $v81452 %1:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1453 %2:_(s64) = G_CONSTANT i64 01454 %3:_(s32) = G_CONSTANT i32 01455 %0:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s32)1456 $v8 = COPY %0(<vscale x 1 x s64>)1457 PseudoRET implicit $v81458...1459---1460name: insertelement_nxv1i64_11461legalized: false1462tracksRegLiveness: true1463body: |1464 bb.0.entry:1465 ; CHECK-LABEL: name: insertelement_nxv1i64_11466 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1467 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -11468 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)1469 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01470 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C1]](s32)1471 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s64>)1472 ; CHECK-NEXT: PseudoRET implicit $v81473 %1:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1474 %2:_(s64) = G_CONSTANT i64 -11475 %3:_(s32) = G_CONSTANT i32 01476 %0:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s32)1477 $v8 = COPY %0(<vscale x 1 x s64>)1478 PseudoRET implicit $v81479...1480---1481name: insertelement_nxv1i64_21482legalized: false1483tracksRegLiveness: true1484body: |1485 bb.0.entry:1486 liveins: $x10, $x111487 1488 ; CHECK-LABEL: name: insertelement_nxv1i64_21489 ; CHECK: liveins: $x10, $x111490 ; CHECK-NEXT: {{ $}}1491 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x101492 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x111493 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)1494 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1495 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01496 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C]](s32)1497 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s64>)1498 ; CHECK-NEXT: PseudoRET implicit $v81499 %1:_(s32) = COPY $x101500 %2:_(s32) = COPY $x111501 %0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)1502 %4:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1503 %5:_(s32) = G_CONSTANT i32 01504 %3:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT %4, %0(s64), %5(s32)1505 $v8 = COPY %3(<vscale x 1 x s64>)1506 PseudoRET implicit $v81507...1508---1509name: insertelement_nxv2i64_01510legalized: false1511tracksRegLiveness: true1512body: |1513 bb.0.entry:1514 ; CHECK-LABEL: name: insertelement_nxv2i64_01515 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1516 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01517 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)1518 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C]](s32)1519 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 2 x s64>)1520 ; CHECK-NEXT: PseudoRET implicit $v8m21521 %1:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1522 %2:_(s64) = G_CONSTANT i64 01523 %3:_(s32) = G_CONSTANT i32 01524 %0:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s32)1525 $v8m2 = COPY %0(<vscale x 2 x s64>)1526 PseudoRET implicit $v8m21527...1528---1529name: insertelement_nxv2i64_11530legalized: false1531tracksRegLiveness: true1532body: |1533 bb.0.entry:1534 ; CHECK-LABEL: name: insertelement_nxv2i64_11535 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1536 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -11537 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)1538 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01539 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C1]](s32)1540 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 2 x s64>)1541 ; CHECK-NEXT: PseudoRET implicit $v8m21542 %1:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1543 %2:_(s64) = G_CONSTANT i64 -11544 %3:_(s32) = G_CONSTANT i32 01545 %0:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s32)1546 $v8m2 = COPY %0(<vscale x 2 x s64>)1547 PseudoRET implicit $v8m21548...1549---1550name: insertelement_nxv2i64_21551legalized: false1552tracksRegLiveness: true1553body: |1554 bb.0.entry:1555 liveins: $x10, $x111556 1557 ; CHECK-LABEL: name: insertelement_nxv2i64_21558 ; CHECK: liveins: $x10, $x111559 ; CHECK-NEXT: {{ $}}1560 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x101561 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x111562 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)1563 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1564 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01565 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C]](s32)1566 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 2 x s64>)1567 ; CHECK-NEXT: PseudoRET implicit $v8m21568 %1:_(s32) = COPY $x101569 %2:_(s32) = COPY $x111570 %0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)1571 %4:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1572 %5:_(s32) = G_CONSTANT i32 01573 %3:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT %4, %0(s64), %5(s32)1574 $v8m2 = COPY %3(<vscale x 2 x s64>)1575 PseudoRET implicit $v8m21576...1577---1578name: insertelement_nxv4i64_01579legalized: false1580tracksRegLiveness: true1581body: |1582 bb.0.entry:1583 ; CHECK-LABEL: name: insertelement_nxv4i64_01584 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1585 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01586 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)1587 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C]](s32)1588 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 4 x s64>)1589 ; CHECK-NEXT: PseudoRET implicit $v8m41590 %1:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1591 %2:_(s64) = G_CONSTANT i64 01592 %3:_(s32) = G_CONSTANT i32 01593 %0:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s32)1594 $v8m4 = COPY %0(<vscale x 4 x s64>)1595 PseudoRET implicit $v8m41596...1597---1598name: insertelement_nxv4i64_11599legalized: false1600tracksRegLiveness: true1601body: |1602 bb.0.entry:1603 ; CHECK-LABEL: name: insertelement_nxv4i64_11604 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1605 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -11606 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)1607 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01608 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C1]](s32)1609 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 4 x s64>)1610 ; CHECK-NEXT: PseudoRET implicit $v8m41611 %1:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1612 %2:_(s64) = G_CONSTANT i64 -11613 %3:_(s32) = G_CONSTANT i32 01614 %0:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s32)1615 $v8m4 = COPY %0(<vscale x 4 x s64>)1616 PseudoRET implicit $v8m41617...1618---1619name: insertelement_nxv4i64_21620legalized: false1621tracksRegLiveness: true1622body: |1623 bb.0.entry:1624 liveins: $x10, $x111625 1626 ; CHECK-LABEL: name: insertelement_nxv4i64_21627 ; CHECK: liveins: $x10, $x111628 ; CHECK-NEXT: {{ $}}1629 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x101630 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x111631 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)1632 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1633 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01634 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C]](s32)1635 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 4 x s64>)1636 ; CHECK-NEXT: PseudoRET implicit $v8m41637 %1:_(s32) = COPY $x101638 %2:_(s32) = COPY $x111639 %0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)1640 %4:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1641 %5:_(s32) = G_CONSTANT i32 01642 %3:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT %4, %0(s64), %5(s32)1643 $v8m4 = COPY %3(<vscale x 4 x s64>)1644 PseudoRET implicit $v8m41645...1646---1647name: insertelement_nxv8i64_01648legalized: false1649tracksRegLiveness: true1650body: |1651 bb.0.entry:1652 ; CHECK-LABEL: name: insertelement_nxv8i64_01653 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1654 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01655 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)1656 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C]](s32)1657 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 8 x s64>)1658 ; CHECK-NEXT: PseudoRET implicit $v8m81659 %1:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1660 %2:_(s64) = G_CONSTANT i64 01661 %3:_(s32) = G_CONSTANT i32 01662 %0:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s32)1663 $v8m8 = COPY %0(<vscale x 8 x s64>)1664 PseudoRET implicit $v8m81665...1666---1667name: insertelement_nxv8i64_11668legalized: false1669tracksRegLiveness: true1670body: |1671 bb.0.entry:1672 ; CHECK-LABEL: name: insertelement_nxv8i64_11673 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1674 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -11675 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)1676 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 01677 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C1]](s32)1678 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 8 x s64>)1679 ; CHECK-NEXT: PseudoRET implicit $v8m81680 %1:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1681 %2:_(s64) = G_CONSTANT i64 -11682 %3:_(s32) = G_CONSTANT i32 01683 %0:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s32)1684 $v8m8 = COPY %0(<vscale x 8 x s64>)1685 PseudoRET implicit $v8m81686...1687---1688name: insertelement_nxv8i64_21689legalized: false1690tracksRegLiveness: true1691body: |1692 bb.0.entry:1693 liveins: $x10, $x111694 1695 ; CHECK-LABEL: name: insertelement_nxv8i64_21696 ; CHECK: liveins: $x10, $x111697 ; CHECK-NEXT: {{ $}}1698 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x101699 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x111700 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)1701 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1702 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01703 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[MV]](s64), [[C]](s32)1704 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 8 x s64>)1705 ; CHECK-NEXT: PseudoRET implicit $v8m81706 %1:_(s32) = COPY $x101707 %2:_(s32) = COPY $x111708 %0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)1709 %4:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1710 %5:_(s32) = G_CONSTANT i32 01711 %3:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT %4, %0(s64), %5(s32)1712 $v8m8 = COPY %3(<vscale x 8 x s64>)1713 PseudoRET implicit $v8m81714...1715---1716name: insertelement_nxv4i641717legalized: false1718tracksRegLiveness: true1719body: |1720 bb.0.entry:1721 liveins: $x10, $x11, $v8m41722 1723 ; CHECK-LABEL: name: insertelement_nxv4i641724 ; CHECK: liveins: $x10, $x11, $v8m41725 ; CHECK-NEXT: {{ $}}1726 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s64>) = COPY $v8m41727 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x101728 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x111729 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY1]](s32), [[COPY2]](s32)1730 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 01731 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT [[COPY]], [[MV]](s64), [[C]](s32)1732 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 4 x s64>)1733 ; CHECK-NEXT: PseudoRET implicit $v8m41734 %0:_(<vscale x 4 x s64>) = COPY $v8m41735 %2:_(s32) = COPY $x101736 %3:_(s32) = COPY $x111737 %1:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)1738 %5:_(s32) = G_CONSTANT i32 01739 %4:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT %0, %1(s64), %5(s32)1740 $v8m4 = COPY %4(<vscale x 4 x s64>)1741 PseudoRET implicit $v8m41742...1743