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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv64 -mattr=+v -run-pass=legalizer %s -o - | FileCheck %s3 4---5name: insertelement_nxv1i1_06legalized: false7tracksRegLiveness: true8body: |9 bb.0.entry:10 ; CHECK-LABEL: name: insertelement_nxv1i1_011 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF12 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 013 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s64)14 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 015 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s64)16 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 1 x s1>)17 ; CHECK-NEXT: PseudoRET implicit $v018 %1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF19 %2:_(s1) = G_CONSTANT i1 false20 %3:_(s64) = G_CONSTANT i64 021 %0:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s64)22 $v0 = COPY %0(<vscale x 1 x s1>)23 PseudoRET implicit $v024...25---26name: insertelement_nxv1i1_127legalized: false28tracksRegLiveness: true29body: |30 bb.0.entry:31 ; CHECK-LABEL: name: insertelement_nxv1i1_132 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF33 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 134 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s64)35 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 036 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s64)37 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 1 x s1>)38 ; CHECK-NEXT: PseudoRET implicit $v039 %1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF40 %2:_(s1) = G_CONSTANT i1 true41 %3:_(s64) = G_CONSTANT i64 042 %0:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s64)43 $v0 = COPY %0(<vscale x 1 x s1>)44 PseudoRET implicit $v045...46---47name: insertelement_nxv1i1_248legalized: false49tracksRegLiveness: true50body: |51 bb.0.entry:52 liveins: $x10, $x1153 54 ; CHECK-LABEL: name: insertelement_nxv1i1_255 ; CHECK: liveins: $x10, $x1156 ; CHECK-NEXT: {{ $}}57 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x1058 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s64)59 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1160 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF61 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 429496729562 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]63 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[AND]](s64)64 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 1 x s1>)65 ; CHECK-NEXT: PseudoRET implicit $v066 %2:_(s64) = COPY $x1067 %0:_(s1) = G_TRUNC %2(s64)68 %3:_(s64) = COPY $x1169 %1:_(s32) = G_TRUNC %3(s64)70 %5:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF71 %6:_(s64) = G_ZEXT %1(s32)72 %4:_(<vscale x 1 x s1>) = G_INSERT_VECTOR_ELT %5, %0(s1), %6(s64)73 $v0 = COPY %4(<vscale x 1 x s1>)74 PseudoRET implicit $v075...76---77name: insertelement_nxv2i1_078legalized: false79tracksRegLiveness: true80body: |81 bb.0.entry:82 ; CHECK-LABEL: name: insertelement_nxv2i1_083 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF84 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 085 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s64)86 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 187 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s64)88 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 2 x s1>)89 ; CHECK-NEXT: PseudoRET implicit $v090 %1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF91 %2:_(s1) = G_CONSTANT i1 false92 %3:_(s64) = G_CONSTANT i64 193 %0:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s64)94 $v0 = COPY %0(<vscale x 2 x s1>)95 PseudoRET implicit $v096...97---98name: insertelement_nxv2i1_199legalized: false100tracksRegLiveness: true101body: |102 bb.0.entry:103 ; CHECK-LABEL: name: insertelement_nxv2i1_1104 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF105 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1106 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s64)107 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0108 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s64)109 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 2 x s1>)110 ; CHECK-NEXT: PseudoRET implicit $v0111 %1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF112 %2:_(s1) = G_CONSTANT i1 true113 %3:_(s64) = G_CONSTANT i64 0114 %0:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s64)115 $v0 = COPY %0(<vscale x 2 x s1>)116 PseudoRET implicit $v0117...118---119name: insertelement_nxv2i1_2120legalized: false121tracksRegLiveness: true122body: |123 bb.0.entry:124 liveins: $x10, $x11125 126 ; CHECK-LABEL: name: insertelement_nxv2i1_2127 ; CHECK: liveins: $x10, $x11128 ; CHECK-NEXT: {{ $}}129 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10130 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s64)131 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11132 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF133 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295134 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]135 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[AND]](s64)136 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 2 x s1>)137 ; CHECK-NEXT: PseudoRET implicit $v0138 %2:_(s64) = COPY $x10139 %0:_(s1) = G_TRUNC %2(s64)140 %3:_(s64) = COPY $x11141 %1:_(s32) = G_TRUNC %3(s64)142 %5:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF143 %6:_(s64) = G_ZEXT %1(s32)144 %4:_(<vscale x 2 x s1>) = G_INSERT_VECTOR_ELT %5, %0(s1), %6(s64)145 $v0 = COPY %4(<vscale x 2 x s1>)146 PseudoRET implicit $v0147...148---149name: insertelement_nxv4i1_0150legalized: false151tracksRegLiveness: true152body: |153 bb.0.entry:154 ; CHECK-LABEL: name: insertelement_nxv4i1_0155 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF156 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0157 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s64)158 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2159 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s64)160 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 4 x s1>)161 ; CHECK-NEXT: PseudoRET implicit $v0162 %1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF163 %2:_(s1) = G_CONSTANT i1 false164 %3:_(s64) = G_CONSTANT i64 2165 %0:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s64)166 $v0 = COPY %0(<vscale x 4 x s1>)167 PseudoRET implicit $v0168...169---170name: insertelement_nxv4i1_1171legalized: false172tracksRegLiveness: true173body: |174 bb.0.entry:175 ; CHECK-LABEL: name: insertelement_nxv4i1_1176 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF177 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1178 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s64)179 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0180 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s64)181 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 4 x s1>)182 ; CHECK-NEXT: PseudoRET implicit $v0183 %1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF184 %2:_(s1) = G_CONSTANT i1 true185 %3:_(s64) = G_CONSTANT i64 0186 %0:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s64)187 $v0 = COPY %0(<vscale x 4 x s1>)188 PseudoRET implicit $v0189...190---191name: insertelement_nxv4i1_2192legalized: false193tracksRegLiveness: true194body: |195 bb.0.entry:196 liveins: $x10197 198 ; CHECK-LABEL: name: insertelement_nxv4i1_2199 ; CHECK: liveins: $x10200 ; CHECK-NEXT: {{ $}}201 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10202 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s64)203 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF204 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0205 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C]](s64)206 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 4 x s1>)207 ; CHECK-NEXT: PseudoRET implicit $v0208 %1:_(s64) = COPY $x10209 %0:_(s1) = G_TRUNC %1(s64)210 %3:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF211 %4:_(s64) = G_CONSTANT i64 0212 %2:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT %3, %0(s1), %4(s64)213 $v0 = COPY %2(<vscale x 4 x s1>)214 PseudoRET implicit $v0215...216---217name: insertelement_nxv8i1_0218legalized: false219tracksRegLiveness: true220body: |221 bb.0.entry:222 ; CHECK-LABEL: name: insertelement_nxv8i1_0223 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF224 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0225 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s64)226 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0227 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s64)228 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 8 x s1>)229 ; CHECK-NEXT: PseudoRET implicit $v0230 %1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF231 %2:_(s1) = G_CONSTANT i1 false232 %3:_(s64) = G_CONSTANT i64 0233 %0:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s64)234 $v0 = COPY %0(<vscale x 8 x s1>)235 PseudoRET implicit $v0236...237---238name: insertelement_nxv8i1_1239legalized: false240tracksRegLiveness: true241body: |242 bb.0.entry:243 ; CHECK-LABEL: name: insertelement_nxv8i1_1244 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF245 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1246 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s64)247 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0248 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s64)249 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 8 x s1>)250 ; CHECK-NEXT: PseudoRET implicit $v0251 %1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF252 %2:_(s1) = G_CONSTANT i1 true253 %3:_(s64) = G_CONSTANT i64 0254 %0:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s64)255 $v0 = COPY %0(<vscale x 8 x s1>)256 PseudoRET implicit $v0257...258---259name: insertelement_nxv8i1_2260legalized: false261tracksRegLiveness: true262body: |263 bb.0.entry:264 liveins: $x10, $x11265 266 ; CHECK-LABEL: name: insertelement_nxv8i1_2267 ; CHECK: liveins: $x10, $x11268 ; CHECK-NEXT: {{ $}}269 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10270 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s64)271 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11272 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF273 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295274 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]275 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[AND]](s64)276 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 8 x s1>)277 ; CHECK-NEXT: PseudoRET implicit $v0278 %2:_(s64) = COPY $x10279 %0:_(s1) = G_TRUNC %2(s64)280 %3:_(s64) = COPY $x11281 %1:_(s32) = G_TRUNC %3(s64)282 %5:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF283 %6:_(s64) = G_ZEXT %1(s32)284 %4:_(<vscale x 8 x s1>) = G_INSERT_VECTOR_ELT %5, %0(s1), %6(s64)285 $v0 = COPY %4(<vscale x 8 x s1>)286 PseudoRET implicit $v0287...288---289name: insertelement_nxv16i1_0290legalized: false291tracksRegLiveness: true292body: |293 bb.0.entry:294 ; CHECK-LABEL: name: insertelement_nxv16i1_0295 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF296 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0297 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s64)298 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 15299 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s64)300 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 16 x s1>)301 ; CHECK-NEXT: PseudoRET implicit $v0302 %1:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF303 %2:_(s1) = G_CONSTANT i1 false304 %3:_(s64) = G_CONSTANT i64 15305 %0:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s64)306 $v0 = COPY %0(<vscale x 16 x s1>)307 PseudoRET implicit $v0308...309---310name: insertelement_nxv16i1_1311legalized: false312tracksRegLiveness: true313body: |314 bb.0.entry:315 ; CHECK-LABEL: name: insertelement_nxv16i1_1316 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF317 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1318 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[C]](s64)319 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0320 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[C1]](s64)321 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 16 x s1>)322 ; CHECK-NEXT: PseudoRET implicit $v0323 %1:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF324 %2:_(s1) = G_CONSTANT i1 true325 %3:_(s64) = G_CONSTANT i64 0326 %0:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT %1, %2(s1), %3(s64)327 $v0 = COPY %0(<vscale x 16 x s1>)328 PseudoRET implicit $v0329...330---331name: insertelement_nxv16i1_2332legalized: false333tracksRegLiveness: true334body: |335 bb.0.entry:336 liveins: $x10, $x11337 338 ; CHECK-LABEL: name: insertelement_nxv16i1_2339 ; CHECK: liveins: $x10, $x11340 ; CHECK-NEXT: {{ $}}341 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10342 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s64)343 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11344 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF345 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295346 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]347 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s1), [[AND]](s64)348 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 16 x s1>)349 ; CHECK-NEXT: PseudoRET implicit $v0350 %2:_(s64) = COPY $x10351 %0:_(s1) = G_TRUNC %2(s64)352 %3:_(s64) = COPY $x11353 %1:_(s32) = G_TRUNC %3(s64)354 %5:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF355 %6:_(s64) = G_ZEXT %1(s32)356 %4:_(<vscale x 16 x s1>) = G_INSERT_VECTOR_ELT %5, %0(s1), %6(s64)357 $v0 = COPY %4(<vscale x 16 x s1>)358 PseudoRET implicit $v0359...360---361name: insertelement_nxv4i1_3362legalized: false363tracksRegLiveness: true364body: |365 bb.0.entry:366 liveins: $v0, $x10367 368 ; CHECK-LABEL: name: insertelement_nxv4i1_3369 ; CHECK: liveins: $v0, $x10370 ; CHECK-NEXT: {{ $}}371 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0372 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10373 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY1]](s64)374 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0375 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT [[COPY]], [[TRUNC]](s1), [[C]](s64)376 ; CHECK-NEXT: $v0 = COPY [[IVEC]](<vscale x 4 x s1>)377 ; CHECK-NEXT: PseudoRET implicit $v0378 %0:_(<vscale x 4 x s1>) = COPY $v0379 %2:_(s64) = COPY $x10380 %1:_(s1) = G_TRUNC %2(s64)381 %4:_(s64) = G_CONSTANT i64 0382 %3:_(<vscale x 4 x s1>) = G_INSERT_VECTOR_ELT %0, %1(s1), %4(s64)383 $v0 = COPY %3(<vscale x 4 x s1>)384 PseudoRET implicit $v0385...386---387name: insertelement_nxv1i8_0388legalized: false389tracksRegLiveness: true390body: |391 bb.0.entry:392 ; CHECK-LABEL: name: insertelement_nxv1i8_0393 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF394 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0395 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s64)396 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0397 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s64)398 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s8>)399 ; CHECK-NEXT: PseudoRET implicit $v8400 %1:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF401 %2:_(s8) = G_CONSTANT i8 0402 %3:_(s64) = G_CONSTANT i64 0403 %0:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s64)404 $v8 = COPY %0(<vscale x 1 x s8>)405 PseudoRET implicit $v8406...407---408name: insertelement_nxv1i8_1409legalized: false410tracksRegLiveness: true411body: |412 bb.0.entry:413 ; CHECK-LABEL: name: insertelement_nxv1i8_1414 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF415 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1416 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s64)417 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0418 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s64)419 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s8>)420 ; CHECK-NEXT: PseudoRET implicit $v8421 %1:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF422 %2:_(s8) = G_CONSTANT i8 -1423 %3:_(s64) = G_CONSTANT i64 0424 %0:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s64)425 $v8 = COPY %0(<vscale x 1 x s8>)426 PseudoRET implicit $v8427...428---429name: insertelement_nxv1i8_2430legalized: false431tracksRegLiveness: true432body: |433 bb.0.entry:434 liveins: $x10435 436 ; CHECK-LABEL: name: insertelement_nxv1i8_2437 ; CHECK: liveins: $x10438 ; CHECK-NEXT: {{ $}}439 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10440 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s64)441 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF442 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0443 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C]](s64)444 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s8>)445 ; CHECK-NEXT: PseudoRET implicit $v8446 %1:_(s64) = COPY $x10447 %0:_(s8) = G_TRUNC %1(s64)448 %3:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF449 %4:_(s64) = G_CONSTANT i64 0450 %2:_(<vscale x 1 x s8>) = G_INSERT_VECTOR_ELT %3, %0(s8), %4(s64)451 $v8 = COPY %2(<vscale x 1 x s8>)452 PseudoRET implicit $v8453...454---455name: insertelement_nxv2i8_0456legalized: false457tracksRegLiveness: true458body: |459 bb.0.entry:460 ; CHECK-LABEL: name: insertelement_nxv2i8_0461 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF462 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0463 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s64)464 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0465 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s64)466 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s8>)467 ; CHECK-NEXT: PseudoRET implicit $v8468 %1:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF469 %2:_(s8) = G_CONSTANT i8 0470 %3:_(s64) = G_CONSTANT i64 0471 %0:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s64)472 $v8 = COPY %0(<vscale x 2 x s8>)473 PseudoRET implicit $v8474...475---476name: insertelement_nxv2i8_1477legalized: false478tracksRegLiveness: true479body: |480 bb.0.entry:481 ; CHECK-LABEL: name: insertelement_nxv2i8_1482 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF483 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1484 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s64)485 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0486 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s64)487 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s8>)488 ; CHECK-NEXT: PseudoRET implicit $v8489 %1:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF490 %2:_(s8) = G_CONSTANT i8 -1491 %3:_(s64) = G_CONSTANT i64 0492 %0:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s64)493 $v8 = COPY %0(<vscale x 2 x s8>)494 PseudoRET implicit $v8495...496---497name: insertelement_nxv2i8_2498legalized: false499tracksRegLiveness: true500body: |501 bb.0.entry:502 liveins: $x10503 504 ; CHECK-LABEL: name: insertelement_nxv2i8_2505 ; CHECK: liveins: $x10506 ; CHECK-NEXT: {{ $}}507 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10508 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s64)509 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF510 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0511 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C]](s64)512 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s8>)513 ; CHECK-NEXT: PseudoRET implicit $v8514 %1:_(s64) = COPY $x10515 %0:_(s8) = G_TRUNC %1(s64)516 %3:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF517 %4:_(s64) = G_CONSTANT i64 0518 %2:_(<vscale x 2 x s8>) = G_INSERT_VECTOR_ELT %3, %0(s8), %4(s64)519 $v8 = COPY %2(<vscale x 2 x s8>)520 PseudoRET implicit $v8521...522---523name: insertelement_nxv4i8_0524legalized: false525tracksRegLiveness: true526body: |527 bb.0.entry:528 ; CHECK-LABEL: name: insertelement_nxv4i8_0529 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF530 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0531 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s64)532 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0533 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s64)534 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s8>)535 ; CHECK-NEXT: PseudoRET implicit $v8536 %1:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF537 %2:_(s8) = G_CONSTANT i8 0538 %3:_(s64) = G_CONSTANT i64 0539 %0:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s64)540 $v8 = COPY %0(<vscale x 4 x s8>)541 PseudoRET implicit $v8542...543---544name: insertelement_nxv4i8_1545legalized: false546tracksRegLiveness: true547body: |548 bb.0.entry:549 ; CHECK-LABEL: name: insertelement_nxv4i8_1550 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF551 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1552 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s64)553 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0554 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s64)555 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s8>)556 ; CHECK-NEXT: PseudoRET implicit $v8557 %1:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF558 %2:_(s8) = G_CONSTANT i8 -1559 %3:_(s64) = G_CONSTANT i64 0560 %0:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s64)561 $v8 = COPY %0(<vscale x 4 x s8>)562 PseudoRET implicit $v8563...564---565name: insertelement_nxv4i8_2566legalized: false567tracksRegLiveness: true568body: |569 bb.0.entry:570 liveins: $x10571 572 ; CHECK-LABEL: name: insertelement_nxv4i8_2573 ; CHECK: liveins: $x10574 ; CHECK-NEXT: {{ $}}575 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10576 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s64)577 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF578 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0579 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C]](s64)580 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s8>)581 ; CHECK-NEXT: PseudoRET implicit $v8582 %1:_(s64) = COPY $x10583 %0:_(s8) = G_TRUNC %1(s64)584 %3:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF585 %4:_(s64) = G_CONSTANT i64 0586 %2:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT %3, %0(s8), %4(s64)587 $v8 = COPY %2(<vscale x 4 x s8>)588 PseudoRET implicit $v8589...590---591name: insertelement_nxv8i8_0592legalized: false593tracksRegLiveness: true594body: |595 bb.0.entry:596 ; CHECK-LABEL: name: insertelement_nxv8i8_0597 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF598 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0599 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s64)600 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0601 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s64)602 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 8 x s8>)603 ; CHECK-NEXT: PseudoRET implicit $v8604 %1:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF605 %2:_(s8) = G_CONSTANT i8 0606 %3:_(s64) = G_CONSTANT i64 0607 %0:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s64)608 $v8 = COPY %0(<vscale x 8 x s8>)609 PseudoRET implicit $v8610...611---612name: insertelement_nxv8i8_1613legalized: false614tracksRegLiveness: true615body: |616 bb.0.entry:617 ; CHECK-LABEL: name: insertelement_nxv8i8_1618 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF619 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1620 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s64)621 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0622 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s64)623 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 8 x s8>)624 ; CHECK-NEXT: PseudoRET implicit $v8625 %1:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF626 %2:_(s8) = G_CONSTANT i8 -1627 %3:_(s64) = G_CONSTANT i64 0628 %0:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s64)629 $v8 = COPY %0(<vscale x 8 x s8>)630 PseudoRET implicit $v8631...632---633name: insertelement_nxv8i8_2634legalized: false635tracksRegLiveness: true636body: |637 bb.0.entry:638 liveins: $x10639 640 ; CHECK-LABEL: name: insertelement_nxv8i8_2641 ; CHECK: liveins: $x10642 ; CHECK-NEXT: {{ $}}643 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10644 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s64)645 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF646 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0647 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C]](s64)648 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 8 x s8>)649 ; CHECK-NEXT: PseudoRET implicit $v8650 %1:_(s64) = COPY $x10651 %0:_(s8) = G_TRUNC %1(s64)652 %3:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF653 %4:_(s64) = G_CONSTANT i64 0654 %2:_(<vscale x 8 x s8>) = G_INSERT_VECTOR_ELT %3, %0(s8), %4(s64)655 $v8 = COPY %2(<vscale x 8 x s8>)656 PseudoRET implicit $v8657...658---659name: insertelement_nxv16i8_0660legalized: false661tracksRegLiveness: true662body: |663 bb.0.entry:664 ; CHECK-LABEL: name: insertelement_nxv16i8_0665 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF666 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0667 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s64)668 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0669 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s64)670 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 16 x s8>)671 ; CHECK-NEXT: PseudoRET implicit $v8m2672 %1:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF673 %2:_(s8) = G_CONSTANT i8 0674 %3:_(s64) = G_CONSTANT i64 0675 %0:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s64)676 $v8m2 = COPY %0(<vscale x 16 x s8>)677 PseudoRET implicit $v8m2678...679---680name: insertelement_nxv16i8_1681legalized: false682tracksRegLiveness: true683body: |684 bb.0.entry:685 ; CHECK-LABEL: name: insertelement_nxv16i8_1686 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF687 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1688 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[C]](s64)689 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0690 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[C1]](s64)691 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 16 x s8>)692 ; CHECK-NEXT: PseudoRET implicit $v8m2693 %1:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF694 %2:_(s8) = G_CONSTANT i8 -1695 %3:_(s64) = G_CONSTANT i64 0696 %0:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT %1, %2(s8), %3(s64)697 $v8m2 = COPY %0(<vscale x 16 x s8>)698 PseudoRET implicit $v8m2699...700---701name: insertelement_nxv16i8_2702legalized: false703tracksRegLiveness: true704body: |705 bb.0.entry:706 liveins: $x10, $x11707 708 ; CHECK-LABEL: name: insertelement_nxv16i8_2709 ; CHECK: liveins: $x10, $x11710 ; CHECK-NEXT: {{ $}}711 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10712 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s64)713 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11714 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF715 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s8), [[COPY1]](s64)716 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 16 x s8>)717 ; CHECK-NEXT: PseudoRET implicit $v8m2718 %2:_(s64) = COPY $x10719 %0:_(s8) = G_TRUNC %2(s64)720 %1:_(s64) = COPY $x11721 %4:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF722 %3:_(<vscale x 16 x s8>) = G_INSERT_VECTOR_ELT %4, %0(s8), %1(s64)723 $v8m2 = COPY %3(<vscale x 16 x s8>)724 PseudoRET implicit $v8m2725...726---727name: insertelement_nxv4i8_3728legalized: false729tracksRegLiveness: true730body: |731 bb.0.entry:732 liveins: $v8, $x10733 734 ; CHECK-LABEL: name: insertelement_nxv4i8_3735 ; CHECK: liveins: $v8, $x10736 ; CHECK-NEXT: {{ $}}737 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8738 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x10739 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s64)740 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0741 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT [[COPY]], [[TRUNC]](s8), [[C]](s64)742 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s8>)743 ; CHECK-NEXT: PseudoRET implicit $v8744 %0:_(<vscale x 4 x s8>) = COPY $v8745 %2:_(s64) = COPY $x10746 %1:_(s8) = G_TRUNC %2(s64)747 %4:_(s64) = G_CONSTANT i64 0748 %3:_(<vscale x 4 x s8>) = G_INSERT_VECTOR_ELT %0, %1(s8), %4(s64)749 $v8 = COPY %3(<vscale x 4 x s8>)750 PseudoRET implicit $v8751...752---753name: insertelement_nxv1i16_0754legalized: false755tracksRegLiveness: true756body: |757 bb.0.entry:758 ; CHECK-LABEL: name: insertelement_nxv1i16_0759 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF760 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0761 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)762 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0763 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s64)764 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s16>)765 ; CHECK-NEXT: PseudoRET implicit $v8766 %1:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF767 %2:_(s16) = G_CONSTANT i16 0768 %3:_(s64) = G_CONSTANT i64 0769 %0:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s64)770 $v8 = COPY %0(<vscale x 1 x s16>)771 PseudoRET implicit $v8772...773---774name: insertelement_nxv1i16_1775legalized: false776tracksRegLiveness: true777body: |778 bb.0.entry:779 ; CHECK-LABEL: name: insertelement_nxv1i16_1780 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF781 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1782 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)783 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0784 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s64)785 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s16>)786 ; CHECK-NEXT: PseudoRET implicit $v8787 %1:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF788 %2:_(s16) = G_CONSTANT i16 -1789 %3:_(s64) = G_CONSTANT i64 0790 %0:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s64)791 $v8 = COPY %0(<vscale x 1 x s16>)792 PseudoRET implicit $v8793...794---795name: insertelement_nxv1i16_2796legalized: false797tracksRegLiveness: true798body: |799 bb.0.entry:800 liveins: $x10801 802 ; CHECK-LABEL: name: insertelement_nxv1i16_2803 ; CHECK: liveins: $x10804 ; CHECK-NEXT: {{ $}}805 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10806 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)807 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF808 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0809 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C]](s64)810 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s16>)811 ; CHECK-NEXT: PseudoRET implicit $v8812 %1:_(s64) = COPY $x10813 %0:_(s16) = G_TRUNC %1(s64)814 %3:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF815 %4:_(s64) = G_CONSTANT i64 0816 %2:_(<vscale x 1 x s16>) = G_INSERT_VECTOR_ELT %3, %0(s16), %4(s64)817 $v8 = COPY %2(<vscale x 1 x s16>)818 PseudoRET implicit $v8819...820---821name: insertelement_nxv2i16_0822legalized: false823tracksRegLiveness: true824body: |825 bb.0.entry:826 ; CHECK-LABEL: name: insertelement_nxv2i16_0827 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF828 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0829 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)830 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1831 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s64)832 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s16>)833 ; CHECK-NEXT: PseudoRET implicit $v8834 %1:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF835 %2:_(s16) = G_CONSTANT i16 0836 %3:_(s64) = G_CONSTANT i64 1837 %0:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s64)838 $v8 = COPY %0(<vscale x 2 x s16>)839 PseudoRET implicit $v8840...841---842name: insertelement_nxv2i16_1843legalized: false844tracksRegLiveness: true845body: |846 bb.0.entry:847 ; CHECK-LABEL: name: insertelement_nxv2i16_1848 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF849 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1850 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)851 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0852 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s64)853 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s16>)854 ; CHECK-NEXT: PseudoRET implicit $v8855 %1:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF856 %2:_(s16) = G_CONSTANT i16 -1857 %3:_(s64) = G_CONSTANT i64 0858 %0:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s64)859 $v8 = COPY %0(<vscale x 2 x s16>)860 PseudoRET implicit $v8861...862---863name: insertelement_nxv2i16_2864legalized: false865tracksRegLiveness: true866body: |867 bb.0.entry:868 liveins: $x10869 870 ; CHECK-LABEL: name: insertelement_nxv2i16_2871 ; CHECK: liveins: $x10872 ; CHECK-NEXT: {{ $}}873 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10874 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)875 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF876 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0877 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C]](s64)878 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s16>)879 ; CHECK-NEXT: PseudoRET implicit $v8880 %1:_(s64) = COPY $x10881 %0:_(s16) = G_TRUNC %1(s64)882 %3:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF883 %4:_(s64) = G_CONSTANT i64 0884 %2:_(<vscale x 2 x s16>) = G_INSERT_VECTOR_ELT %3, %0(s16), %4(s64)885 $v8 = COPY %2(<vscale x 2 x s16>)886 PseudoRET implicit $v8887...888---889name: insertelement_nxv4i16_0890legalized: false891tracksRegLiveness: true892body: |893 bb.0.entry:894 ; CHECK-LABEL: name: insertelement_nxv4i16_0895 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF896 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0897 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)898 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0899 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s64)900 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s16>)901 ; CHECK-NEXT: PseudoRET implicit $v8902 %1:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF903 %2:_(s16) = G_CONSTANT i16 0904 %3:_(s64) = G_CONSTANT i64 0905 %0:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s64)906 $v8 = COPY %0(<vscale x 4 x s16>)907 PseudoRET implicit $v8908...909---910name: insertelement_nxv4i16_1911legalized: false912tracksRegLiveness: true913body: |914 bb.0.entry:915 ; CHECK-LABEL: name: insertelement_nxv4i16_1916 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF917 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1918 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)919 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0920 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s64)921 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s16>)922 ; CHECK-NEXT: PseudoRET implicit $v8923 %1:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF924 %2:_(s16) = G_CONSTANT i16 -1925 %3:_(s64) = G_CONSTANT i64 0926 %0:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s64)927 $v8 = COPY %0(<vscale x 4 x s16>)928 PseudoRET implicit $v8929...930---931name: insertelement_nxv4i16_2932legalized: false933tracksRegLiveness: true934body: |935 bb.0.entry:936 liveins: $x10937 938 ; CHECK-LABEL: name: insertelement_nxv4i16_2939 ; CHECK: liveins: $x10940 ; CHECK-NEXT: {{ $}}941 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10942 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)943 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF944 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0945 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C]](s64)946 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s16>)947 ; CHECK-NEXT: PseudoRET implicit $v8948 %1:_(s64) = COPY $x10949 %0:_(s16) = G_TRUNC %1(s64)950 %3:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF951 %4:_(s64) = G_CONSTANT i64 0952 %2:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT %3, %0(s16), %4(s64)953 $v8 = COPY %2(<vscale x 4 x s16>)954 PseudoRET implicit $v8955...956---957name: insertelement_nxv8i16_0958legalized: false959tracksRegLiveness: true960body: |961 bb.0.entry:962 ; CHECK-LABEL: name: insertelement_nxv8i16_0963 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF964 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0965 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)966 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0967 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s64)968 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 8 x s16>)969 ; CHECK-NEXT: PseudoRET implicit $v8m2970 %1:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF971 %2:_(s16) = G_CONSTANT i16 0972 %3:_(s64) = G_CONSTANT i64 0973 %0:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s64)974 $v8m2 = COPY %0(<vscale x 8 x s16>)975 PseudoRET implicit $v8m2976...977---978name: insertelement_nxv8i16_1979legalized: false980tracksRegLiveness: true981body: |982 bb.0.entry:983 ; CHECK-LABEL: name: insertelement_nxv8i16_1984 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF985 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1986 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)987 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0988 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s64)989 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 8 x s16>)990 ; CHECK-NEXT: PseudoRET implicit $v8m2991 %1:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF992 %2:_(s16) = G_CONSTANT i16 -1993 %3:_(s64) = G_CONSTANT i64 0994 %0:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s64)995 $v8m2 = COPY %0(<vscale x 8 x s16>)996 PseudoRET implicit $v8m2997...998---999name: insertelement_nxv8i16_21000legalized: false1001tracksRegLiveness: true1002body: |1003 bb.0.entry:1004 liveins: $x101005 1006 ; CHECK-LABEL: name: insertelement_nxv8i16_21007 ; CHECK: liveins: $x101008 ; CHECK-NEXT: {{ $}}1009 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101010 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)1011 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF1012 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01013 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C]](s64)1014 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 8 x s16>)1015 ; CHECK-NEXT: PseudoRET implicit $v8m21016 %1:_(s64) = COPY $x101017 %0:_(s16) = G_TRUNC %1(s64)1018 %3:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF1019 %4:_(s64) = G_CONSTANT i64 01020 %2:_(<vscale x 8 x s16>) = G_INSERT_VECTOR_ELT %3, %0(s16), %4(s64)1021 $v8m2 = COPY %2(<vscale x 8 x s16>)1022 PseudoRET implicit $v8m21023...1024---1025name: insertelement_nxv16i16_01026legalized: false1027tracksRegLiveness: true1028body: |1029 bb.0.entry:1030 ; CHECK-LABEL: name: insertelement_nxv16i16_01031 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1032 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01033 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)1034 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01035 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s64)1036 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 16 x s16>)1037 ; CHECK-NEXT: PseudoRET implicit $v8m41038 %1:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1039 %2:_(s16) = G_CONSTANT i16 01040 %3:_(s64) = G_CONSTANT i64 01041 %0:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s64)1042 $v8m4 = COPY %0(<vscale x 16 x s16>)1043 PseudoRET implicit $v8m41044...1045---1046name: insertelement_nxv16i16_11047legalized: false1048tracksRegLiveness: true1049body: |1050 bb.0.entry:1051 ; CHECK-LABEL: name: insertelement_nxv16i16_11052 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1053 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -11054 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s64)1055 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01056 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C1]](s64)1057 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 16 x s16>)1058 ; CHECK-NEXT: PseudoRET implicit $v8m41059 %1:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1060 %2:_(s16) = G_CONSTANT i16 -11061 %3:_(s64) = G_CONSTANT i64 01062 %0:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT %1, %2(s16), %3(s64)1063 $v8m4 = COPY %0(<vscale x 16 x s16>)1064 PseudoRET implicit $v8m41065...1066---1067name: insertelement_nxv16i16_21068legalized: false1069tracksRegLiveness: true1070body: |1071 bb.0.entry:1072 liveins: $x101073 1074 ; CHECK-LABEL: name: insertelement_nxv16i16_21075 ; CHECK: liveins: $x101076 ; CHECK-NEXT: {{ $}}1077 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101078 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s64)1079 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1080 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01081 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s16), [[C]](s64)1082 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 16 x s16>)1083 ; CHECK-NEXT: PseudoRET implicit $v8m41084 %1:_(s64) = COPY $x101085 %0:_(s16) = G_TRUNC %1(s64)1086 %3:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF1087 %4:_(s64) = G_CONSTANT i64 01088 %2:_(<vscale x 16 x s16>) = G_INSERT_VECTOR_ELT %3, %0(s16), %4(s64)1089 $v8m4 = COPY %2(<vscale x 16 x s16>)1090 PseudoRET implicit $v8m41091...1092---1093name: insertelement_nxv4i161094legalized: false1095tracksRegLiveness: true1096body: |1097 bb.0.entry:1098 liveins: $v8, $x101099 1100 ; CHECK-LABEL: name: insertelement_nxv4i161101 ; CHECK: liveins: $v8, $x101102 ; CHECK-NEXT: {{ $}}1103 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v81104 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x101105 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s64)1106 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01107 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT [[COPY]], [[TRUNC]](s16), [[C]](s64)1108 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 4 x s16>)1109 ; CHECK-NEXT: PseudoRET implicit $v81110 %0:_(<vscale x 4 x s16>) = COPY $v81111 %2:_(s64) = COPY $x101112 %1:_(s16) = G_TRUNC %2(s64)1113 %4:_(s64) = G_CONSTANT i64 01114 %3:_(<vscale x 4 x s16>) = G_INSERT_VECTOR_ELT %0, %1(s16), %4(s64)1115 $v8 = COPY %3(<vscale x 4 x s16>)1116 PseudoRET implicit $v81117...1118---1119name: insertelement_nxv1i32_01120legalized: false1121tracksRegLiveness: true1122body: |1123 bb.0.entry:1124 ; CHECK-LABEL: name: insertelement_nxv1i32_01125 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1126 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01127 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)1128 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01129 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C1]](s64)1130 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s32>)1131 ; CHECK-NEXT: PseudoRET implicit $v81132 %1:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1133 %2:_(s32) = G_CONSTANT i32 01134 %3:_(s64) = G_CONSTANT i64 01135 %0:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s64)1136 $v8 = COPY %0(<vscale x 1 x s32>)1137 PseudoRET implicit $v81138...1139---1140name: insertelement_nxv1i32_11141legalized: false1142tracksRegLiveness: true1143body: |1144 bb.0.entry:1145 ; CHECK-LABEL: name: insertelement_nxv1i32_11146 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1147 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -11148 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)1149 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01150 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C1]](s64)1151 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s32>)1152 ; CHECK-NEXT: PseudoRET implicit $v81153 %1:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1154 %2:_(s32) = G_CONSTANT i32 -11155 %3:_(s64) = G_CONSTANT i64 01156 %0:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s64)1157 $v8 = COPY %0(<vscale x 1 x s32>)1158 PseudoRET implicit $v81159...1160---1161name: insertelement_nxv1i32_21162legalized: false1163tracksRegLiveness: true1164body: |1165 bb.0.entry:1166 liveins: $x101167 1168 ; CHECK-LABEL: name: insertelement_nxv1i32_21169 ; CHECK: liveins: $x101170 ; CHECK-NEXT: {{ $}}1171 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101172 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)1173 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1174 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01175 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C]](s64)1176 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s32>)1177 ; CHECK-NEXT: PseudoRET implicit $v81178 %1:_(s64) = COPY $x101179 %0:_(s32) = G_TRUNC %1(s64)1180 %3:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF1181 %4:_(s64) = G_CONSTANT i64 01182 %2:_(<vscale x 1 x s32>) = G_INSERT_VECTOR_ELT %3, %0(s32), %4(s64)1183 $v8 = COPY %2(<vscale x 1 x s32>)1184 PseudoRET implicit $v81185...1186---1187name: insertelement_nxv2i32_01188legalized: false1189tracksRegLiveness: true1190body: |1191 bb.0.entry:1192 ; CHECK-LABEL: name: insertelement_nxv2i32_01193 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1194 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01195 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)1196 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01197 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C1]](s64)1198 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s32>)1199 ; CHECK-NEXT: PseudoRET implicit $v81200 %1:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1201 %2:_(s32) = G_CONSTANT i32 01202 %3:_(s64) = G_CONSTANT i64 01203 %0:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s64)1204 $v8 = COPY %0(<vscale x 2 x s32>)1205 PseudoRET implicit $v81206...1207---1208name: insertelement_nxv2i32_11209legalized: false1210tracksRegLiveness: true1211body: |1212 bb.0.entry:1213 ; CHECK-LABEL: name: insertelement_nxv2i32_11214 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1215 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -11216 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)1217 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01218 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C1]](s64)1219 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s32>)1220 ; CHECK-NEXT: PseudoRET implicit $v81221 %1:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1222 %2:_(s32) = G_CONSTANT i32 -11223 %3:_(s64) = G_CONSTANT i64 01224 %0:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s64)1225 $v8 = COPY %0(<vscale x 2 x s32>)1226 PseudoRET implicit $v81227...1228---1229name: insertelement_nxv2i32_21230legalized: false1231tracksRegLiveness: true1232body: |1233 bb.0.entry:1234 liveins: $x101235 1236 ; CHECK-LABEL: name: insertelement_nxv2i32_21237 ; CHECK: liveins: $x101238 ; CHECK-NEXT: {{ $}}1239 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101240 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)1241 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1242 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01243 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C]](s64)1244 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 2 x s32>)1245 ; CHECK-NEXT: PseudoRET implicit $v81246 %1:_(s64) = COPY $x101247 %0:_(s32) = G_TRUNC %1(s64)1248 %3:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF1249 %4:_(s64) = G_CONSTANT i64 01250 %2:_(<vscale x 2 x s32>) = G_INSERT_VECTOR_ELT %3, %0(s32), %4(s64)1251 $v8 = COPY %2(<vscale x 2 x s32>)1252 PseudoRET implicit $v81253...1254---1255name: insertelement_nxv4i32_01256legalized: false1257tracksRegLiveness: true1258body: |1259 bb.0.entry:1260 ; CHECK-LABEL: name: insertelement_nxv4i32_01261 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1262 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01263 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)1264 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01265 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C1]](s64)1266 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 4 x s32>)1267 ; CHECK-NEXT: PseudoRET implicit $v8m21268 %1:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1269 %2:_(s32) = G_CONSTANT i32 01270 %3:_(s64) = G_CONSTANT i64 01271 %0:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s64)1272 $v8m2 = COPY %0(<vscale x 4 x s32>)1273 PseudoRET implicit $v8m21274...1275---1276name: insertelement_nxv4i32_11277legalized: false1278tracksRegLiveness: true1279body: |1280 bb.0.entry:1281 ; CHECK-LABEL: name: insertelement_nxv4i32_11282 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1283 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -11284 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)1285 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01286 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C1]](s64)1287 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 4 x s32>)1288 ; CHECK-NEXT: PseudoRET implicit $v8m21289 %1:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1290 %2:_(s32) = G_CONSTANT i32 -11291 %3:_(s64) = G_CONSTANT i64 01292 %0:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s64)1293 $v8m2 = COPY %0(<vscale x 4 x s32>)1294 PseudoRET implicit $v8m21295...1296---1297name: insertelement_nxv4i32_21298legalized: false1299tracksRegLiveness: true1300body: |1301 bb.0.entry:1302 liveins: $x101303 1304 ; CHECK-LABEL: name: insertelement_nxv4i32_21305 ; CHECK: liveins: $x101306 ; CHECK-NEXT: {{ $}}1307 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101308 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)1309 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1310 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01311 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C]](s64)1312 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 4 x s32>)1313 ; CHECK-NEXT: PseudoRET implicit $v8m21314 %1:_(s64) = COPY $x101315 %0:_(s32) = G_TRUNC %1(s64)1316 %3:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF1317 %4:_(s64) = G_CONSTANT i64 01318 %2:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT %3, %0(s32), %4(s64)1319 $v8m2 = COPY %2(<vscale x 4 x s32>)1320 PseudoRET implicit $v8m21321...1322---1323name: insertelement_nxv8i32_01324legalized: false1325tracksRegLiveness: true1326body: |1327 bb.0.entry:1328 ; CHECK-LABEL: name: insertelement_nxv8i32_01329 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1330 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01331 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)1332 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01333 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C1]](s64)1334 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 8 x s32>)1335 ; CHECK-NEXT: PseudoRET implicit $v8m41336 %1:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1337 %2:_(s32) = G_CONSTANT i32 01338 %3:_(s64) = G_CONSTANT i64 01339 %0:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s64)1340 $v8m4 = COPY %0(<vscale x 8 x s32>)1341 PseudoRET implicit $v8m41342...1343---1344name: insertelement_nxv8i32_11345legalized: false1346tracksRegLiveness: true1347body: |1348 bb.0.entry:1349 ; CHECK-LABEL: name: insertelement_nxv8i32_11350 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1351 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -11352 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)1353 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01354 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C1]](s64)1355 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 8 x s32>)1356 ; CHECK-NEXT: PseudoRET implicit $v8m41357 %1:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1358 %2:_(s32) = G_CONSTANT i32 -11359 %3:_(s64) = G_CONSTANT i64 01360 %0:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s64)1361 $v8m4 = COPY %0(<vscale x 8 x s32>)1362 PseudoRET implicit $v8m41363...1364---1365name: insertelement_nxv8i32_21366legalized: false1367tracksRegLiveness: true1368body: |1369 bb.0.entry:1370 liveins: $x101371 1372 ; CHECK-LABEL: name: insertelement_nxv8i32_21373 ; CHECK: liveins: $x101374 ; CHECK-NEXT: {{ $}}1375 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101376 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)1377 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1378 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01379 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C]](s64)1380 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 8 x s32>)1381 ; CHECK-NEXT: PseudoRET implicit $v8m41382 %1:_(s64) = COPY $x101383 %0:_(s32) = G_TRUNC %1(s64)1384 %3:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF1385 %4:_(s64) = G_CONSTANT i64 01386 %2:_(<vscale x 8 x s32>) = G_INSERT_VECTOR_ELT %3, %0(s32), %4(s64)1387 $v8m4 = COPY %2(<vscale x 8 x s32>)1388 PseudoRET implicit $v8m41389...1390---1391name: insertelement_nxv16i32_01392legalized: false1393tracksRegLiveness: true1394body: |1395 bb.0.entry:1396 ; CHECK-LABEL: name: insertelement_nxv16i32_01397 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1398 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01399 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)1400 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01401 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C1]](s64)1402 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 16 x s32>)1403 ; CHECK-NEXT: PseudoRET implicit $v8m81404 %1:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1405 %2:_(s32) = G_CONSTANT i32 01406 %3:_(s64) = G_CONSTANT i64 01407 %0:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s64)1408 $v8m8 = COPY %0(<vscale x 16 x s32>)1409 PseudoRET implicit $v8m81410...1411---1412name: insertelement_nxv16i32_11413legalized: false1414tracksRegLiveness: true1415body: |1416 bb.0.entry:1417 ; CHECK-LABEL: name: insertelement_nxv16i32_11418 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1419 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -11420 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)1421 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01422 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C1]](s64)1423 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 16 x s32>)1424 ; CHECK-NEXT: PseudoRET implicit $v8m81425 %1:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1426 %2:_(s32) = G_CONSTANT i32 -11427 %3:_(s64) = G_CONSTANT i64 01428 %0:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT %1, %2(s32), %3(s64)1429 $v8m8 = COPY %0(<vscale x 16 x s32>)1430 PseudoRET implicit $v8m81431...1432---1433name: insertelement_nxv16i32_21434legalized: false1435tracksRegLiveness: true1436body: |1437 bb.0.entry:1438 liveins: $x101439 1440 ; CHECK-LABEL: name: insertelement_nxv16i32_21441 ; CHECK: liveins: $x101442 ; CHECK-NEXT: {{ $}}1443 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101444 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)1445 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1446 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01447 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT [[DEF]], [[TRUNC]](s32), [[C]](s64)1448 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 16 x s32>)1449 ; CHECK-NEXT: PseudoRET implicit $v8m81450 %1:_(s64) = COPY $x101451 %0:_(s32) = G_TRUNC %1(s64)1452 %3:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF1453 %4:_(s64) = G_CONSTANT i64 01454 %2:_(<vscale x 16 x s32>) = G_INSERT_VECTOR_ELT %3, %0(s32), %4(s64)1455 $v8m8 = COPY %2(<vscale x 16 x s32>)1456 PseudoRET implicit $v8m81457...1458---1459name: insertelement_nxv4i321460legalized: false1461tracksRegLiveness: true1462body: |1463 bb.0.entry:1464 liveins: $x10, $v8m21465 1466 ; CHECK-LABEL: name: insertelement_nxv4i321467 ; CHECK: liveins: $x10, $v8m21468 ; CHECK-NEXT: {{ $}}1469 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $v8m21470 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x101471 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)1472 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01473 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT [[COPY]], [[TRUNC]](s32), [[C]](s64)1474 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 4 x s32>)1475 ; CHECK-NEXT: PseudoRET implicit $v8m21476 %0:_(<vscale x 4 x s32>) = COPY $v8m21477 %2:_(s64) = COPY $x101478 %1:_(s32) = G_TRUNC %2(s64)1479 %4:_(s64) = G_CONSTANT i64 01480 %3:_(<vscale x 4 x s32>) = G_INSERT_VECTOR_ELT %0, %1(s32), %4(s64)1481 $v8m2 = COPY %3(<vscale x 4 x s32>)1482 PseudoRET implicit $v8m21483...1484---1485name: insertelement_nxv1i64_01486legalized: false1487tracksRegLiveness: true1488body: |1489 bb.0.entry:1490 ; CHECK-LABEL: name: insertelement_nxv1i64_01491 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1492 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01493 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s64), [[C]](s64)1494 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s64>)1495 ; CHECK-NEXT: PseudoRET implicit $v81496 %1:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1497 %2:_(s64) = G_CONSTANT i64 01498 %0:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %2(s64)1499 $v8 = COPY %0(<vscale x 1 x s64>)1500 PseudoRET implicit $v81501...1502---1503name: insertelement_nxv1i64_11504legalized: false1505tracksRegLiveness: true1506body: |1507 bb.0.entry:1508 ; CHECK-LABEL: name: insertelement_nxv1i64_11509 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1510 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -11511 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01512 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s64), [[C1]](s64)1513 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s64>)1514 ; CHECK-NEXT: PseudoRET implicit $v81515 %1:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1516 %2:_(s64) = G_CONSTANT i64 -11517 %3:_(s64) = G_CONSTANT i64 01518 %0:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s64)1519 $v8 = COPY %0(<vscale x 1 x s64>)1520 PseudoRET implicit $v81521...1522---1523name: insertelement_nxv1i64_21524legalized: false1525tracksRegLiveness: true1526body: |1527 bb.0.entry:1528 liveins: $x101529 1530 ; CHECK-LABEL: name: insertelement_nxv1i64_21531 ; CHECK: liveins: $x101532 ; CHECK-NEXT: {{ $}}1533 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101534 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1535 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01536 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY]](s64), [[C]](s64)1537 ; CHECK-NEXT: $v8 = COPY [[IVEC]](<vscale x 1 x s64>)1538 ; CHECK-NEXT: PseudoRET implicit $v81539 %0:_(s64) = COPY $x101540 %2:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF1541 %3:_(s64) = G_CONSTANT i64 01542 %1:_(<vscale x 1 x s64>) = G_INSERT_VECTOR_ELT %2, %0(s64), %3(s64)1543 $v8 = COPY %1(<vscale x 1 x s64>)1544 PseudoRET implicit $v81545...1546---1547name: insertelement_nxv2i64_01548legalized: false1549tracksRegLiveness: true1550body: |1551 bb.0.entry:1552 ; CHECK-LABEL: name: insertelement_nxv2i64_01553 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1554 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01555 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s64), [[C]](s64)1556 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 2 x s64>)1557 ; CHECK-NEXT: PseudoRET implicit $v8m21558 %1:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1559 %2:_(s64) = G_CONSTANT i64 01560 %0:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %2(s64)1561 $v8m2 = COPY %0(<vscale x 2 x s64>)1562 PseudoRET implicit $v8m21563...1564---1565name: insertelement_nxv2i64_11566legalized: false1567tracksRegLiveness: true1568body: |1569 bb.0.entry:1570 ; CHECK-LABEL: name: insertelement_nxv2i64_11571 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1572 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -11573 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01574 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s64), [[C1]](s64)1575 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 2 x s64>)1576 ; CHECK-NEXT: PseudoRET implicit $v8m21577 %1:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1578 %2:_(s64) = G_CONSTANT i64 -11579 %3:_(s64) = G_CONSTANT i64 01580 %0:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s64)1581 $v8m2 = COPY %0(<vscale x 2 x s64>)1582 PseudoRET implicit $v8m21583...1584---1585name: insertelement_nxv2i64_21586legalized: false1587tracksRegLiveness: true1588body: |1589 bb.0.entry:1590 liveins: $x101591 1592 ; CHECK-LABEL: name: insertelement_nxv2i64_21593 ; CHECK: liveins: $x101594 ; CHECK-NEXT: {{ $}}1595 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101596 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1597 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01598 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY]](s64), [[C]](s64)1599 ; CHECK-NEXT: $v8m2 = COPY [[IVEC]](<vscale x 2 x s64>)1600 ; CHECK-NEXT: PseudoRET implicit $v8m21601 %0:_(s64) = COPY $x101602 %2:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF1603 %3:_(s64) = G_CONSTANT i64 01604 %1:_(<vscale x 2 x s64>) = G_INSERT_VECTOR_ELT %2, %0(s64), %3(s64)1605 $v8m2 = COPY %1(<vscale x 2 x s64>)1606 PseudoRET implicit $v8m21607...1608---1609name: insertelement_nxv4i64_01610legalized: false1611tracksRegLiveness: true1612body: |1613 bb.0.entry:1614 ; CHECK-LABEL: name: insertelement_nxv4i64_01615 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1616 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01617 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s64), [[C]](s64)1618 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 4 x s64>)1619 ; CHECK-NEXT: PseudoRET implicit $v8m41620 %1:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1621 %2:_(s64) = G_CONSTANT i64 01622 %0:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %2(s64)1623 $v8m4 = COPY %0(<vscale x 4 x s64>)1624 PseudoRET implicit $v8m41625...1626---1627name: insertelement_nxv4i64_11628legalized: false1629tracksRegLiveness: true1630body: |1631 bb.0.entry:1632 ; CHECK-LABEL: name: insertelement_nxv4i64_11633 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1634 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -11635 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01636 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s64), [[C1]](s64)1637 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 4 x s64>)1638 ; CHECK-NEXT: PseudoRET implicit $v8m41639 %1:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1640 %2:_(s64) = G_CONSTANT i64 -11641 %3:_(s64) = G_CONSTANT i64 01642 %0:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s64)1643 $v8m4 = COPY %0(<vscale x 4 x s64>)1644 PseudoRET implicit $v8m41645...1646---1647name: insertelement_nxv4i64_21648legalized: false1649tracksRegLiveness: true1650body: |1651 bb.0.entry:1652 liveins: $x101653 1654 ; CHECK-LABEL: name: insertelement_nxv4i64_21655 ; CHECK: liveins: $x101656 ; CHECK-NEXT: {{ $}}1657 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101658 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1659 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01660 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY]](s64), [[C]](s64)1661 ; CHECK-NEXT: $v8m4 = COPY [[IVEC]](<vscale x 4 x s64>)1662 ; CHECK-NEXT: PseudoRET implicit $v8m41663 %0:_(s64) = COPY $x101664 %2:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF1665 %3:_(s64) = G_CONSTANT i64 01666 %1:_(<vscale x 4 x s64>) = G_INSERT_VECTOR_ELT %2, %0(s64), %3(s64)1667 $v8m4 = COPY %1(<vscale x 4 x s64>)1668 PseudoRET implicit $v8m41669...1670---1671name: insertelement_nxv8i64_01672legalized: false1673tracksRegLiveness: true1674body: |1675 bb.0.entry:1676 ; CHECK-LABEL: name: insertelement_nxv8i64_01677 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1678 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01679 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s64), [[C]](s64)1680 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 8 x s64>)1681 ; CHECK-NEXT: PseudoRET implicit $v8m81682 %1:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1683 %2:_(s64) = G_CONSTANT i64 01684 %0:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %2(s64)1685 $v8m8 = COPY %0(<vscale x 8 x s64>)1686 PseudoRET implicit $v8m81687...1688---1689name: insertelement_nxv8i64_11690legalized: false1691tracksRegLiveness: true1692body: |1693 bb.0.entry:1694 ; CHECK-LABEL: name: insertelement_nxv8i64_11695 ; CHECK: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1696 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -11697 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 01698 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[C]](s64), [[C1]](s64)1699 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 8 x s64>)1700 ; CHECK-NEXT: PseudoRET implicit $v8m81701 %1:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1702 %2:_(s64) = G_CONSTANT i64 -11703 %3:_(s64) = G_CONSTANT i64 01704 %0:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT %1, %2(s64), %3(s64)1705 $v8m8 = COPY %0(<vscale x 8 x s64>)1706 PseudoRET implicit $v8m81707...1708---1709name: insertelement_nxv8i64_21710legalized: false1711tracksRegLiveness: true1712body: |1713 bb.0.entry:1714 liveins: $x101715 1716 ; CHECK-LABEL: name: insertelement_nxv8i64_21717 ; CHECK: liveins: $x101718 ; CHECK-NEXT: {{ $}}1719 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x101720 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1721 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 01722 ; CHECK-NEXT: [[IVEC:%[0-9]+]]:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT [[DEF]], [[COPY]](s64), [[C]](s64)1723 ; CHECK-NEXT: $v8m8 = COPY [[IVEC]](<vscale x 8 x s64>)1724 ; CHECK-NEXT: PseudoRET implicit $v8m81725 %0:_(s64) = COPY $x101726 %2:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF1727 %3:_(s64) = G_CONSTANT i64 01728 %1:_(<vscale x 8 x s64>) = G_INSERT_VECTOR_ELT %2, %0(s64), %3(s64)1729 $v8m8 = COPY %1(<vscale x 8 x s64>)1730 PseudoRET implicit $v8m81731...1732