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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+v -run-pass=legalizer %s -o - | FileCheck --check-prefix=RV32 %s3# RUN: llc -mtriple=riscv64 -mattr=+v -run-pass=legalizer %s -o - | FileCheck --check-prefix=RV64 %s4 5# Extend from s1 element vectors6---7name: sext_nxv1i8_nxv1i18legalized: false9tracksRegLiveness: true10body: |11 bb.0.entry:12 liveins: $v013 ; RV32-LABEL: name: sext_nxv1i8_nxv1i114 ; RV32: liveins: $v015 ; RV32-NEXT: {{ $}}16 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v017 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 018 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[C]](s32)19 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -120 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[C1]](s32)21 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SELECT [[COPY]](<vscale x 1 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]22 ; RV32-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s8>)23 ; RV32-NEXT: PseudoRET implicit $v824 ;25 ; RV64-LABEL: name: sext_nxv1i8_nxv1i126 ; RV64: liveins: $v027 ; RV64-NEXT: {{ $}}28 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v029 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 030 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[C]](s64)31 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -132 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[C1]](s64)33 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SELECT [[COPY]](<vscale x 1 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]34 ; RV64-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s8>)35 ; RV64-NEXT: PseudoRET implicit $v836 %1:_(<vscale x 1 x s1>) = COPY $v037 %0:_(<vscale x 1 x s8>) = G_SEXT %1(<vscale x 1 x s1>)38 $v8 = COPY %0(<vscale x 1 x s8>)39 PseudoRET implicit $v840...41---42name: sext_nxv1i16_nxv1i143legalized: false44tracksRegLiveness: true45body: |46 bb.0.entry:47 liveins: $v048 ; RV32-LABEL: name: sext_nxv1i16_nxv1i149 ; RV32: liveins: $v050 ; RV32-NEXT: {{ $}}51 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v052 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 053 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[C]](s32)54 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -155 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[C1]](s32)56 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SELECT [[COPY]](<vscale x 1 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]57 ; RV32-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s16>)58 ; RV32-NEXT: PseudoRET implicit $v859 ;60 ; RV64-LABEL: name: sext_nxv1i16_nxv1i161 ; RV64: liveins: $v062 ; RV64-NEXT: {{ $}}63 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v064 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 065 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[C]](s64)66 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -167 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[C1]](s64)68 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SELECT [[COPY]](<vscale x 1 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]69 ; RV64-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s16>)70 ; RV64-NEXT: PseudoRET implicit $v871 %1:_(<vscale x 1 x s1>) = COPY $v072 %0:_(<vscale x 1 x s16>) = G_SEXT %1(<vscale x 1 x s1>)73 $v8 = COPY %0(<vscale x 1 x s16>)74 PseudoRET implicit $v875...76---77name: sext_nxv1i32_nxv1i178legalized: false79tracksRegLiveness: true80body: |81 bb.0.entry:82 liveins: $v083 ; RV32-LABEL: name: sext_nxv1i32_nxv1i184 ; RV32: liveins: $v085 ; RV32-NEXT: {{ $}}86 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v087 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 088 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[C]](s32)89 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -190 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[C1]](s32)91 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SELECT [[COPY]](<vscale x 1 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]92 ; RV32-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s32>)93 ; RV32-NEXT: PseudoRET implicit $v894 ;95 ; RV64-LABEL: name: sext_nxv1i32_nxv1i196 ; RV64: liveins: $v097 ; RV64-NEXT: {{ $}}98 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v099 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0100 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[C]](s64)101 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1102 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[C1]](s64)103 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SELECT [[COPY]](<vscale x 1 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]104 ; RV64-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s32>)105 ; RV64-NEXT: PseudoRET implicit $v8106 %1:_(<vscale x 1 x s1>) = COPY $v0107 %0:_(<vscale x 1 x s32>) = G_SEXT %1(<vscale x 1 x s1>)108 $v8 = COPY %0(<vscale x 1 x s32>)109 PseudoRET implicit $v8110...111---112name: sext_nxv1i64_nxv1i1113legalized: false114tracksRegLiveness: true115body: |116 bb.0.entry:117 liveins: $v0118 ; RV32-LABEL: name: sext_nxv1i64_nxv1i1119 ; RV32: liveins: $v0120 ; RV32-NEXT: {{ $}}121 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v0122 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0123 ; RV32-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)124 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[MV]](s64)125 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1126 ; RV32-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C1]](s32), [[C1]](s32)127 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[MV1]](s64)128 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SELECT [[COPY]](<vscale x 1 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]129 ; RV32-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s64>)130 ; RV32-NEXT: PseudoRET implicit $v8131 ;132 ; RV64-LABEL: name: sext_nxv1i64_nxv1i1133 ; RV64: liveins: $v0134 ; RV64-NEXT: {{ $}}135 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s1>) = COPY $v0136 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0137 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[C]](s64)138 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1139 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[C1]](s64)140 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SELECT [[COPY]](<vscale x 1 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]141 ; RV64-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s64>)142 ; RV64-NEXT: PseudoRET implicit $v8143 %1:_(<vscale x 1 x s1>) = COPY $v0144 %0:_(<vscale x 1 x s64>) = G_SEXT %1(<vscale x 1 x s1>)145 $v8 = COPY %0(<vscale x 1 x s64>)146 PseudoRET implicit $v8147...148---149name: sext_nxv2i8_nxv2i1150legalized: false151tracksRegLiveness: true152body: |153 bb.0.entry:154 liveins: $v0155 ; RV32-LABEL: name: sext_nxv2i8_nxv2i1156 ; RV32: liveins: $v0157 ; RV32-NEXT: {{ $}}158 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s1>) = COPY $v0159 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0160 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[C]](s32)161 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1162 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[C1]](s32)163 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SELECT [[COPY]](<vscale x 2 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]164 ; RV32-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s8>)165 ; RV32-NEXT: PseudoRET implicit $v8166 ;167 ; RV64-LABEL: name: sext_nxv2i8_nxv2i1168 ; RV64: liveins: $v0169 ; RV64-NEXT: {{ $}}170 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s1>) = COPY $v0171 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0172 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[C]](s64)173 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1174 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[C1]](s64)175 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SELECT [[COPY]](<vscale x 2 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]176 ; RV64-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s8>)177 ; RV64-NEXT: PseudoRET implicit $v8178 %1:_(<vscale x 2 x s1>) = COPY $v0179 %0:_(<vscale x 2 x s8>) = G_SEXT %1(<vscale x 2 x s1>)180 $v8 = COPY %0(<vscale x 2 x s8>)181 PseudoRET implicit $v8182...183---184name: sext_nxv2i16_nxv2i1185legalized: false186tracksRegLiveness: true187body: |188 bb.0.entry:189 liveins: $v0190 ; RV32-LABEL: name: sext_nxv2i16_nxv2i1191 ; RV32: liveins: $v0192 ; RV32-NEXT: {{ $}}193 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s1>) = COPY $v0194 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0195 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[C]](s32)196 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1197 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[C1]](s32)198 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SELECT [[COPY]](<vscale x 2 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]199 ; RV32-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s16>)200 ; RV32-NEXT: PseudoRET implicit $v8201 ;202 ; RV64-LABEL: name: sext_nxv2i16_nxv2i1203 ; RV64: liveins: $v0204 ; RV64-NEXT: {{ $}}205 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s1>) = COPY $v0206 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0207 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[C]](s64)208 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1209 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[C1]](s64)210 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SELECT [[COPY]](<vscale x 2 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]211 ; RV64-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s16>)212 ; RV64-NEXT: PseudoRET implicit $v8213 %1:_(<vscale x 2 x s1>) = COPY $v0214 %0:_(<vscale x 2 x s16>) = G_SEXT %1(<vscale x 2 x s1>)215 $v8 = COPY %0(<vscale x 2 x s16>)216 PseudoRET implicit $v8217...218---219name: sext_nxv2i32_nxv2i1220legalized: false221tracksRegLiveness: true222body: |223 bb.0.entry:224 liveins: $v0225 ; RV32-LABEL: name: sext_nxv2i32_nxv2i1226 ; RV32: liveins: $v0227 ; RV32-NEXT: {{ $}}228 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s1>) = COPY $v0229 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0230 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[C]](s32)231 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1232 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[C1]](s32)233 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SELECT [[COPY]](<vscale x 2 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]234 ; RV32-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s32>)235 ; RV32-NEXT: PseudoRET implicit $v8236 ;237 ; RV64-LABEL: name: sext_nxv2i32_nxv2i1238 ; RV64: liveins: $v0239 ; RV64-NEXT: {{ $}}240 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s1>) = COPY $v0241 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0242 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[C]](s64)243 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1244 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[C1]](s64)245 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SELECT [[COPY]](<vscale x 2 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]246 ; RV64-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s32>)247 ; RV64-NEXT: PseudoRET implicit $v8248 %1:_(<vscale x 2 x s1>) = COPY $v0249 %0:_(<vscale x 2 x s32>) = G_SEXT %1(<vscale x 2 x s1>)250 $v8 = COPY %0(<vscale x 2 x s32>)251 PseudoRET implicit $v8252...253---254name: sext_nxv2i64_nxv2i1255legalized: false256tracksRegLiveness: true257body: |258 bb.0.entry:259 liveins: $v0260 ; RV32-LABEL: name: sext_nxv2i64_nxv2i1261 ; RV32: liveins: $v0262 ; RV32-NEXT: {{ $}}263 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s1>) = COPY $v0264 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0265 ; RV32-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)266 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[MV]](s64)267 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1268 ; RV32-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C1]](s32), [[C1]](s32)269 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[MV1]](s64)270 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SELECT [[COPY]](<vscale x 2 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]271 ; RV32-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 2 x s64>)272 ; RV32-NEXT: PseudoRET implicit $v8m2273 ;274 ; RV64-LABEL: name: sext_nxv2i64_nxv2i1275 ; RV64: liveins: $v0276 ; RV64-NEXT: {{ $}}277 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s1>) = COPY $v0278 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0279 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[C]](s64)280 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1281 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[C1]](s64)282 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SELECT [[COPY]](<vscale x 2 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]283 ; RV64-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 2 x s64>)284 ; RV64-NEXT: PseudoRET implicit $v8m2285 %1:_(<vscale x 2 x s1>) = COPY $v0286 %0:_(<vscale x 2 x s64>) = G_SEXT %1(<vscale x 2 x s1>)287 $v8m2 = COPY %0(<vscale x 2 x s64>)288 PseudoRET implicit $v8m2289...290---291name: sext_nxv4i8_nxv4i1292legalized: false293tracksRegLiveness: true294body: |295 bb.0.entry:296 liveins: $v0297 ; RV32-LABEL: name: sext_nxv4i8_nxv4i1298 ; RV32: liveins: $v0299 ; RV32-NEXT: {{ $}}300 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0301 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0302 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[C]](s32)303 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1304 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[C1]](s32)305 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SELECT [[COPY]](<vscale x 4 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]306 ; RV32-NEXT: $v8 = COPY [[SELECT]](<vscale x 4 x s8>)307 ; RV32-NEXT: PseudoRET implicit $v8308 ;309 ; RV64-LABEL: name: sext_nxv4i8_nxv4i1310 ; RV64: liveins: $v0311 ; RV64-NEXT: {{ $}}312 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0313 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0314 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[C]](s64)315 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1316 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[C1]](s64)317 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SELECT [[COPY]](<vscale x 4 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]318 ; RV64-NEXT: $v8 = COPY [[SELECT]](<vscale x 4 x s8>)319 ; RV64-NEXT: PseudoRET implicit $v8320 %1:_(<vscale x 4 x s1>) = COPY $v0321 %0:_(<vscale x 4 x s8>) = G_SEXT %1(<vscale x 4 x s1>)322 $v8 = COPY %0(<vscale x 4 x s8>)323 PseudoRET implicit $v8324...325---326name: sext_nxv4i16_nxv4i1327legalized: false328tracksRegLiveness: true329body: |330 bb.0.entry:331 liveins: $v0332 ; RV32-LABEL: name: sext_nxv4i16_nxv4i1333 ; RV32: liveins: $v0334 ; RV32-NEXT: {{ $}}335 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0336 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0337 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[C]](s32)338 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1339 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[C1]](s32)340 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SELECT [[COPY]](<vscale x 4 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]341 ; RV32-NEXT: $v8 = COPY [[SELECT]](<vscale x 4 x s16>)342 ; RV32-NEXT: PseudoRET implicit $v8343 ;344 ; RV64-LABEL: name: sext_nxv4i16_nxv4i1345 ; RV64: liveins: $v0346 ; RV64-NEXT: {{ $}}347 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0348 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0349 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[C]](s64)350 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1351 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[C1]](s64)352 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SELECT [[COPY]](<vscale x 4 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]353 ; RV64-NEXT: $v8 = COPY [[SELECT]](<vscale x 4 x s16>)354 ; RV64-NEXT: PseudoRET implicit $v8355 %1:_(<vscale x 4 x s1>) = COPY $v0356 %0:_(<vscale x 4 x s16>) = G_SEXT %1(<vscale x 4 x s1>)357 $v8 = COPY %0(<vscale x 4 x s16>)358 PseudoRET implicit $v8359...360---361name: sext_nxv4i32_nxv4i1362legalized: false363tracksRegLiveness: true364body: |365 bb.0.entry:366 liveins: $v0367 ; RV32-LABEL: name: sext_nxv4i32_nxv4i1368 ; RV32: liveins: $v0369 ; RV32-NEXT: {{ $}}370 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0371 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0372 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[C]](s32)373 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1374 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[C1]](s32)375 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SELECT [[COPY]](<vscale x 4 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]376 ; RV32-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 4 x s32>)377 ; RV32-NEXT: PseudoRET implicit $v8m2378 ;379 ; RV64-LABEL: name: sext_nxv4i32_nxv4i1380 ; RV64: liveins: $v0381 ; RV64-NEXT: {{ $}}382 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0383 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0384 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[C]](s64)385 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1386 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[C1]](s64)387 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SELECT [[COPY]](<vscale x 4 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]388 ; RV64-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 4 x s32>)389 ; RV64-NEXT: PseudoRET implicit $v8m2390 %1:_(<vscale x 4 x s1>) = COPY $v0391 %0:_(<vscale x 4 x s32>) = G_SEXT %1(<vscale x 4 x s1>)392 $v8m2 = COPY %0(<vscale x 4 x s32>)393 PseudoRET implicit $v8m2394...395---396name: sext_nxv4i64_nxv4i1397legalized: false398tracksRegLiveness: true399body: |400 bb.0.entry:401 liveins: $v0402 ; RV32-LABEL: name: sext_nxv4i64_nxv4i1403 ; RV32: liveins: $v0404 ; RV32-NEXT: {{ $}}405 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0406 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0407 ; RV32-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)408 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[MV]](s64)409 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1410 ; RV32-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C1]](s32), [[C1]](s32)411 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[MV1]](s64)412 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SELECT [[COPY]](<vscale x 4 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]413 ; RV32-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 4 x s64>)414 ; RV32-NEXT: PseudoRET implicit $v8m4415 ;416 ; RV64-LABEL: name: sext_nxv4i64_nxv4i1417 ; RV64: liveins: $v0418 ; RV64-NEXT: {{ $}}419 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s1>) = COPY $v0420 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0421 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[C]](s64)422 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1423 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[C1]](s64)424 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SELECT [[COPY]](<vscale x 4 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]425 ; RV64-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 4 x s64>)426 ; RV64-NEXT: PseudoRET implicit $v8m4427 %1:_(<vscale x 4 x s1>) = COPY $v0428 %0:_(<vscale x 4 x s64>) = G_SEXT %1(<vscale x 4 x s1>)429 $v8m4 = COPY %0(<vscale x 4 x s64>)430 PseudoRET implicit $v8m4431...432---433name: sext_nxv8i8_nxv8i1434legalized: false435tracksRegLiveness: true436body: |437 bb.0.entry:438 liveins: $v0439 ; RV32-LABEL: name: sext_nxv8i8_nxv8i1440 ; RV32: liveins: $v0441 ; RV32-NEXT: {{ $}}442 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s1>) = COPY $v0443 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0444 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[C]](s32)445 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1446 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[C1]](s32)447 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SELECT [[COPY]](<vscale x 8 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]448 ; RV32-NEXT: $v8 = COPY [[SELECT]](<vscale x 8 x s8>)449 ; RV32-NEXT: PseudoRET implicit $v8450 ;451 ; RV64-LABEL: name: sext_nxv8i8_nxv8i1452 ; RV64: liveins: $v0453 ; RV64-NEXT: {{ $}}454 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s1>) = COPY $v0455 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0456 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[C]](s64)457 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1458 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[C1]](s64)459 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SELECT [[COPY]](<vscale x 8 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]460 ; RV64-NEXT: $v8 = COPY [[SELECT]](<vscale x 8 x s8>)461 ; RV64-NEXT: PseudoRET implicit $v8462 %1:_(<vscale x 8 x s1>) = COPY $v0463 %0:_(<vscale x 8 x s8>) = G_SEXT %1(<vscale x 8 x s1>)464 $v8 = COPY %0(<vscale x 8 x s8>)465 PseudoRET implicit $v8466...467---468name: sext_nxv8i16_nxv8i1469legalized: false470tracksRegLiveness: true471body: |472 bb.0.entry:473 liveins: $v0474 ; RV32-LABEL: name: sext_nxv8i16_nxv8i1475 ; RV32: liveins: $v0476 ; RV32-NEXT: {{ $}}477 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s1>) = COPY $v0478 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0479 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[C]](s32)480 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1481 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[C1]](s32)482 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SELECT [[COPY]](<vscale x 8 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]483 ; RV32-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 8 x s16>)484 ; RV32-NEXT: PseudoRET implicit $v8m2485 ;486 ; RV64-LABEL: name: sext_nxv8i16_nxv8i1487 ; RV64: liveins: $v0488 ; RV64-NEXT: {{ $}}489 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s1>) = COPY $v0490 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0491 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[C]](s64)492 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1493 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[C1]](s64)494 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SELECT [[COPY]](<vscale x 8 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]495 ; RV64-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 8 x s16>)496 ; RV64-NEXT: PseudoRET implicit $v8m2497 %1:_(<vscale x 8 x s1>) = COPY $v0498 %0:_(<vscale x 8 x s16>) = G_SEXT %1(<vscale x 8 x s1>)499 $v8m2 = COPY %0(<vscale x 8 x s16>)500 PseudoRET implicit $v8m2501...502---503name: sext_nxv8i32_nxv8i1504legalized: false505tracksRegLiveness: true506body: |507 bb.0.entry:508 liveins: $v0509 ; RV32-LABEL: name: sext_nxv8i32_nxv8i1510 ; RV32: liveins: $v0511 ; RV32-NEXT: {{ $}}512 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s1>) = COPY $v0513 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0514 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[C]](s32)515 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1516 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[C1]](s32)517 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SELECT [[COPY]](<vscale x 8 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]518 ; RV32-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 8 x s32>)519 ; RV32-NEXT: PseudoRET implicit $v8m4520 ;521 ; RV64-LABEL: name: sext_nxv8i32_nxv8i1522 ; RV64: liveins: $v0523 ; RV64-NEXT: {{ $}}524 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s1>) = COPY $v0525 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0526 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[C]](s64)527 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1528 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[C1]](s64)529 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SELECT [[COPY]](<vscale x 8 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]530 ; RV64-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 8 x s32>)531 ; RV64-NEXT: PseudoRET implicit $v8m4532 %1:_(<vscale x 8 x s1>) = COPY $v0533 %0:_(<vscale x 8 x s32>) = G_SEXT %1(<vscale x 8 x s1>)534 $v8m4 = COPY %0(<vscale x 8 x s32>)535 PseudoRET implicit $v8m4536...537---538name: sext_nxv8i64_nxv8i1539legalized: false540tracksRegLiveness: true541body: |542 bb.0.entry:543 liveins: $v0544 ; RV32-LABEL: name: sext_nxv8i64_nxv8i1545 ; RV32: liveins: $v0546 ; RV32-NEXT: {{ $}}547 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s1>) = COPY $v0548 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0549 ; RV32-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C]](s32)550 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[MV]](s64)551 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1552 ; RV32-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C1]](s32), [[C1]](s32)553 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[MV1]](s64)554 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SELECT [[COPY]](<vscale x 8 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]555 ; RV32-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 8 x s64>)556 ; RV32-NEXT: PseudoRET implicit $v8m8557 ;558 ; RV64-LABEL: name: sext_nxv8i64_nxv8i1559 ; RV64: liveins: $v0560 ; RV64-NEXT: {{ $}}561 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s1>) = COPY $v0562 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0563 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[C]](s64)564 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1565 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[C1]](s64)566 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SELECT [[COPY]](<vscale x 8 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]567 ; RV64-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 8 x s64>)568 ; RV64-NEXT: PseudoRET implicit $v8m8569 %1:_(<vscale x 8 x s1>) = COPY $v0570 %0:_(<vscale x 8 x s64>) = G_SEXT %1(<vscale x 8 x s1>)571 $v8m8 = COPY %0(<vscale x 8 x s64>)572 PseudoRET implicit $v8m8573...574---575name: sext_nxv16i8_nxv16i1576legalized: false577tracksRegLiveness: true578body: |579 bb.0.entry:580 liveins: $v0581 ; RV32-LABEL: name: sext_nxv16i8_nxv16i1582 ; RV32: liveins: $v0583 ; RV32-NEXT: {{ $}}584 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s1>) = COPY $v0585 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0586 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[C]](s32)587 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1588 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[C1]](s32)589 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SELECT [[COPY]](<vscale x 16 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]590 ; RV32-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 16 x s8>)591 ; RV32-NEXT: PseudoRET implicit $v8m2592 ;593 ; RV64-LABEL: name: sext_nxv16i8_nxv16i1594 ; RV64: liveins: $v0595 ; RV64-NEXT: {{ $}}596 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s1>) = COPY $v0597 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0598 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[C]](s64)599 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1600 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[C1]](s64)601 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SELECT [[COPY]](<vscale x 16 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]602 ; RV64-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 16 x s8>)603 ; RV64-NEXT: PseudoRET implicit $v8m2604 %1:_(<vscale x 16 x s1>) = COPY $v0605 %0:_(<vscale x 16 x s8>) = G_SEXT %1(<vscale x 16 x s1>)606 $v8m2 = COPY %0(<vscale x 16 x s8>)607 PseudoRET implicit $v8m2608...609---610name: sext_nxv16i16_nxv16i1611legalized: false612tracksRegLiveness: true613body: |614 bb.0.entry:615 liveins: $v0616 ; RV32-LABEL: name: sext_nxv16i16_nxv16i1617 ; RV32: liveins: $v0618 ; RV32-NEXT: {{ $}}619 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s1>) = COPY $v0620 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0621 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[C]](s32)622 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1623 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[C1]](s32)624 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SELECT [[COPY]](<vscale x 16 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]625 ; RV32-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 16 x s16>)626 ; RV32-NEXT: PseudoRET implicit $v8m4627 ;628 ; RV64-LABEL: name: sext_nxv16i16_nxv16i1629 ; RV64: liveins: $v0630 ; RV64-NEXT: {{ $}}631 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s1>) = COPY $v0632 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0633 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[C]](s64)634 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1635 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[C1]](s64)636 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SELECT [[COPY]](<vscale x 16 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]637 ; RV64-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 16 x s16>)638 ; RV64-NEXT: PseudoRET implicit $v8m4639 %1:_(<vscale x 16 x s1>) = COPY $v0640 %0:_(<vscale x 16 x s16>) = G_SEXT %1(<vscale x 16 x s1>)641 $v8m4 = COPY %0(<vscale x 16 x s16>)642 PseudoRET implicit $v8m4643...644---645name: sext_nxv16i32_nxv16i1646legalized: false647tracksRegLiveness: true648body: |649 bb.0.entry:650 liveins: $v0651 ; RV32-LABEL: name: sext_nxv16i32_nxv16i1652 ; RV32: liveins: $v0653 ; RV32-NEXT: {{ $}}654 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s1>) = COPY $v0655 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0656 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[C]](s32)657 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1658 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[C1]](s32)659 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SELECT [[COPY]](<vscale x 16 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]660 ; RV32-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 16 x s32>)661 ; RV32-NEXT: PseudoRET implicit $v8m8662 ;663 ; RV64-LABEL: name: sext_nxv16i32_nxv16i1664 ; RV64: liveins: $v0665 ; RV64-NEXT: {{ $}}666 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s1>) = COPY $v0667 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0668 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[C]](s64)669 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1670 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[C1]](s64)671 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SELECT [[COPY]](<vscale x 16 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]672 ; RV64-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 16 x s32>)673 ; RV64-NEXT: PseudoRET implicit $v8m8674 %1:_(<vscale x 16 x s1>) = COPY $v0675 %0:_(<vscale x 16 x s32>) = G_SEXT %1(<vscale x 16 x s1>)676 $v8m8 = COPY %0(<vscale x 16 x s32>)677 PseudoRET implicit $v8m8678...679---680name: sext_nxv32i8_nxv32i1681legalized: false682tracksRegLiveness: true683body: |684 bb.0.entry:685 liveins: $v0686 ; RV32-LABEL: name: sext_nxv32i8_nxv32i1687 ; RV32: liveins: $v0688 ; RV32-NEXT: {{ $}}689 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 32 x s1>) = COPY $v0690 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0691 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[C]](s32)692 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1693 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[C1]](s32)694 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SELECT [[COPY]](<vscale x 32 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]695 ; RV32-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 32 x s8>)696 ; RV32-NEXT: PseudoRET implicit $v8m4697 ;698 ; RV64-LABEL: name: sext_nxv32i8_nxv32i1699 ; RV64: liveins: $v0700 ; RV64-NEXT: {{ $}}701 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 32 x s1>) = COPY $v0702 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0703 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[C]](s64)704 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1705 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[C1]](s64)706 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SELECT [[COPY]](<vscale x 32 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]707 ; RV64-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 32 x s8>)708 ; RV64-NEXT: PseudoRET implicit $v8m4709 %1:_(<vscale x 32 x s1>) = COPY $v0710 %0:_(<vscale x 32 x s8>) = G_SEXT %1(<vscale x 32 x s1>)711 $v8m4 = COPY %0(<vscale x 32 x s8>)712 PseudoRET implicit $v8m4713...714---715name: sext_nxv32i16_nxv32i1716legalized: false717tracksRegLiveness: true718body: |719 bb.0.entry:720 liveins: $v0721 ; RV32-LABEL: name: sext_nxv32i16_nxv32i1722 ; RV32: liveins: $v0723 ; RV32-NEXT: {{ $}}724 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 32 x s1>) = COPY $v0725 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0726 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 32 x s16>) = G_SPLAT_VECTOR [[C]](s32)727 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1728 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 32 x s16>) = G_SPLAT_VECTOR [[C1]](s32)729 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 32 x s16>) = G_SELECT [[COPY]](<vscale x 32 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]730 ; RV32-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 32 x s16>)731 ; RV32-NEXT: PseudoRET implicit $v8m8732 ;733 ; RV64-LABEL: name: sext_nxv32i16_nxv32i1734 ; RV64: liveins: $v0735 ; RV64-NEXT: {{ $}}736 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 32 x s1>) = COPY $v0737 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0738 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 32 x s16>) = G_SPLAT_VECTOR [[C]](s64)739 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1740 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 32 x s16>) = G_SPLAT_VECTOR [[C1]](s64)741 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 32 x s16>) = G_SELECT [[COPY]](<vscale x 32 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]742 ; RV64-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 32 x s16>)743 ; RV64-NEXT: PseudoRET implicit $v8m8744 %1:_(<vscale x 32 x s1>) = COPY $v0745 %0:_(<vscale x 32 x s16>) = G_SEXT %1(<vscale x 32 x s1>)746 $v8m8 = COPY %0(<vscale x 32 x s16>)747 PseudoRET implicit $v8m8748...749---750name: sext_nxv64i8_nxv64i1751legalized: false752tracksRegLiveness: true753body: |754 bb.0.entry:755 liveins: $v0756 ; RV32-LABEL: name: sext_nxv64i8_nxv64i1757 ; RV32: liveins: $v0758 ; RV32-NEXT: {{ $}}759 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 64 x s1>) = COPY $v0760 ; RV32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0761 ; RV32-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[C]](s32)762 ; RV32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1763 ; RV32-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[C1]](s32)764 ; RV32-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SELECT [[COPY]](<vscale x 64 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]765 ; RV32-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 64 x s8>)766 ; RV32-NEXT: PseudoRET implicit $v8m8767 ;768 ; RV64-LABEL: name: sext_nxv64i8_nxv64i1769 ; RV64: liveins: $v0770 ; RV64-NEXT: {{ $}}771 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 64 x s1>) = COPY $v0772 ; RV64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0773 ; RV64-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[C]](s64)774 ; RV64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1775 ; RV64-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[C1]](s64)776 ; RV64-NEXT: [[SELECT:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SELECT [[COPY]](<vscale x 64 x s1>), [[SPLAT_VECTOR1]], [[SPLAT_VECTOR]]777 ; RV64-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 64 x s8>)778 ; RV64-NEXT: PseudoRET implicit $v8m8779 %1:_(<vscale x 64 x s1>) = COPY $v0780 %0:_(<vscale x 64 x s8>) = G_SEXT %1(<vscale x 64 x s1>)781 $v8m8 = COPY %0(<vscale x 64 x s8>)782 PseudoRET implicit $v8m8783...784 785# Extend from s8 element vectors786---787name: sext_nxv1i16_nxv1i8788legalized: false789tracksRegLiveness: true790body: |791 bb.0.entry:792 liveins: $v8793 ; RV32-LABEL: name: sext_nxv1i16_nxv1i8794 ; RV32: liveins: $v8795 ; RV32-NEXT: {{ $}}796 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8797 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SEXT [[COPY]](<vscale x 1 x s8>)798 ; RV32-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s16>)799 ; RV32-NEXT: PseudoRET implicit $v8800 ;801 ; RV64-LABEL: name: sext_nxv1i16_nxv1i8802 ; RV64: liveins: $v8803 ; RV64-NEXT: {{ $}}804 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8805 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SEXT [[COPY]](<vscale x 1 x s8>)806 ; RV64-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s16>)807 ; RV64-NEXT: PseudoRET implicit $v8808 %1:_(<vscale x 1 x s8>) = COPY $v8809 %0:_(<vscale x 1 x s16>) = G_SEXT %1(<vscale x 1 x s8>)810 $v8 = COPY %0(<vscale x 1 x s16>)811 PseudoRET implicit $v8812...813---814name: sext_nxv1i32_nxv1i8815legalized: false816tracksRegLiveness: true817body: |818 bb.0.entry:819 liveins: $v8820 ; RV32-LABEL: name: sext_nxv1i32_nxv1i8821 ; RV32: liveins: $v8822 ; RV32-NEXT: {{ $}}823 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8824 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SEXT [[COPY]](<vscale x 1 x s8>)825 ; RV32-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s32>)826 ; RV32-NEXT: PseudoRET implicit $v8827 ;828 ; RV64-LABEL: name: sext_nxv1i32_nxv1i8829 ; RV64: liveins: $v8830 ; RV64-NEXT: {{ $}}831 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8832 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SEXT [[COPY]](<vscale x 1 x s8>)833 ; RV64-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s32>)834 ; RV64-NEXT: PseudoRET implicit $v8835 %1:_(<vscale x 1 x s8>) = COPY $v8836 %0:_(<vscale x 1 x s32>) = G_SEXT %1(<vscale x 1 x s8>)837 $v8 = COPY %0(<vscale x 1 x s32>)838 PseudoRET implicit $v8839...840---841name: sext_nxv1i64_nxv1i8842legalized: false843tracksRegLiveness: true844body: |845 bb.0.entry:846 liveins: $v8847 ; RV32-LABEL: name: sext_nxv1i64_nxv1i8848 ; RV32: liveins: $v8849 ; RV32-NEXT: {{ $}}850 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8851 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SEXT [[COPY]](<vscale x 1 x s8>)852 ; RV32-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s64>)853 ; RV32-NEXT: PseudoRET implicit $v8854 ;855 ; RV64-LABEL: name: sext_nxv1i64_nxv1i8856 ; RV64: liveins: $v8857 ; RV64-NEXT: {{ $}}858 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8859 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SEXT [[COPY]](<vscale x 1 x s8>)860 ; RV64-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s64>)861 ; RV64-NEXT: PseudoRET implicit $v8862 %1:_(<vscale x 1 x s8>) = COPY $v8863 %0:_(<vscale x 1 x s64>) = G_SEXT %1(<vscale x 1 x s8>)864 $v8 = COPY %0(<vscale x 1 x s64>)865 PseudoRET implicit $v8866...867---868name: sext_nxv2i16_nxv2i8869legalized: false870tracksRegLiveness: true871body: |872 bb.0.entry:873 liveins: $v8874 ; RV32-LABEL: name: sext_nxv2i16_nxv2i8875 ; RV32: liveins: $v8876 ; RV32-NEXT: {{ $}}877 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8878 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SEXT [[COPY]](<vscale x 2 x s8>)879 ; RV32-NEXT: $v8 = COPY [[SEXT]](<vscale x 2 x s16>)880 ; RV32-NEXT: PseudoRET implicit $v8881 ;882 ; RV64-LABEL: name: sext_nxv2i16_nxv2i8883 ; RV64: liveins: $v8884 ; RV64-NEXT: {{ $}}885 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8886 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SEXT [[COPY]](<vscale x 2 x s8>)887 ; RV64-NEXT: $v8 = COPY [[SEXT]](<vscale x 2 x s16>)888 ; RV64-NEXT: PseudoRET implicit $v8889 %1:_(<vscale x 2 x s8>) = COPY $v8890 %0:_(<vscale x 2 x s16>) = G_SEXT %1(<vscale x 2 x s8>)891 $v8 = COPY %0(<vscale x 2 x s16>)892 PseudoRET implicit $v8893...894---895name: sext_nxv2i32_nxv2i8896legalized: false897tracksRegLiveness: true898body: |899 bb.0.entry:900 liveins: $v8901 ; RV32-LABEL: name: sext_nxv2i32_nxv2i8902 ; RV32: liveins: $v8903 ; RV32-NEXT: {{ $}}904 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8905 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SEXT [[COPY]](<vscale x 2 x s8>)906 ; RV32-NEXT: $v8 = COPY [[SEXT]](<vscale x 2 x s32>)907 ; RV32-NEXT: PseudoRET implicit $v8908 ;909 ; RV64-LABEL: name: sext_nxv2i32_nxv2i8910 ; RV64: liveins: $v8911 ; RV64-NEXT: {{ $}}912 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8913 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SEXT [[COPY]](<vscale x 2 x s8>)914 ; RV64-NEXT: $v8 = COPY [[SEXT]](<vscale x 2 x s32>)915 ; RV64-NEXT: PseudoRET implicit $v8916 %1:_(<vscale x 2 x s8>) = COPY $v8917 %0:_(<vscale x 2 x s32>) = G_SEXT %1(<vscale x 2 x s8>)918 $v8 = COPY %0(<vscale x 2 x s32>)919 PseudoRET implicit $v8920...921---922name: sext_nxv2i64_nxv2i8923legalized: false924tracksRegLiveness: true925body: |926 bb.0.entry:927 liveins: $v8928 ; RV32-LABEL: name: sext_nxv2i64_nxv2i8929 ; RV32: liveins: $v8930 ; RV32-NEXT: {{ $}}931 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8932 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SEXT [[COPY]](<vscale x 2 x s8>)933 ; RV32-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 2 x s64>)934 ; RV32-NEXT: PseudoRET implicit $v8m2935 ;936 ; RV64-LABEL: name: sext_nxv2i64_nxv2i8937 ; RV64: liveins: $v8938 ; RV64-NEXT: {{ $}}939 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8940 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SEXT [[COPY]](<vscale x 2 x s8>)941 ; RV64-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 2 x s64>)942 ; RV64-NEXT: PseudoRET implicit $v8m2943 %1:_(<vscale x 2 x s8>) = COPY $v8944 %0:_(<vscale x 2 x s64>) = G_SEXT %1(<vscale x 2 x s8>)945 $v8m2 = COPY %0(<vscale x 2 x s64>)946 PseudoRET implicit $v8m2947...948---949name: sext_nxv4i16_nxv4i8950legalized: false951tracksRegLiveness: true952body: |953 bb.0.entry:954 liveins: $v8955 ; RV32-LABEL: name: sext_nxv4i16_nxv4i8956 ; RV32: liveins: $v8957 ; RV32-NEXT: {{ $}}958 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8959 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SEXT [[COPY]](<vscale x 4 x s8>)960 ; RV32-NEXT: $v8 = COPY [[SEXT]](<vscale x 4 x s16>)961 ; RV32-NEXT: PseudoRET implicit $v8962 ;963 ; RV64-LABEL: name: sext_nxv4i16_nxv4i8964 ; RV64: liveins: $v8965 ; RV64-NEXT: {{ $}}966 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8967 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SEXT [[COPY]](<vscale x 4 x s8>)968 ; RV64-NEXT: $v8 = COPY [[SEXT]](<vscale x 4 x s16>)969 ; RV64-NEXT: PseudoRET implicit $v8970 %1:_(<vscale x 4 x s8>) = COPY $v8971 %0:_(<vscale x 4 x s16>) = G_SEXT %1(<vscale x 4 x s8>)972 $v8 = COPY %0(<vscale x 4 x s16>)973 PseudoRET implicit $v8974...975---976name: sext_nxv4i32_nxv4i8977legalized: false978tracksRegLiveness: true979body: |980 bb.0.entry:981 liveins: $v8982 ; RV32-LABEL: name: sext_nxv4i32_nxv4i8983 ; RV32: liveins: $v8984 ; RV32-NEXT: {{ $}}985 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8986 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SEXT [[COPY]](<vscale x 4 x s8>)987 ; RV32-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 4 x s32>)988 ; RV32-NEXT: PseudoRET implicit $v8m2989 ;990 ; RV64-LABEL: name: sext_nxv4i32_nxv4i8991 ; RV64: liveins: $v8992 ; RV64-NEXT: {{ $}}993 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8994 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SEXT [[COPY]](<vscale x 4 x s8>)995 ; RV64-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 4 x s32>)996 ; RV64-NEXT: PseudoRET implicit $v8m2997 %1:_(<vscale x 4 x s8>) = COPY $v8998 %0:_(<vscale x 4 x s32>) = G_SEXT %1(<vscale x 4 x s8>)999 $v8m2 = COPY %0(<vscale x 4 x s32>)1000 PseudoRET implicit $v8m21001...1002---1003name: sext_nxv4i64_nxv4i81004legalized: false1005tracksRegLiveness: true1006body: |1007 bb.0.entry:1008 liveins: $v81009 ; RV32-LABEL: name: sext_nxv4i64_nxv4i81010 ; RV32: liveins: $v81011 ; RV32-NEXT: {{ $}}1012 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v81013 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SEXT [[COPY]](<vscale x 4 x s8>)1014 ; RV32-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 4 x s64>)1015 ; RV32-NEXT: PseudoRET implicit $v8m41016 ;1017 ; RV64-LABEL: name: sext_nxv4i64_nxv4i81018 ; RV64: liveins: $v81019 ; RV64-NEXT: {{ $}}1020 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v81021 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SEXT [[COPY]](<vscale x 4 x s8>)1022 ; RV64-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 4 x s64>)1023 ; RV64-NEXT: PseudoRET implicit $v8m41024 %1:_(<vscale x 4 x s8>) = COPY $v81025 %0:_(<vscale x 4 x s64>) = G_SEXT %1(<vscale x 4 x s8>)1026 $v8m4 = COPY %0(<vscale x 4 x s64>)1027 PseudoRET implicit $v8m41028...1029---1030name: sext_nxv8i16_nxv8i81031legalized: false1032tracksRegLiveness: true1033body: |1034 bb.0.entry:1035 liveins: $v81036 ; RV32-LABEL: name: sext_nxv8i16_nxv8i81037 ; RV32: liveins: $v81038 ; RV32-NEXT: {{ $}}1039 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v81040 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SEXT [[COPY]](<vscale x 8 x s8>)1041 ; RV32-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 8 x s16>)1042 ; RV32-NEXT: PseudoRET implicit $v8m21043 ;1044 ; RV64-LABEL: name: sext_nxv8i16_nxv8i81045 ; RV64: liveins: $v81046 ; RV64-NEXT: {{ $}}1047 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v81048 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SEXT [[COPY]](<vscale x 8 x s8>)1049 ; RV64-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 8 x s16>)1050 ; RV64-NEXT: PseudoRET implicit $v8m21051 %1:_(<vscale x 8 x s8>) = COPY $v81052 %0:_(<vscale x 8 x s16>) = G_SEXT %1(<vscale x 8 x s8>)1053 $v8m2 = COPY %0(<vscale x 8 x s16>)1054 PseudoRET implicit $v8m21055...1056---1057name: sext_nxv8i32_nxv8i81058legalized: false1059tracksRegLiveness: true1060body: |1061 bb.0.entry:1062 liveins: $v81063 ; RV32-LABEL: name: sext_nxv8i32_nxv8i81064 ; RV32: liveins: $v81065 ; RV32-NEXT: {{ $}}1066 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v81067 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SEXT [[COPY]](<vscale x 8 x s8>)1068 ; RV32-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 8 x s32>)1069 ; RV32-NEXT: PseudoRET implicit $v8m41070 ;1071 ; RV64-LABEL: name: sext_nxv8i32_nxv8i81072 ; RV64: liveins: $v81073 ; RV64-NEXT: {{ $}}1074 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v81075 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SEXT [[COPY]](<vscale x 8 x s8>)1076 ; RV64-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 8 x s32>)1077 ; RV64-NEXT: PseudoRET implicit $v8m41078 %1:_(<vscale x 8 x s8>) = COPY $v81079 %0:_(<vscale x 8 x s32>) = G_SEXT %1(<vscale x 8 x s8>)1080 $v8m4 = COPY %0(<vscale x 8 x s32>)1081 PseudoRET implicit $v8m41082...1083---1084name: sext_nxv8i64_nxv8i81085legalized: false1086tracksRegLiveness: true1087body: |1088 bb.0.entry:1089 liveins: $v81090 ; RV32-LABEL: name: sext_nxv8i64_nxv8i81091 ; RV32: liveins: $v81092 ; RV32-NEXT: {{ $}}1093 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v81094 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SEXT [[COPY]](<vscale x 8 x s8>)1095 ; RV32-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 8 x s64>)1096 ; RV32-NEXT: PseudoRET implicit $v8m81097 ;1098 ; RV64-LABEL: name: sext_nxv8i64_nxv8i81099 ; RV64: liveins: $v81100 ; RV64-NEXT: {{ $}}1101 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v81102 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SEXT [[COPY]](<vscale x 8 x s8>)1103 ; RV64-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 8 x s64>)1104 ; RV64-NEXT: PseudoRET implicit $v8m81105 %1:_(<vscale x 8 x s8>) = COPY $v81106 %0:_(<vscale x 8 x s64>) = G_SEXT %1(<vscale x 8 x s8>)1107 $v8m8 = COPY %0(<vscale x 8 x s64>)1108 PseudoRET implicit $v8m81109...1110---1111name: sext_nxv16i16_nxv16i81112legalized: false1113tracksRegLiveness: true1114body: |1115 bb.0.entry:1116 liveins: $v81117 ; RV32-LABEL: name: sext_nxv16i16_nxv16i81118 ; RV32: liveins: $v81119 ; RV32-NEXT: {{ $}}1120 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8m21121 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SEXT [[COPY]](<vscale x 16 x s8>)1122 ; RV32-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 16 x s16>)1123 ; RV32-NEXT: PseudoRET implicit $v8m41124 ;1125 ; RV64-LABEL: name: sext_nxv16i16_nxv16i81126 ; RV64: liveins: $v81127 ; RV64-NEXT: {{ $}}1128 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8m21129 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SEXT [[COPY]](<vscale x 16 x s8>)1130 ; RV64-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 16 x s16>)1131 ; RV64-NEXT: PseudoRET implicit $v8m41132 %1:_(<vscale x 16 x s8>) = COPY $v8m21133 %0:_(<vscale x 16 x s16>) = G_SEXT %1(<vscale x 16 x s8>)1134 $v8m4 = COPY %0(<vscale x 16 x s16>)1135 PseudoRET implicit $v8m41136...1137---1138name: sext_nxv16i32_nxv16i81139legalized: false1140tracksRegLiveness: true1141body: |1142 bb.0.entry:1143 liveins: $v81144 ; RV32-LABEL: name: sext_nxv16i32_nxv16i81145 ; RV32: liveins: $v81146 ; RV32-NEXT: {{ $}}1147 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8m21148 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SEXT [[COPY]](<vscale x 16 x s8>)1149 ; RV32-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 16 x s32>)1150 ; RV32-NEXT: PseudoRET implicit $v8m81151 ;1152 ; RV64-LABEL: name: sext_nxv16i32_nxv16i81153 ; RV64: liveins: $v81154 ; RV64-NEXT: {{ $}}1155 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8m21156 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SEXT [[COPY]](<vscale x 16 x s8>)1157 ; RV64-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 16 x s32>)1158 ; RV64-NEXT: PseudoRET implicit $v8m81159 %1:_(<vscale x 16 x s8>) = COPY $v8m21160 %0:_(<vscale x 16 x s32>) = G_SEXT %1(<vscale x 16 x s8>)1161 $v8m8 = COPY %0(<vscale x 16 x s32>)1162 PseudoRET implicit $v8m81163...1164---1165name: sext_nxv32i16_nxv32i81166legalized: false1167tracksRegLiveness: true1168body: |1169 bb.0.entry:1170 liveins: $v81171 ; RV32-LABEL: name: sext_nxv32i16_nxv32i81172 ; RV32: liveins: $v81173 ; RV32-NEXT: {{ $}}1174 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 32 x s8>) = COPY $v8m41175 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 32 x s16>) = G_SEXT [[COPY]](<vscale x 32 x s8>)1176 ; RV32-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 32 x s16>)1177 ; RV32-NEXT: PseudoRET implicit $v8m81178 ;1179 ; RV64-LABEL: name: sext_nxv32i16_nxv32i81180 ; RV64: liveins: $v81181 ; RV64-NEXT: {{ $}}1182 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 32 x s8>) = COPY $v8m41183 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 32 x s16>) = G_SEXT [[COPY]](<vscale x 32 x s8>)1184 ; RV64-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 32 x s16>)1185 ; RV64-NEXT: PseudoRET implicit $v8m81186 %1:_(<vscale x 32 x s8>) = COPY $v8m41187 %0:_(<vscale x 32 x s16>) = G_SEXT %1(<vscale x 32 x s8>)1188 $v8m8 = COPY %0(<vscale x 32 x s16>)1189 PseudoRET implicit $v8m81190...1191 1192# Extend from s16 element vectors1193---1194name: sext_nxv1i32_nxv1i161195legalized: false1196tracksRegLiveness: true1197body: |1198 bb.0.entry:1199 liveins: $v81200 ; RV32-LABEL: name: sext_nxv1i32_nxv1i161201 ; RV32: liveins: $v81202 ; RV32-NEXT: {{ $}}1203 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s16>) = COPY $v81204 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SEXT [[COPY]](<vscale x 1 x s16>)1205 ; RV32-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s32>)1206 ; RV32-NEXT: PseudoRET implicit $v81207 ;1208 ; RV64-LABEL: name: sext_nxv1i32_nxv1i161209 ; RV64: liveins: $v81210 ; RV64-NEXT: {{ $}}1211 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s16>) = COPY $v81212 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SEXT [[COPY]](<vscale x 1 x s16>)1213 ; RV64-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s32>)1214 ; RV64-NEXT: PseudoRET implicit $v81215 %1:_(<vscale x 1 x s16>) = COPY $v81216 %0:_(<vscale x 1 x s32>) = G_SEXT %1(<vscale x 1 x s16>)1217 $v8 = COPY %0(<vscale x 1 x s32>)1218 PseudoRET implicit $v81219...1220---1221name: sext_nxv1i64_nxv1i161222legalized: false1223tracksRegLiveness: true1224body: |1225 bb.0.entry:1226 liveins: $v81227 ; RV32-LABEL: name: sext_nxv1i64_nxv1i161228 ; RV32: liveins: $v81229 ; RV32-NEXT: {{ $}}1230 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s16>) = COPY $v81231 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SEXT [[COPY]](<vscale x 1 x s16>)1232 ; RV32-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s64>)1233 ; RV32-NEXT: PseudoRET implicit $v81234 ;1235 ; RV64-LABEL: name: sext_nxv1i64_nxv1i161236 ; RV64: liveins: $v81237 ; RV64-NEXT: {{ $}}1238 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s16>) = COPY $v81239 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SEXT [[COPY]](<vscale x 1 x s16>)1240 ; RV64-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s64>)1241 ; RV64-NEXT: PseudoRET implicit $v81242 %1:_(<vscale x 1 x s16>) = COPY $v81243 %0:_(<vscale x 1 x s64>) = G_SEXT %1(<vscale x 1 x s16>)1244 $v8 = COPY %0(<vscale x 1 x s64>)1245 PseudoRET implicit $v81246...1247---1248name: sext_nxv2i32_nxv2i161249legalized: false1250tracksRegLiveness: true1251body: |1252 bb.0.entry:1253 liveins: $v81254 ; RV32-LABEL: name: sext_nxv2i32_nxv2i161255 ; RV32: liveins: $v81256 ; RV32-NEXT: {{ $}}1257 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s16>) = COPY $v81258 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SEXT [[COPY]](<vscale x 2 x s16>)1259 ; RV32-NEXT: $v8 = COPY [[SEXT]](<vscale x 2 x s32>)1260 ; RV32-NEXT: PseudoRET implicit $v81261 ;1262 ; RV64-LABEL: name: sext_nxv2i32_nxv2i161263 ; RV64: liveins: $v81264 ; RV64-NEXT: {{ $}}1265 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s16>) = COPY $v81266 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SEXT [[COPY]](<vscale x 2 x s16>)1267 ; RV64-NEXT: $v8 = COPY [[SEXT]](<vscale x 2 x s32>)1268 ; RV64-NEXT: PseudoRET implicit $v81269 %1:_(<vscale x 2 x s16>) = COPY $v81270 %0:_(<vscale x 2 x s32>) = G_SEXT %1(<vscale x 2 x s16>)1271 $v8 = COPY %0(<vscale x 2 x s32>)1272 PseudoRET implicit $v81273...1274---1275name: sext_nxv2i64_nxv2i161276legalized: false1277tracksRegLiveness: true1278body: |1279 bb.0.entry:1280 liveins: $v81281 ; RV32-LABEL: name: sext_nxv2i64_nxv2i161282 ; RV32: liveins: $v81283 ; RV32-NEXT: {{ $}}1284 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s16>) = COPY $v81285 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SEXT [[COPY]](<vscale x 2 x s16>)1286 ; RV32-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 2 x s64>)1287 ; RV32-NEXT: PseudoRET implicit $v8m21288 ;1289 ; RV64-LABEL: name: sext_nxv2i64_nxv2i161290 ; RV64: liveins: $v81291 ; RV64-NEXT: {{ $}}1292 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s16>) = COPY $v81293 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SEXT [[COPY]](<vscale x 2 x s16>)1294 ; RV64-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 2 x s64>)1295 ; RV64-NEXT: PseudoRET implicit $v8m21296 %1:_(<vscale x 2 x s16>) = COPY $v81297 %0:_(<vscale x 2 x s64>) = G_SEXT %1(<vscale x 2 x s16>)1298 $v8m2 = COPY %0(<vscale x 2 x s64>)1299 PseudoRET implicit $v8m21300...1301---1302name: sext_nxv4i32_nxv4i161303legalized: false1304tracksRegLiveness: true1305body: |1306 bb.0.entry:1307 liveins: $v81308 ; RV32-LABEL: name: sext_nxv4i32_nxv4i161309 ; RV32: liveins: $v81310 ; RV32-NEXT: {{ $}}1311 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v81312 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SEXT [[COPY]](<vscale x 4 x s16>)1313 ; RV32-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 4 x s32>)1314 ; RV32-NEXT: PseudoRET implicit $v8m21315 ;1316 ; RV64-LABEL: name: sext_nxv4i32_nxv4i161317 ; RV64: liveins: $v81318 ; RV64-NEXT: {{ $}}1319 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v81320 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SEXT [[COPY]](<vscale x 4 x s16>)1321 ; RV64-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 4 x s32>)1322 ; RV64-NEXT: PseudoRET implicit $v8m21323 %1:_(<vscale x 4 x s16>) = COPY $v81324 %0:_(<vscale x 4 x s32>) = G_SEXT %1(<vscale x 4 x s16>)1325 $v8m2 = COPY %0(<vscale x 4 x s32>)1326 PseudoRET implicit $v8m21327...1328---1329name: sext_nxv4i64_nxv4i161330legalized: false1331tracksRegLiveness: true1332body: |1333 bb.0.entry:1334 liveins: $v81335 ; RV32-LABEL: name: sext_nxv4i64_nxv4i161336 ; RV32: liveins: $v81337 ; RV32-NEXT: {{ $}}1338 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v81339 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SEXT [[COPY]](<vscale x 4 x s16>)1340 ; RV32-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 4 x s64>)1341 ; RV32-NEXT: PseudoRET implicit $v8m41342 ;1343 ; RV64-LABEL: name: sext_nxv4i64_nxv4i161344 ; RV64: liveins: $v81345 ; RV64-NEXT: {{ $}}1346 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v81347 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SEXT [[COPY]](<vscale x 4 x s16>)1348 ; RV64-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 4 x s64>)1349 ; RV64-NEXT: PseudoRET implicit $v8m41350 %1:_(<vscale x 4 x s16>) = COPY $v81351 %0:_(<vscale x 4 x s64>) = G_SEXT %1(<vscale x 4 x s16>)1352 $v8m4 = COPY %0(<vscale x 4 x s64>)1353 PseudoRET implicit $v8m41354...1355---1356name: sext_nxv8i32_nxv8i161357legalized: false1358tracksRegLiveness: true1359body: |1360 bb.0.entry:1361 liveins: $v81362 ; RV32-LABEL: name: sext_nxv8i32_nxv8i161363 ; RV32: liveins: $v81364 ; RV32-NEXT: {{ $}}1365 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $v8m21366 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SEXT [[COPY]](<vscale x 8 x s16>)1367 ; RV32-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 8 x s32>)1368 ; RV32-NEXT: PseudoRET implicit $v8m41369 ;1370 ; RV64-LABEL: name: sext_nxv8i32_nxv8i161371 ; RV64: liveins: $v81372 ; RV64-NEXT: {{ $}}1373 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $v8m21374 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SEXT [[COPY]](<vscale x 8 x s16>)1375 ; RV64-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 8 x s32>)1376 ; RV64-NEXT: PseudoRET implicit $v8m41377 %1:_(<vscale x 8 x s16>) = COPY $v8m21378 %0:_(<vscale x 8 x s32>) = G_SEXT %1(<vscale x 8 x s16>)1379 $v8m4 = COPY %0(<vscale x 8 x s32>)1380 PseudoRET implicit $v8m41381...1382---1383name: sext_nxv8i64_nxv8i161384legalized: false1385tracksRegLiveness: true1386body: |1387 bb.0.entry:1388 liveins: $v81389 ; RV32-LABEL: name: sext_nxv8i64_nxv8i161390 ; RV32: liveins: $v81391 ; RV32-NEXT: {{ $}}1392 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $v8m21393 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SEXT [[COPY]](<vscale x 8 x s16>)1394 ; RV32-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 8 x s64>)1395 ; RV32-NEXT: PseudoRET implicit $v8m81396 ;1397 ; RV64-LABEL: name: sext_nxv8i64_nxv8i161398 ; RV64: liveins: $v81399 ; RV64-NEXT: {{ $}}1400 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $v8m21401 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SEXT [[COPY]](<vscale x 8 x s16>)1402 ; RV64-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 8 x s64>)1403 ; RV64-NEXT: PseudoRET implicit $v8m81404 %1:_(<vscale x 8 x s16>) = COPY $v8m21405 %0:_(<vscale x 8 x s64>) = G_SEXT %1(<vscale x 8 x s16>)1406 $v8m8 = COPY %0(<vscale x 8 x s64>)1407 PseudoRET implicit $v8m81408...1409---1410name: sext_nxv16i32_nxv16i161411legalized: false1412tracksRegLiveness: true1413body: |1414 bb.0.entry:1415 liveins: $v81416 ; RV32-LABEL: name: sext_nxv16i32_nxv16i161417 ; RV32: liveins: $v81418 ; RV32-NEXT: {{ $}}1419 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s16>) = COPY $v8m41420 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SEXT [[COPY]](<vscale x 16 x s16>)1421 ; RV32-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 16 x s32>)1422 ; RV32-NEXT: PseudoRET implicit $v8m81423 ;1424 ; RV64-LABEL: name: sext_nxv16i32_nxv16i161425 ; RV64: liveins: $v81426 ; RV64-NEXT: {{ $}}1427 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s16>) = COPY $v8m41428 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SEXT [[COPY]](<vscale x 16 x s16>)1429 ; RV64-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 16 x s32>)1430 ; RV64-NEXT: PseudoRET implicit $v8m81431 %1:_(<vscale x 16 x s16>) = COPY $v8m41432 %0:_(<vscale x 16 x s32>) = G_SEXT %1(<vscale x 16 x s16>)1433 $v8m8 = COPY %0(<vscale x 16 x s32>)1434 PseudoRET implicit $v8m81435...1436 1437# Extend from s32 element vectors1438---1439name: sext_nxv1i64_nxv1i321440legalized: false1441tracksRegLiveness: true1442body: |1443 bb.0.entry:1444 liveins: $v81445 ; RV32-LABEL: name: sext_nxv1i64_nxv1i321446 ; RV32: liveins: $v81447 ; RV32-NEXT: {{ $}}1448 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s32>) = COPY $v81449 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SEXT [[COPY]](<vscale x 1 x s32>)1450 ; RV32-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s64>)1451 ; RV32-NEXT: PseudoRET implicit $v81452 ;1453 ; RV64-LABEL: name: sext_nxv1i64_nxv1i321454 ; RV64: liveins: $v81455 ; RV64-NEXT: {{ $}}1456 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s32>) = COPY $v81457 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 1 x s64>) = G_SEXT [[COPY]](<vscale x 1 x s32>)1458 ; RV64-NEXT: $v8 = COPY [[SEXT]](<vscale x 1 x s64>)1459 ; RV64-NEXT: PseudoRET implicit $v81460 %1:_(<vscale x 1 x s32>) = COPY $v81461 %0:_(<vscale x 1 x s64>) = G_SEXT %1(<vscale x 1 x s32>)1462 $v8 = COPY %0(<vscale x 1 x s64>)1463 PseudoRET implicit $v81464...1465---1466name: sext_nxv2i64_nxv2i321467legalized: false1468tracksRegLiveness: true1469body: |1470 bb.0.entry:1471 liveins: $v81472 ; RV32-LABEL: name: sext_nxv2i64_nxv2i321473 ; RV32: liveins: $v81474 ; RV32-NEXT: {{ $}}1475 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s32>) = COPY $v81476 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SEXT [[COPY]](<vscale x 2 x s32>)1477 ; RV32-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 2 x s64>)1478 ; RV32-NEXT: PseudoRET implicit $v8m21479 ;1480 ; RV64-LABEL: name: sext_nxv2i64_nxv2i321481 ; RV64: liveins: $v81482 ; RV64-NEXT: {{ $}}1483 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 2 x s32>) = COPY $v81484 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 2 x s64>) = G_SEXT [[COPY]](<vscale x 2 x s32>)1485 ; RV64-NEXT: $v8m2 = COPY [[SEXT]](<vscale x 2 x s64>)1486 ; RV64-NEXT: PseudoRET implicit $v8m21487 %1:_(<vscale x 2 x s32>) = COPY $v81488 %0:_(<vscale x 2 x s64>) = G_SEXT %1(<vscale x 2 x s32>)1489 $v8m2 = COPY %0(<vscale x 2 x s64>)1490 PseudoRET implicit $v8m21491...1492---1493name: sext_nxv4i64_nxv4i321494legalized: false1495tracksRegLiveness: true1496body: |1497 bb.0.entry:1498 liveins: $v81499 ; RV32-LABEL: name: sext_nxv4i64_nxv4i321500 ; RV32: liveins: $v81501 ; RV32-NEXT: {{ $}}1502 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $v8m21503 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SEXT [[COPY]](<vscale x 4 x s32>)1504 ; RV32-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 4 x s64>)1505 ; RV32-NEXT: PseudoRET implicit $v8m41506 ;1507 ; RV64-LABEL: name: sext_nxv4i64_nxv4i321508 ; RV64: liveins: $v81509 ; RV64-NEXT: {{ $}}1510 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $v8m21511 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 4 x s64>) = G_SEXT [[COPY]](<vscale x 4 x s32>)1512 ; RV64-NEXT: $v8m4 = COPY [[SEXT]](<vscale x 4 x s64>)1513 ; RV64-NEXT: PseudoRET implicit $v8m41514 %1:_(<vscale x 4 x s32>) = COPY $v8m21515 %0:_(<vscale x 4 x s64>) = G_SEXT %1(<vscale x 4 x s32>)1516 $v8m4 = COPY %0(<vscale x 4 x s64>)1517 PseudoRET implicit $v8m41518...1519---1520name: sext_nxv8i64_nxv8i321521legalized: false1522tracksRegLiveness: true1523body: |1524 bb.0.entry:1525 liveins: $v81526 ; RV32-LABEL: name: sext_nxv8i64_nxv8i321527 ; RV32: liveins: $v81528 ; RV32-NEXT: {{ $}}1529 ; RV32-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s32>) = COPY $v8m41530 ; RV32-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SEXT [[COPY]](<vscale x 8 x s32>)1531 ; RV32-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 8 x s64>)1532 ; RV32-NEXT: PseudoRET implicit $v8m81533 ;1534 ; RV64-LABEL: name: sext_nxv8i64_nxv8i321535 ; RV64: liveins: $v81536 ; RV64-NEXT: {{ $}}1537 ; RV64-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 8 x s32>) = COPY $v8m41538 ; RV64-NEXT: [[SEXT:%[0-9]+]]:_(<vscale x 8 x s64>) = G_SEXT [[COPY]](<vscale x 8 x s32>)1539 ; RV64-NEXT: $v8m8 = COPY [[SEXT]](<vscale x 8 x s64>)1540 ; RV64-NEXT: PseudoRET implicit $v8m81541 %1:_(<vscale x 8 x s32>) = COPY $v8m41542 %0:_(<vscale x 8 x s64>) = G_SEXT %1(<vscale x 8 x s32>)1543 $v8m8 = COPY %0(<vscale x 8 x s64>)1544 PseudoRET implicit $v8m81545...1546