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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+v -run-pass=legalizer %s -o - | FileCheck %s3 4---5name: splatvector_nxv1i1_06legalized: false7tracksRegLiveness: true8body: |9 bb.1:10 ; CHECK-LABEL: name: splatvector_nxv1i1_011 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -112 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 1 x s1>) = G_VMSET_VL [[C]](s32)13 ; CHECK-NEXT: [[VMCLR_VL:%[0-9]+]]:_(<vscale x 1 x s1>) = G_VMCLR_VL [[C]](s32)14 ; CHECK-NEXT: $v0 = COPY [[VMCLR_VL]](<vscale x 1 x s1>)15 ; CHECK-NEXT: PseudoRET implicit $v016 %0:_(s1) = G_CONSTANT i1 017 %1:_(<vscale x 1 x s1>) = G_SPLAT_VECTOR %0(s1)18 $v0 = COPY %1(<vscale x 1 x s1>)19 PseudoRET implicit $v020 21...22---23name: splatvector_nxv1i1_124legalized: false25tracksRegLiveness: true26body: |27 bb.1:28 ; CHECK-LABEL: name: splatvector_nxv1i1_129 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -130 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 1 x s1>) = G_VMSET_VL [[C]](s32)31 ; CHECK-NEXT: [[VMSET_VL1:%[0-9]+]]:_(<vscale x 1 x s1>) = G_VMSET_VL [[C]](s32)32 ; CHECK-NEXT: $v0 = COPY [[VMSET_VL1]](<vscale x 1 x s1>)33 ; CHECK-NEXT: PseudoRET implicit $v034 %0:_(s1) = G_CONSTANT i1 135 %1:_(<vscale x 1 x s1>) = G_SPLAT_VECTOR %0(s1)36 $v0 = COPY %1(<vscale x 1 x s1>)37 PseudoRET implicit $v038 39...40---41name: splatvector_nxv1i1_242legalized: false43tracksRegLiveness: true44body: |45 bb.1:46 liveins: $x1047 48 ; CHECK-LABEL: name: splatvector_nxv1i1_249 ; CHECK: liveins: $x1050 ; CHECK-NEXT: {{ $}}51 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x1052 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 153 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]54 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[AND]], [[C]]55 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[AND1]](s32)56 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 057 ; CHECK-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[C1]](s32)58 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 1 x s1>) = G_ICMP intpred(ne), [[SPLAT_VECTOR]](<vscale x 1 x s8>), [[SPLAT_VECTOR1]]59 ; CHECK-NEXT: $v0 = COPY [[ICMP]](<vscale x 1 x s1>)60 ; CHECK-NEXT: PseudoRET implicit $v061 %0:_(s32) = COPY $x1062 %1:_(s1) = G_TRUNC %0(s32)63 %2:_(<vscale x 1 x s1>) = G_SPLAT_VECTOR %1(s1)64 $v0 = COPY %2(<vscale x 1 x s1>)65 PseudoRET implicit $v066...67---68name: splatvector_nxv2i1_069legalized: false70tracksRegLiveness: true71body: |72 bb.1:73 ; CHECK-LABEL: name: splatvector_nxv2i1_074 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -175 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 2 x s1>) = G_VMSET_VL [[C]](s32)76 ; CHECK-NEXT: [[VMCLR_VL:%[0-9]+]]:_(<vscale x 2 x s1>) = G_VMCLR_VL [[C]](s32)77 ; CHECK-NEXT: $v0 = COPY [[VMCLR_VL]](<vscale x 2 x s1>)78 ; CHECK-NEXT: PseudoRET implicit $v079 %0:_(s1) = G_CONSTANT i1 080 %1:_(<vscale x 2 x s1>) = G_SPLAT_VECTOR %0(s1)81 $v0 = COPY %1(<vscale x 2 x s1>)82 PseudoRET implicit $v083 84...85---86name: splatvector_nxv2i1_187legalized: false88tracksRegLiveness: true89body: |90 bb.1:91 ; CHECK-LABEL: name: splatvector_nxv2i1_192 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -193 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 2 x s1>) = G_VMSET_VL [[C]](s32)94 ; CHECK-NEXT: [[VMSET_VL1:%[0-9]+]]:_(<vscale x 2 x s1>) = G_VMSET_VL [[C]](s32)95 ; CHECK-NEXT: $v0 = COPY [[VMSET_VL1]](<vscale x 2 x s1>)96 ; CHECK-NEXT: PseudoRET implicit $v097 %0:_(s1) = G_CONSTANT i1 198 %1:_(<vscale x 2 x s1>) = G_SPLAT_VECTOR %0(s1)99 $v0 = COPY %1(<vscale x 2 x s1>)100 PseudoRET implicit $v0101 102...103---104name: splatvector_nxv2i1_2105legalized: false106tracksRegLiveness: true107body: |108 bb.1:109 liveins: $x10110 111 ; CHECK-LABEL: name: splatvector_nxv2i1_2112 ; CHECK: liveins: $x10113 ; CHECK-NEXT: {{ $}}114 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10115 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1116 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]117 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[AND]], [[C]]118 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[AND1]](s32)119 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0120 ; CHECK-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[C1]](s32)121 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 2 x s1>) = G_ICMP intpred(ne), [[SPLAT_VECTOR]](<vscale x 2 x s8>), [[SPLAT_VECTOR1]]122 ; CHECK-NEXT: $v0 = COPY [[ICMP]](<vscale x 2 x s1>)123 ; CHECK-NEXT: PseudoRET implicit $v0124 %0:_(s32) = COPY $x10125 %1:_(s1) = G_TRUNC %0(s32)126 %2:_(<vscale x 2 x s1>) = G_SPLAT_VECTOR %1(s1)127 $v0 = COPY %2(<vscale x 2 x s1>)128 PseudoRET implicit $v0129...130---131name: splatvector_nxv4i1_0132legalized: false133tracksRegLiveness: true134body: |135 bb.1:136 ; CHECK-LABEL: name: splatvector_nxv4i1_0137 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1138 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 4 x s1>) = G_VMSET_VL [[C]](s32)139 ; CHECK-NEXT: [[VMCLR_VL:%[0-9]+]]:_(<vscale x 4 x s1>) = G_VMCLR_VL [[C]](s32)140 ; CHECK-NEXT: $v0 = COPY [[VMCLR_VL]](<vscale x 4 x s1>)141 ; CHECK-NEXT: PseudoRET implicit $v0142 %0:_(s1) = G_CONSTANT i1 0143 %1:_(<vscale x 4 x s1>) = G_SPLAT_VECTOR %0(s1)144 $v0 = COPY %1(<vscale x 4 x s1>)145 PseudoRET implicit $v0146 147...148---149name: splatvector_nxv4i1_1150legalized: false151tracksRegLiveness: true152body: |153 bb.1:154 ; CHECK-LABEL: name: splatvector_nxv4i1_1155 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1156 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 4 x s1>) = G_VMSET_VL [[C]](s32)157 ; CHECK-NEXT: [[VMSET_VL1:%[0-9]+]]:_(<vscale x 4 x s1>) = G_VMSET_VL [[C]](s32)158 ; CHECK-NEXT: $v0 = COPY [[VMSET_VL1]](<vscale x 4 x s1>)159 ; CHECK-NEXT: PseudoRET implicit $v0160 %0:_(s1) = G_CONSTANT i1 1161 %1:_(<vscale x 4 x s1>) = G_SPLAT_VECTOR %0(s1)162 $v0 = COPY %1(<vscale x 4 x s1>)163 PseudoRET implicit $v0164 165...166---167name: splatvector_nxv4i1_2168legalized: false169tracksRegLiveness: true170body: |171 bb.1:172 liveins: $x10173 174 ; CHECK-LABEL: name: splatvector_nxv4i1_2175 ; CHECK: liveins: $x10176 ; CHECK-NEXT: {{ $}}177 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10178 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1179 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]180 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[AND]], [[C]]181 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[AND1]](s32)182 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0183 ; CHECK-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[C1]](s32)184 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 4 x s1>) = G_ICMP intpred(ne), [[SPLAT_VECTOR]](<vscale x 4 x s8>), [[SPLAT_VECTOR1]]185 ; CHECK-NEXT: $v0 = COPY [[ICMP]](<vscale x 4 x s1>)186 ; CHECK-NEXT: PseudoRET implicit $v0187 %0:_(s32) = COPY $x10188 %1:_(s1) = G_TRUNC %0(s32)189 %2:_(<vscale x 4 x s1>) = G_SPLAT_VECTOR %1(s1)190 $v0 = COPY %2(<vscale x 4 x s1>)191 PseudoRET implicit $v0192...193---194name: splatvector_nxv8i1_0195legalized: false196tracksRegLiveness: true197body: |198 bb.1:199 ; CHECK-LABEL: name: splatvector_nxv8i1_0200 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1201 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 8 x s1>) = G_VMSET_VL [[C]](s32)202 ; CHECK-NEXT: [[VMCLR_VL:%[0-9]+]]:_(<vscale x 8 x s1>) = G_VMCLR_VL [[C]](s32)203 ; CHECK-NEXT: $v0 = COPY [[VMCLR_VL]](<vscale x 8 x s1>)204 ; CHECK-NEXT: PseudoRET implicit $v0205 %0:_(s1) = G_CONSTANT i1 0206 %1:_(<vscale x 8 x s1>) = G_SPLAT_VECTOR %0(s1)207 $v0 = COPY %1(<vscale x 8 x s1>)208 PseudoRET implicit $v0209 210...211---212name: splatvector_nxv8i1_1213legalized: false214tracksRegLiveness: true215body: |216 bb.1:217 ; CHECK-LABEL: name: splatvector_nxv8i1_1218 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1219 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 8 x s1>) = G_VMSET_VL [[C]](s32)220 ; CHECK-NEXT: [[VMSET_VL1:%[0-9]+]]:_(<vscale x 8 x s1>) = G_VMSET_VL [[C]](s32)221 ; CHECK-NEXT: $v0 = COPY [[VMSET_VL1]](<vscale x 8 x s1>)222 ; CHECK-NEXT: PseudoRET implicit $v0223 %0:_(s1) = G_CONSTANT i1 1224 %1:_(<vscale x 8 x s1>) = G_SPLAT_VECTOR %0(s1)225 $v0 = COPY %1(<vscale x 8 x s1>)226 PseudoRET implicit $v0227 228...229---230name: splatvector_nxv8i1_2231legalized: false232tracksRegLiveness: true233body: |234 bb.1:235 liveins: $x10236 237 ; CHECK-LABEL: name: splatvector_nxv8i1_2238 ; CHECK: liveins: $x10239 ; CHECK-NEXT: {{ $}}240 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10241 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1242 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]243 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[AND]], [[C]]244 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[AND1]](s32)245 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0246 ; CHECK-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[C1]](s32)247 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 8 x s1>) = G_ICMP intpred(ne), [[SPLAT_VECTOR]](<vscale x 8 x s8>), [[SPLAT_VECTOR1]]248 ; CHECK-NEXT: $v0 = COPY [[ICMP]](<vscale x 8 x s1>)249 ; CHECK-NEXT: PseudoRET implicit $v0250 %0:_(s32) = COPY $x10251 %1:_(s1) = G_TRUNC %0(s32)252 %2:_(<vscale x 8 x s1>) = G_SPLAT_VECTOR %1(s1)253 $v0 = COPY %2(<vscale x 8 x s1>)254 PseudoRET implicit $v0255...256---257name: splatvector_nxv16i1_0258legalized: false259tracksRegLiveness: true260body: |261 bb.1:262 ; CHECK-LABEL: name: splatvector_nxv16i1_0263 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1264 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 16 x s1>) = G_VMSET_VL [[C]](s32)265 ; CHECK-NEXT: [[VMCLR_VL:%[0-9]+]]:_(<vscale x 16 x s1>) = G_VMCLR_VL [[C]](s32)266 ; CHECK-NEXT: $v0 = COPY [[VMCLR_VL]](<vscale x 16 x s1>)267 ; CHECK-NEXT: PseudoRET implicit $v0268 %0:_(s1) = G_CONSTANT i1 0269 %1:_(<vscale x 16 x s1>) = G_SPLAT_VECTOR %0(s1)270 $v0 = COPY %1(<vscale x 16 x s1>)271 PseudoRET implicit $v0272 273...274---275name: splatvector_nxv16i1_1276legalized: false277tracksRegLiveness: true278body: |279 bb.1:280 ; CHECK-LABEL: name: splatvector_nxv16i1_1281 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1282 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 16 x s1>) = G_VMSET_VL [[C]](s32)283 ; CHECK-NEXT: [[VMSET_VL1:%[0-9]+]]:_(<vscale x 16 x s1>) = G_VMSET_VL [[C]](s32)284 ; CHECK-NEXT: $v0 = COPY [[VMSET_VL1]](<vscale x 16 x s1>)285 ; CHECK-NEXT: PseudoRET implicit $v0286 %0:_(s1) = G_CONSTANT i1 1287 %1:_(<vscale x 16 x s1>) = G_SPLAT_VECTOR %0(s1)288 $v0 = COPY %1(<vscale x 16 x s1>)289 PseudoRET implicit $v0290 291...292---293name: splatvector_nxv16i1_2294legalized: false295tracksRegLiveness: true296body: |297 bb.1:298 liveins: $x10299 300 ; CHECK-LABEL: name: splatvector_nxv16i1_2301 ; CHECK: liveins: $x10302 ; CHECK-NEXT: {{ $}}303 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10304 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1305 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]306 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[AND]], [[C]]307 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[AND1]](s32)308 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0309 ; CHECK-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[C1]](s32)310 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 16 x s1>) = G_ICMP intpred(ne), [[SPLAT_VECTOR]](<vscale x 16 x s8>), [[SPLAT_VECTOR1]]311 ; CHECK-NEXT: $v0 = COPY [[ICMP]](<vscale x 16 x s1>)312 ; CHECK-NEXT: PseudoRET implicit $v0313 %0:_(s32) = COPY $x10314 %1:_(s1) = G_TRUNC %0(s32)315 %2:_(<vscale x 16 x s1>) = G_SPLAT_VECTOR %1(s1)316 $v0 = COPY %2(<vscale x 16 x s1>)317 PseudoRET implicit $v0318...319---320name: splatvector_nxv32i1_0321legalized: false322tracksRegLiveness: true323body: |324 bb.1:325 ; CHECK-LABEL: name: splatvector_nxv32i1_0326 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1327 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 32 x s1>) = G_VMSET_VL [[C]](s32)328 ; CHECK-NEXT: [[VMCLR_VL:%[0-9]+]]:_(<vscale x 32 x s1>) = G_VMCLR_VL [[C]](s32)329 ; CHECK-NEXT: $v0 = COPY [[VMCLR_VL]](<vscale x 32 x s1>)330 ; CHECK-NEXT: PseudoRET implicit $v0331 %0:_(s1) = G_CONSTANT i1 0332 %1:_(<vscale x 32 x s1>) = G_SPLAT_VECTOR %0(s1)333 $v0 = COPY %1(<vscale x 32 x s1>)334 PseudoRET implicit $v0335 336...337---338name: splatvector_nxv32i1_1339legalized: false340tracksRegLiveness: true341body: |342 bb.1:343 ; CHECK-LABEL: name: splatvector_nxv32i1_1344 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1345 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 32 x s1>) = G_VMSET_VL [[C]](s32)346 ; CHECK-NEXT: [[VMSET_VL1:%[0-9]+]]:_(<vscale x 32 x s1>) = G_VMSET_VL [[C]](s32)347 ; CHECK-NEXT: $v0 = COPY [[VMSET_VL1]](<vscale x 32 x s1>)348 ; CHECK-NEXT: PseudoRET implicit $v0349 %0:_(s1) = G_CONSTANT i1 1350 %1:_(<vscale x 32 x s1>) = G_SPLAT_VECTOR %0(s1)351 $v0 = COPY %1(<vscale x 32 x s1>)352 PseudoRET implicit $v0353 354...355---356name: splatvector_nxv32i1_2357legalized: false358tracksRegLiveness: true359body: |360 bb.1:361 liveins: $x10362 363 ; CHECK-LABEL: name: splatvector_nxv32i1_2364 ; CHECK: liveins: $x10365 ; CHECK-NEXT: {{ $}}366 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10367 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1368 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]369 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[AND]], [[C]]370 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[AND1]](s32)371 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0372 ; CHECK-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[C1]](s32)373 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 32 x s1>) = G_ICMP intpred(ne), [[SPLAT_VECTOR]](<vscale x 32 x s8>), [[SPLAT_VECTOR1]]374 ; CHECK-NEXT: $v0 = COPY [[ICMP]](<vscale x 32 x s1>)375 ; CHECK-NEXT: PseudoRET implicit $v0376 %0:_(s32) = COPY $x10377 %1:_(s1) = G_TRUNC %0(s32)378 %2:_(<vscale x 32 x s1>) = G_SPLAT_VECTOR %1(s1)379 $v0 = COPY %2(<vscale x 32 x s1>)380 PseudoRET implicit $v0381...382---383name: splatvector_nxv64i1_0384legalized: false385tracksRegLiveness: true386body: |387 bb.1:388 ; CHECK-LABEL: name: splatvector_nxv64i1_0389 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1390 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 64 x s1>) = G_VMSET_VL [[C]](s32)391 ; CHECK-NEXT: [[VMCLR_VL:%[0-9]+]]:_(<vscale x 64 x s1>) = G_VMCLR_VL [[C]](s32)392 ; CHECK-NEXT: $v0 = COPY [[VMCLR_VL]](<vscale x 64 x s1>)393 ; CHECK-NEXT: PseudoRET implicit $v0394 %0:_(s1) = G_CONSTANT i1 0395 %1:_(<vscale x 64 x s1>) = G_SPLAT_VECTOR %0(s1)396 $v0 = COPY %1(<vscale x 64 x s1>)397 PseudoRET implicit $v0398 399...400---401name: splatvector_nxv64i1_1402legalized: false403tracksRegLiveness: true404body: |405 bb.1:406 ; CHECK-LABEL: name: splatvector_nxv64i1_1407 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1408 ; CHECK-NEXT: [[VMSET_VL:%[0-9]+]]:_(<vscale x 64 x s1>) = G_VMSET_VL [[C]](s32)409 ; CHECK-NEXT: [[VMSET_VL1:%[0-9]+]]:_(<vscale x 64 x s1>) = G_VMSET_VL [[C]](s32)410 ; CHECK-NEXT: $v0 = COPY [[VMSET_VL1]](<vscale x 64 x s1>)411 ; CHECK-NEXT: PseudoRET implicit $v0412 %0:_(s1) = G_CONSTANT i1 1413 %1:_(<vscale x 64 x s1>) = G_SPLAT_VECTOR %0(s1)414 $v0 = COPY %1(<vscale x 64 x s1>)415 PseudoRET implicit $v0416 417...418---419name: splatvector_nxv64i1_2420legalized: false421tracksRegLiveness: true422body: |423 bb.1:424 liveins: $x10425 426 ; CHECK-LABEL: name: splatvector_nxv64i1_2427 ; CHECK: liveins: $x10428 ; CHECK-NEXT: {{ $}}429 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10430 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1431 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]432 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[AND]], [[C]]433 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[AND1]](s32)434 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0435 ; CHECK-NEXT: [[SPLAT_VECTOR1:%[0-9]+]]:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[C1]](s32)436 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<vscale x 64 x s1>) = G_ICMP intpred(ne), [[SPLAT_VECTOR]](<vscale x 64 x s8>), [[SPLAT_VECTOR1]]437 ; CHECK-NEXT: $v0 = COPY [[ICMP]](<vscale x 64 x s1>)438 ; CHECK-NEXT: PseudoRET implicit $v0439 %0:_(s32) = COPY $x10440 %1:_(s1) = G_TRUNC %0(s32)441 %2:_(<vscale x 64 x s1>) = G_SPLAT_VECTOR %1(s1)442 $v0 = COPY %2(<vscale x 64 x s1>)443 PseudoRET implicit $v0444...445 446---447name: splatvector_nxv1i8448legalized: false449tracksRegLiveness: true450body: |451 bb.1:452 ; CHECK-LABEL: name: splatvector_nxv1i8453 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0454 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[C]](s32)455 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s8>)456 ; CHECK-NEXT: PseudoRET implicit $v8457 %1:_(s8) = G_CONSTANT i8 0458 %2:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR %1(s8)459 $v8 = COPY %2(<vscale x 1 x s8>)460 PseudoRET implicit $v8461 462...463 464---465name: splatvector_nxv2i8466legalized: false467tracksRegLiveness: true468body: |469 bb.1:470 ; CHECK-LABEL: name: splatvector_nxv2i8471 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0472 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[C]](s32)473 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s8>)474 ; CHECK-NEXT: PseudoRET implicit $v8475 %1:_(s8) = G_CONSTANT i8 0476 %2:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR %1(s8)477 $v8 = COPY %2(<vscale x 2 x s8>)478 PseudoRET implicit $v8479 480...481---482name: splatvector_nxv4i8483legalized: false484tracksRegLiveness: true485body: |486 bb.1:487 ; CHECK-LABEL: name: splatvector_nxv4i8488 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0489 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[C]](s32)490 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s8>)491 ; CHECK-NEXT: PseudoRET implicit $v8492 %1:_(s8) = G_CONSTANT i8 0493 %2:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR %1(s8)494 $v8 = COPY %2(<vscale x 4 x s8>)495 PseudoRET implicit $v8496 497...498---499name: splatvector_nxv8i8500legalized: false501tracksRegLiveness: true502body: |503 bb.1:504 ; CHECK-LABEL: name: splatvector_nxv8i8505 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0506 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[C]](s32)507 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s8>)508 ; CHECK-NEXT: PseudoRET implicit $v8509 %1:_(s8) = G_CONSTANT i8 0510 %2:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR %1(s8)511 $v8 = COPY %2(<vscale x 8 x s8>)512 PseudoRET implicit $v8513 514...515---516name: splatvector_nxv16i8517legalized: false518tracksRegLiveness: true519body: |520 bb.1:521 ; CHECK-LABEL: name: splatvector_nxv16i8522 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0523 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[C]](s32)524 ; CHECK-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s8>)525 ; CHECK-NEXT: PseudoRET implicit $v8m2526 %1:_(s8) = G_CONSTANT i8 0527 %2:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %1(s8)528 $v8m2 = COPY %2(<vscale x 16 x s8>)529 PseudoRET implicit $v8m2530 531...532---533name: splatvector_nxv1i16534legalized: false535tracksRegLiveness: true536body: |537 bb.1:538 ; CHECK-LABEL: name: splatvector_nxv1i16539 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0540 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[C]](s32)541 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s16>)542 ; CHECK-NEXT: PseudoRET implicit $v8543 %1:_(s16) = G_CONSTANT i16 0544 %2:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR %1(s16)545 $v8 = COPY %2(<vscale x 1 x s16>)546 PseudoRET implicit $v8547 548...549---550name: splatvector_nxv2i16551legalized: false552tracksRegLiveness: true553body: |554 bb.1:555 ; CHECK-LABEL: name: splatvector_nxv2i16556 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0557 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[C]](s32)558 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s16>)559 ; CHECK-NEXT: PseudoRET implicit $v8560 %1:_(s16) = G_CONSTANT i16 0561 %2:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR %1(s16)562 $v8 = COPY %2(<vscale x 2 x s16>)563 PseudoRET implicit $v8564 565...566---567name: splatvector_nxv4i16568legalized: false569tracksRegLiveness: true570body: |571 bb.1:572 ; CHECK-LABEL: name: splatvector_nxv4i16573 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0574 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[C]](s32)575 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s16>)576 ; CHECK-NEXT: PseudoRET implicit $v8577 %1:_(s16) = G_CONSTANT i16 0578 %2:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR %1(s16)579 $v8 = COPY %2(<vscale x 4 x s16>)580 PseudoRET implicit $v8581 582...583---584name: splatvector_nxv8i16585legalized: false586tracksRegLiveness: true587body: |588 bb.1:589 ; CHECK-LABEL: name: splatvector_nxv8i16590 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0591 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[C]](s32)592 ; CHECK-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s16>)593 ; CHECK-NEXT: PseudoRET implicit $v8m2594 %1:_(s16) = G_CONSTANT i16 0595 %2:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR %1(s16)596 $v8m2 = COPY %2(<vscale x 8 x s16>)597 PseudoRET implicit $v8m2598 599...600---601name: splatvector_nxv16i16602legalized: false603tracksRegLiveness: true604body: |605 bb.1:606 ; CHECK-LABEL: name: splatvector_nxv16i16607 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0608 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[C]](s32)609 ; CHECK-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s16>)610 ; CHECK-NEXT: PseudoRET implicit $v8m4611 %1:_(s16) = G_CONSTANT i16 0612 %2:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR %1(s16)613 $v8m4 = COPY %2(<vscale x 16 x s16>)614 PseudoRET implicit $v8m4615 616...617---618name: splatvector_nxv1i32619legalized: false620tracksRegLiveness: true621body: |622 bb.1:623 ; CHECK-LABEL: name: splatvector_nxv1i32624 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0625 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[C]](s32)626 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s32>)627 ; CHECK-NEXT: PseudoRET implicit $v8628 %1:_(s32) = G_CONSTANT i32 0629 %2:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR %1(s32)630 $v8 = COPY %2(<vscale x 1 x s32>)631 PseudoRET implicit $v8632 633...634---635name: splatvector_nxv2i32636legalized: false637tracksRegLiveness: true638body: |639 bb.1:640 ; CHECK-LABEL: name: splatvector_nxv2i32641 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0642 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[C]](s32)643 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s32>)644 ; CHECK-NEXT: PseudoRET implicit $v8645 %1:_(s32) = G_CONSTANT i32 0646 %2:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR %1(s32)647 $v8 = COPY %2(<vscale x 2 x s32>)648 PseudoRET implicit $v8649 650...651---652name: splatvector_nxv4i32653legalized: false654tracksRegLiveness: true655body: |656 bb.1:657 ; CHECK-LABEL: name: splatvector_nxv4i32658 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0659 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[C]](s32)660 ; CHECK-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s32>)661 ; CHECK-NEXT: PseudoRET implicit $v8m2662 %1:_(s32) = G_CONSTANT i32 0663 %2:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR %1(s32)664 $v8m2 = COPY %2(<vscale x 4 x s32>)665 PseudoRET implicit $v8m2666 667...668---669name: splatvector_nxv8i32670legalized: false671tracksRegLiveness: true672body: |673 bb.1:674 ; CHECK-LABEL: name: splatvector_nxv8i32675 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0676 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[C]](s32)677 ; CHECK-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s32>)678 ; CHECK-NEXT: PseudoRET implicit $v8m4679 %1:_(s32) = G_CONSTANT i32 0680 %2:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR %1(s32)681 $v8m4 = COPY %2(<vscale x 8 x s32>)682 PseudoRET implicit $v8m4683 684...685---686name: splatvector_nxv16i32687legalized: false688tracksRegLiveness: true689body: |690 bb.1:691 ; CHECK-LABEL: name: splatvector_nxv16i32692 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0693 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[C]](s32)694 ; CHECK-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s32>)695 ; CHECK-NEXT: PseudoRET implicit $v8m8696 %1:_(s32) = G_CONSTANT i32 0697 %2:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR %1(s32)698 $v8m8 = COPY %2(<vscale x 16 x s32>)699 PseudoRET implicit $v8m8700 701...702