227 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+v,+m -run-pass=legalizer %s -o - | FileCheck %s3 4---5name: test_1_s326body: |7 bb.0.entry:8 9 ; CHECK-LABEL: name: test_1_s3210 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB11 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 312 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)13 ; CHECK-NEXT: $x10 = COPY [[LSHR]](s32)14 ; CHECK-NEXT: PseudoRET implicit $x1015 %0:_(s32) = G_VSCALE i32 116 $x10 = COPY %017 PseudoRET implicit $x1018...19---20name: test_2_s3221body: |22 bb.0.entry:23 24 ; CHECK-LABEL: name: test_2_s3225 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB26 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 227 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)28 ; CHECK-NEXT: $x10 = COPY [[LSHR]](s32)29 ; CHECK-NEXT: PseudoRET implicit $x1030 %0:_(s32) = G_VSCALE i32 231 $x10 = COPY %032 PseudoRET implicit $x1033...34---35name: test_3_s3236body: |37 bb.0.entry:38 39 ; CHECK-LABEL: name: test_3_s3240 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB41 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 342 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)43 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[LSHR]], [[C]]44 ; CHECK-NEXT: $x10 = COPY [[MUL]](s32)45 ; CHECK-NEXT: PseudoRET implicit $x1046 %0:_(s32) = G_VSCALE i32 347 $x10 = COPY %048 PseudoRET implicit $x1049...50---51name: test_4_s3252body: |53 bb.0.entry:54 55 ; CHECK-LABEL: name: test_4_s3256 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB57 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 158 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)59 ; CHECK-NEXT: $x10 = COPY [[LSHR]](s32)60 ; CHECK-NEXT: PseudoRET implicit $x1061 %0:_(s32) = G_VSCALE i32 462 $x10 = COPY %063 PseudoRET implicit $x1064...65---66name: test_8_s3267body: |68 bb.0.entry:69 70 ; CHECK-LABEL: name: test_8_s3271 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB72 ; CHECK-NEXT: $x10 = COPY [[READ_VLENB]](s32)73 ; CHECK-NEXT: PseudoRET implicit $x1074 %0:_(s32) = G_VSCALE i32 875 $x10 = COPY %076 PseudoRET implicit $x1077...78---79name: test_16_s3280body: |81 bb.0.entry:82 83 ; CHECK-LABEL: name: test_16_s3284 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB85 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 186 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[READ_VLENB]], [[C]](s32)87 ; CHECK-NEXT: $x10 = COPY [[SHL]](s32)88 ; CHECK-NEXT: PseudoRET implicit $x1089 %0:_(s32) = G_VSCALE i32 1690 $x10 = COPY %091 PseudoRET implicit $x1092...93---94name: test_40_s3295body: |96 bb.0.entry:97 98 ; CHECK-LABEL: name: test_40_s3299 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB100 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5101 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[READ_VLENB]], [[C]]102 ; CHECK-NEXT: $x10 = COPY [[MUL]](s32)103 ; CHECK-NEXT: PseudoRET implicit $x10104 %0:_(s32) = G_VSCALE i32 40105 $x10 = COPY %0106 PseudoRET implicit $x10107...108 109---110name: test_1_s64111body: |112 bb.0.entry:113 ; CHECK-LABEL: name: test_1_s64114 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB115 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3116 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)117 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1118 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[LSHR]], [[C1]]119 ; CHECK-NEXT: $x10 = COPY [[MUL]](s32)120 ; CHECK-NEXT: PseudoRET implicit $x10121 %0:_(s64) = G_VSCALE i64 1122 %1:_(s32) = G_TRUNC %0123 $x10 = COPY %1124 PseudoRET implicit $x10125...126---127name: test_2_s64128body: |129 bb.0.entry:130 ; CHECK-LABEL: name: test_2_s64131 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB132 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3133 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)134 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2135 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[LSHR]], [[C1]]136 ; CHECK-NEXT: $x10 = COPY [[MUL]](s32)137 ; CHECK-NEXT: PseudoRET implicit $x10138 %0:_(s64) = G_VSCALE i64 2139 %1:_(s32) = G_TRUNC %0140 $x10 = COPY %1141 PseudoRET implicit $x10142...143---144name: test_3_s64145body: |146 bb.0.entry:147 ; CHECK-LABEL: name: test_3_s64148 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB149 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3150 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)151 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[LSHR]], [[C]]152 ; CHECK-NEXT: $x10 = COPY [[MUL]](s32)153 ; CHECK-NEXT: PseudoRET implicit $x10154 %0:_(s64) = G_VSCALE i64 3155 %1:_(s32) = G_TRUNC %0156 $x10 = COPY %1157 PseudoRET implicit $x10158...159---160name: test_4_s64161body: |162 bb.0.entry:163 ; CHECK-LABEL: name: test_4_s64164 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB165 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3166 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)167 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4168 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[LSHR]], [[C1]]169 ; CHECK-NEXT: $x10 = COPY [[MUL]](s32)170 ; CHECK-NEXT: PseudoRET implicit $x10171 %0:_(s64) = G_VSCALE i64 4172 %1:_(s32) = G_TRUNC %0173 $x10 = COPY %1174 PseudoRET implicit $x10175...176---177name: test_8_s64178body: |179 bb.0.entry:180 ; CHECK-LABEL: name: test_8_s64181 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB182 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3183 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)184 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8185 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[LSHR]], [[C1]]186 ; CHECK-NEXT: $x10 = COPY [[MUL]](s32)187 ; CHECK-NEXT: PseudoRET implicit $x10188 %0:_(s64) = G_VSCALE i64 8189 %1:_(s32) = G_TRUNC %0190 $x10 = COPY %1191 PseudoRET implicit $x10192...193---194name: test_16_s64195body: |196 bb.0.entry:197 ; CHECK-LABEL: name: test_16_s64198 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB199 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3200 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)201 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16202 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[LSHR]], [[C1]]203 ; CHECK-NEXT: $x10 = COPY [[MUL]](s32)204 ; CHECK-NEXT: PseudoRET implicit $x10205 %0:_(s64) = G_VSCALE i64 16206 %1:_(s32) = G_TRUNC %0207 $x10 = COPY %1208 PseudoRET implicit $x10209...210---211name: test_40_s64212body: |213 bb.0.entry:214 ; CHECK-LABEL: name: test_40_s64215 ; CHECK: [[READ_VLENB:%[0-9]+]]:_(s32) = G_READ_VLENB216 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3217 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[READ_VLENB]], [[C]](s32)218 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 40219 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[LSHR]], [[C1]]220 ; CHECK-NEXT: $x10 = COPY [[MUL]](s32)221 ; CHECK-NEXT: PseudoRET implicit $x10222 %0:_(s64) = G_VSCALE i64 40223 %1:_(s32) = G_TRUNC %0224 $x10 = COPY %1225 PseudoRET implicit $x10226...227