462 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+m -run-pass=regbankselect \3# RUN: -simplify-mir -verify-machineinstrs %s \4# RUN: -o - | FileCheck -check-prefix=RV32I %s5 6---7name: add_i328legalized: true9tracksRegLiveness: true10body: |11 bb.0.entry:12 liveins: $x10, $x1113 14 ; RV32I-LABEL: name: add_i3215 ; RV32I: liveins: $x10, $x1116 ; RV32I-NEXT: {{ $}}17 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x1018 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x1119 ; RV32I-NEXT: [[ADD:%[0-9]+]]:gprb(s32) = G_ADD [[COPY]], [[COPY1]]20 ; RV32I-NEXT: $x10 = COPY [[ADD]](s32)21 ; RV32I-NEXT: PseudoRET implicit $x1022 %0:_(s32) = COPY $x1023 %1:_(s32) = COPY $x1124 %2:_(s32) = G_ADD %0, %125 $x10 = COPY %2(s32)26 PseudoRET implicit $x1027 28...29---30name: sub_i3231legalized: true32tracksRegLiveness: true33body: |34 bb.0.entry:35 liveins: $x10, $x1136 37 ; RV32I-LABEL: name: sub_i3238 ; RV32I: liveins: $x10, $x1139 ; RV32I-NEXT: {{ $}}40 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x1041 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x1142 ; RV32I-NEXT: [[SUB:%[0-9]+]]:gprb(s32) = G_SUB [[COPY]], [[COPY1]]43 ; RV32I-NEXT: $x10 = COPY [[SUB]](s32)44 ; RV32I-NEXT: PseudoRET implicit $x1045 %0:_(s32) = COPY $x1046 %1:_(s32) = COPY $x1147 %2:_(s32) = G_SUB %0, %148 $x10 = COPY %2(s32)49 PseudoRET implicit $x1050 51...52---53name: shl_i3254legalized: true55tracksRegLiveness: true56body: |57 bb.0.entry:58 liveins: $x10, $x1159 60 ; RV32I-LABEL: name: shl_i3261 ; RV32I: liveins: $x10, $x1162 ; RV32I-NEXT: {{ $}}63 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x1064 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x1165 ; RV32I-NEXT: [[SHL:%[0-9]+]]:gprb(s32) = G_SHL [[COPY]], [[COPY1]](s32)66 ; RV32I-NEXT: $x10 = COPY [[SHL]](s32)67 ; RV32I-NEXT: PseudoRET implicit $x1068 %0:_(s32) = COPY $x1069 %1:_(s32) = COPY $x1170 %2:_(s32) = G_SHL %0, %171 $x10 = COPY %2(s32)72 PseudoRET implicit $x1073 74...75---76name: ashr_i3277legalized: true78tracksRegLiveness: true79body: |80 bb.0.entry:81 liveins: $x10, $x1182 83 ; RV32I-LABEL: name: ashr_i3284 ; RV32I: liveins: $x10, $x1185 ; RV32I-NEXT: {{ $}}86 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x1087 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x1188 ; RV32I-NEXT: [[ASHR:%[0-9]+]]:gprb(s32) = G_ASHR [[COPY]], [[COPY1]](s32)89 ; RV32I-NEXT: $x10 = COPY [[ASHR]](s32)90 ; RV32I-NEXT: PseudoRET implicit $x1091 %0:_(s32) = COPY $x1092 %1:_(s32) = COPY $x1193 %2:_(s32) = G_ASHR %0, %194 $x10 = COPY %2(s32)95 PseudoRET implicit $x1096 97...98---99name: lshr_i32100legalized: true101tracksRegLiveness: true102body: |103 bb.0.entry:104 liveins: $x10, $x11105 106 ; RV32I-LABEL: name: lshr_i32107 ; RV32I: liveins: $x10, $x11108 ; RV32I-NEXT: {{ $}}109 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10110 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11111 ; RV32I-NEXT: [[LSHR:%[0-9]+]]:gprb(s32) = G_LSHR [[COPY]], [[COPY1]](s32)112 ; RV32I-NEXT: $x10 = COPY [[LSHR]](s32)113 ; RV32I-NEXT: PseudoRET implicit $x10114 %0:_(s32) = COPY $x10115 %1:_(s32) = COPY $x11116 %2:_(s32) = G_LSHR %0, %1117 $x10 = COPY %2(s32)118 PseudoRET implicit $x10119 120...121---122name: and_i32123legalized: true124tracksRegLiveness: true125body: |126 bb.0.entry:127 liveins: $x10, $x11128 129 ; RV32I-LABEL: name: and_i32130 ; RV32I: liveins: $x10, $x11131 ; RV32I-NEXT: {{ $}}132 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10133 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11134 ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[COPY1]]135 ; RV32I-NEXT: $x10 = COPY [[AND]](s32)136 ; RV32I-NEXT: PseudoRET implicit $x10137 %0:_(s32) = COPY $x10138 %1:_(s32) = COPY $x11139 %2:_(s32) = G_AND %0, %1140 $x10 = COPY %2(s32)141 PseudoRET implicit $x10142 143...144---145name: or_i32146legalized: true147tracksRegLiveness: true148body: |149 bb.0.entry:150 liveins: $x10, $x11151 152 ; RV32I-LABEL: name: or_i32153 ; RV32I: liveins: $x10, $x11154 ; RV32I-NEXT: {{ $}}155 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10156 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11157 ; RV32I-NEXT: [[OR:%[0-9]+]]:gprb(s32) = G_OR [[COPY]], [[COPY1]]158 ; RV32I-NEXT: $x10 = COPY [[OR]](s32)159 ; RV32I-NEXT: PseudoRET implicit $x10160 %0:_(s32) = COPY $x10161 %1:_(s32) = COPY $x11162 %2:_(s32) = G_OR %0, %1163 $x10 = COPY %2(s32)164 PseudoRET implicit $x10165 166...167---168name: xor_i32169legalized: true170tracksRegLiveness: true171body: |172 bb.0.entry:173 liveins: $x10, $x11174 175 ; RV32I-LABEL: name: xor_i32176 ; RV32I: liveins: $x10, $x11177 ; RV32I-NEXT: {{ $}}178 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10179 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11180 ; RV32I-NEXT: [[XOR:%[0-9]+]]:gprb(s32) = G_XOR [[COPY]], [[COPY1]]181 ; RV32I-NEXT: $x10 = COPY [[XOR]](s32)182 ; RV32I-NEXT: PseudoRET implicit $x10183 %0:_(s32) = COPY $x10184 %1:_(s32) = COPY $x11185 %2:_(s32) = G_XOR %0, %1186 $x10 = COPY %2(s32)187 PseudoRET implicit $x10188 189...190---191name: mul_i32192legalized: true193tracksRegLiveness: true194body: |195 bb.0.entry:196 liveins: $x10, $x11197 198 ; RV32I-LABEL: name: mul_i32199 ; RV32I: liveins: $x10, $x11200 ; RV32I-NEXT: {{ $}}201 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10202 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11203 ; RV32I-NEXT: [[MUL:%[0-9]+]]:gprb(s32) = G_MUL [[COPY]], [[COPY1]]204 ; RV32I-NEXT: $x10 = COPY [[MUL]](s32)205 ; RV32I-NEXT: PseudoRET implicit $x10206 %0:_(s32) = COPY $x10207 %1:_(s32) = COPY $x11208 %2:_(s32) = G_MUL %0, %1209 $x10 = COPY %2(s32)210 PseudoRET implicit $x10211 212...213---214name: sdiv_i32215legalized: true216tracksRegLiveness: true217body: |218 bb.0.entry:219 liveins: $x10, $x11220 221 ; RV32I-LABEL: name: sdiv_i32222 ; RV32I: liveins: $x10, $x11223 ; RV32I-NEXT: {{ $}}224 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10225 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11226 ; RV32I-NEXT: [[SDIV:%[0-9]+]]:gprb(s32) = G_SDIV [[COPY]], [[COPY1]]227 ; RV32I-NEXT: $x10 = COPY [[SDIV]](s32)228 ; RV32I-NEXT: PseudoRET implicit $x10229 %0:_(s32) = COPY $x10230 %1:_(s32) = COPY $x11231 %2:_(s32) = G_SDIV %0, %1232 $x10 = COPY %2(s32)233 PseudoRET implicit $x10234 235...236---237name: srem_i32238legalized: true239tracksRegLiveness: true240body: |241 bb.0.entry:242 liveins: $x10, $x11243 244 ; RV32I-LABEL: name: srem_i32245 ; RV32I: liveins: $x10, $x11246 ; RV32I-NEXT: {{ $}}247 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10248 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11249 ; RV32I-NEXT: [[SREM:%[0-9]+]]:gprb(s32) = G_SREM [[COPY]], [[COPY1]]250 ; RV32I-NEXT: $x10 = COPY [[SREM]](s32)251 ; RV32I-NEXT: PseudoRET implicit $x10252 %0:_(s32) = COPY $x10253 %1:_(s32) = COPY $x11254 %2:_(s32) = G_SREM %0, %1255 $x10 = COPY %2(s32)256 PseudoRET implicit $x10257 258...259---260name: smulh_i32261legalized: true262tracksRegLiveness: true263body: |264 bb.0.entry:265 liveins: $x10, $x11266 267 ; RV32I-LABEL: name: smulh_i32268 ; RV32I: liveins: $x10, $x11269 ; RV32I-NEXT: {{ $}}270 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10271 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11272 ; RV32I-NEXT: [[SMULH:%[0-9]+]]:gprb(s32) = G_SMULH [[COPY]], [[COPY1]]273 ; RV32I-NEXT: $x10 = COPY [[SMULH]](s32)274 ; RV32I-NEXT: PseudoRET implicit $x10275 %0:_(s32) = COPY $x10276 %1:_(s32) = COPY $x11277 %2:_(s32) = G_SMULH %0, %1278 $x10 = COPY %2(s32)279 PseudoRET implicit $x10280 281...282---283name: udiv_i32284legalized: true285tracksRegLiveness: true286body: |287 bb.0.entry:288 liveins: $x10, $x11289 290 ; RV32I-LABEL: name: udiv_i32291 ; RV32I: liveins: $x10, $x11292 ; RV32I-NEXT: {{ $}}293 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10294 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11295 ; RV32I-NEXT: [[UDIV:%[0-9]+]]:gprb(s32) = G_UDIV [[COPY]], [[COPY1]]296 ; RV32I-NEXT: $x10 = COPY [[UDIV]](s32)297 ; RV32I-NEXT: PseudoRET implicit $x10298 %0:_(s32) = COPY $x10299 %1:_(s32) = COPY $x11300 %2:_(s32) = G_UDIV %0, %1301 $x10 = COPY %2(s32)302 PseudoRET implicit $x10303 304...305---306name: urem_i32307legalized: true308tracksRegLiveness: true309body: |310 bb.0.entry:311 liveins: $x10, $x11312 313 ; RV32I-LABEL: name: urem_i32314 ; RV32I: liveins: $x10, $x11315 ; RV32I-NEXT: {{ $}}316 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10317 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11318 ; RV32I-NEXT: [[UREM:%[0-9]+]]:gprb(s32) = G_UREM [[COPY]], [[COPY1]]319 ; RV32I-NEXT: $x10 = COPY [[UREM]](s32)320 ; RV32I-NEXT: PseudoRET implicit $x10321 %0:_(s32) = COPY $x10322 %1:_(s32) = COPY $x11323 %2:_(s32) = G_UREM %0, %1324 $x10 = COPY %2(s32)325 PseudoRET implicit $x10326 327...328---329name: umulh_i32330legalized: true331tracksRegLiveness: true332body: |333 bb.0.entry:334 liveins: $x10, $x11335 336 ; RV32I-LABEL: name: umulh_i32337 ; RV32I: liveins: $x10, $x11338 ; RV32I-NEXT: {{ $}}339 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10340 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11341 ; RV32I-NEXT: [[UMULH:%[0-9]+]]:gprb(s32) = G_UMULH [[COPY]], [[COPY1]]342 ; RV32I-NEXT: $x10 = COPY [[UMULH]](s32)343 ; RV32I-NEXT: PseudoRET implicit $x10344 %0:_(s32) = COPY $x10345 %1:_(s32) = COPY $x11346 %2:_(s32) = G_UMULH %0, %1347 $x10 = COPY %2(s32)348 PseudoRET implicit $x10349 350...351---352name: icmp_i32353legalized: true354tracksRegLiveness: true355body: |356 bb.0.entry:357 liveins: $x10, $x11358 359 ; RV32I-LABEL: name: icmp_i32360 ; RV32I: liveins: $x10, $x11361 ; RV32I-NEXT: {{ $}}362 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10363 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11364 ; RV32I-NEXT: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]365 ; RV32I-NEXT: $x10 = COPY [[ICMP]](s32)366 ; RV32I-NEXT: PseudoRET implicit $x10367 %0:_(s32) = COPY $x10368 %1:_(s32) = COPY $x11369 %2:_(s32) = G_ICMP intpred(eq), %0(s32), %1370 $x10 = COPY %2(s32)371 PseudoRET implicit $x10372 373...374---375name: icmp_ptr376legalized: true377tracksRegLiveness: true378body: |379 bb.0.entry:380 liveins: $x10, $x11381 382 ; RV32I-LABEL: name: icmp_ptr383 ; RV32I: liveins: $x10, $x11384 ; RV32I-NEXT: {{ $}}385 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $x10386 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $x11387 ; RV32I-NEXT: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(eq), [[COPY]](p0), [[COPY1]]388 ; RV32I-NEXT: $x10 = COPY [[ICMP]](s32)389 ; RV32I-NEXT: PseudoRET implicit $x10390 %0:_(p0) = COPY $x10391 %1:_(p0) = COPY $x11392 %2:_(s32) = G_ICMP intpred(eq), %0(p0), %1393 $x10 = COPY %2(s32)394 PseudoRET implicit $x10395 396...397---398name: gep399legalized: true400tracksRegLiveness: true401body: |402 bb.0.entry:403 liveins: $x10, $x11404 405 ; RV32I-LABEL: name: gep406 ; RV32I: liveins: $x10, $x11407 ; RV32I-NEXT: {{ $}}408 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $x10409 ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11410 ; RV32I-NEXT: [[PTR_ADD:%[0-9]+]]:gprb(p0) = G_PTR_ADD [[COPY]], [[COPY1]](s32)411 ; RV32I-NEXT: $x10 = COPY [[PTR_ADD]](p0)412 ; RV32I-NEXT: PseudoRET implicit $x10413 %0:_(p0) = COPY $x10414 %1:_(s32) = COPY $x11415 %2:_(p0) = G_PTR_ADD %0, %1(s32)416 $x10 = COPY %2(p0)417 PseudoRET implicit $x10418 419...420---421name: ptrtoint422legalized: true423tracksRegLiveness: true424body: |425 bb.0.entry:426 liveins: $x10427 428 ; RV32I-LABEL: name: ptrtoint429 ; RV32I: liveins: $x10430 ; RV32I-NEXT: {{ $}}431 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(p0) = COPY $x10432 ; RV32I-NEXT: [[PTRTOINT:%[0-9]+]]:gprb(s32) = G_PTRTOINT [[COPY]](p0)433 ; RV32I-NEXT: $x10 = COPY [[PTRTOINT]](s32)434 ; RV32I-NEXT: PseudoRET implicit $x10435 %0:_(p0) = COPY $x10436 %1:_(s32) = G_PTRTOINT %0(p0)437 $x10 = COPY %1(s32)438 PseudoRET implicit $x10439 440...441---442name: inttoprt443legalized: true444tracksRegLiveness: true445body: |446 bb.0.entry:447 liveins: $x10448 449 ; RV32I-LABEL: name: inttoprt450 ; RV32I: liveins: $x10451 ; RV32I-NEXT: {{ $}}452 ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10453 ; RV32I-NEXT: [[INTTOPTR:%[0-9]+]]:gprb(p0) = G_INTTOPTR [[COPY]](s32)454 ; RV32I-NEXT: $x10 = COPY [[INTTOPTR]](p0)455 ; RV32I-NEXT: PseudoRET implicit $x10456 %0:_(s32) = COPY $x10457 %1:_(p0) = G_INTTOPTR %0(s32)458 $x10 = COPY %1(p0)459 PseudoRET implicit $x10460 461...462