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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=regbankselect \3# RUN:   -simplify-mir -verify-machineinstrs %s \4# RUN:   -o - | FileCheck -check-prefix=RV32I %s5 6---7name:            fp_select_s328legalized:       true9tracksRegLiveness: true10body:             |11  bb.0.entry:12    liveins: $x10, $f10_f, $f11_f13 14    ; RV32I-LABEL: name: fp_select_s3215    ; RV32I: liveins: $x10, $f10_f, $f11_f16    ; RV32I-NEXT: {{  $}}17    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x1018    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f19    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:fprb(s32) = COPY $f11_f20    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 121    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[C]]22    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]]23    ; RV32I-NEXT: $f10_f = COPY [[SELECT]](s32)24    ; RV32I-NEXT: PseudoRET implicit $f10_f25    %3:_(s32) = COPY $x1026    %4:_(s32) = COPY $f10_f27    %5:_(s32) = COPY $f11_f28    %12:_(s32) = G_CONSTANT i32 129    %11:_(s32) = G_AND %3, %1230    %10:_(s32) = G_SELECT %11(s32), %4, %531    $f10_f = COPY %10(s32)32    PseudoRET implicit $f10_f33 34...35---36name:            fp_select_s6437legalized:       true38tracksRegLiveness: true39body:             |40  bb.0.entry:41    liveins: $x10, $f10_d, $f11_d42 43    ; RV32I-LABEL: name: fp_select_s6444    ; RV32I: liveins: $x10, $f10_d, $f11_d45    ; RV32I-NEXT: {{  $}}46    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x1047    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $f10_d48    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:fprb(s64) = COPY $f11_d49    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 150    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[C]]51    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]]52    ; RV32I-NEXT: $f10_d = COPY [[SELECT]](s64)53    ; RV32I-NEXT: PseudoRET implicit $f10_d54    %3:_(s32) = COPY $x1055    %4:_(s64) = COPY $f10_d56    %5:_(s64) = COPY $f11_d57    %12:_(s32) = G_CONSTANT i32 158    %11:_(s32) = G_AND %3, %1259    %10:_(s64) = G_SELECT %11(s32), %4, %560    $f10_d = COPY %10(s64)61    PseudoRET implicit $f10_d62 63...64---65name:            fp_select_gpr_use_s3266legalized:       true67tracksRegLiveness: true68body:             |69  bb.0.entry:70    liveins: $x10, $f10_f, $f11_f71 72    ; RV32I-LABEL: name: fp_select_gpr_use_s3273    ; RV32I: liveins: $x10, $f10_f, $f11_f74    ; RV32I-NEXT: {{  $}}75    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x1076    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f77    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:fprb(s32) = COPY $f11_f78    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 179    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[C]]80    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]]81    ; RV32I-NEXT: $x10 = COPY [[SELECT]](s32)82    ; RV32I-NEXT: PseudoRET implicit $x1083    %3:_(s32) = COPY $x1084    %4:_(s32) = COPY $f10_f85    %5:_(s32) = COPY $f11_f86    %12:_(s32) = G_CONSTANT i32 187    %11:_(s32) = G_AND %3, %1288    %10:_(s32) = G_SELECT %11(s32), %4, %589    $x10 = COPY %10(s32)90    PseudoRET implicit $x1091 92...93---94name:            fp_select_gpr_def_s3295legalized:       true96tracksRegLiveness: true97body:             |98  bb.0.entry:99    liveins: $x10, $x11, $f10_f100 101    ; RV32I-LABEL: name: fp_select_gpr_def_s32102    ; RV32I: liveins: $x10, $x11, $f10_f103    ; RV32I-NEXT: {{  $}}104    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10105    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f106    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $x11107    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1108    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[C]]109    ; RV32I-NEXT: [[COPY3:%[0-9]+]]:fprb(s32) = COPY [[COPY2]](s32)110    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY3]]111    ; RV32I-NEXT: $f10_f = COPY [[SELECT]](s32)112    ; RV32I-NEXT: PseudoRET implicit $f10_f113    %3:_(s32) = COPY $x10114    %4:_(s32) = COPY $f10_f115    %5:_(s32) = COPY $x11116    %12:_(s32) = G_CONSTANT i32 1117    %11:_(s32) = G_AND %3, %12118    %10:_(s32) = G_SELECT %11(s32), %4, %5119    $f10_f = COPY %10(s32)120    PseudoRET implicit $f10_f121 122...123---124name:            fp_select_only_fpr_use_s32125legalized:       true126tracksRegLiveness: true127body:             |128  bb.0.entry:129    liveins: $x10, $x11, $x12130 131    ; RV32I-LABEL: name: fp_select_only_fpr_use_s32132    ; RV32I: liveins: $x10, $x11, $x12133    ; RV32I-NEXT: {{  $}}134    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10135    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $x11136    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $x12137    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1138    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[C]]139    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]]140    ; RV32I-NEXT: $f10_f = COPY [[SELECT]](s32)141    ; RV32I-NEXT: PseudoRET implicit $f10_f142    %3:_(s32) = COPY $x10143    %4:_(s32) = COPY $x11144    %5:_(s32) = COPY $x12145    %12:_(s32) = G_CONSTANT i32 1146    %11:_(s32) = G_AND %3, %12147    %10:_(s32) = G_SELECT %11(s32), %4, %5148    $f10_f = COPY %10(s32)149    PseudoRET implicit $f10_f150 151...152---153name:            fp_select_only_one_fpr_def_s32154legalized:       true155tracksRegLiveness: true156body:             |157  bb.0.entry:158    liveins: $x10, $x11, $f10_f159 160    ; RV32I-LABEL: name: fp_select_only_one_fpr_def_s32161    ; RV32I: liveins: $x10, $x11, $f10_f162    ; RV32I-NEXT: {{  $}}163    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10164    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f165    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $x11166    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1167    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY]], [[C]]168    ; RV32I-NEXT: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY1]](s32)169    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[COPY3]], [[COPY2]]170    ; RV32I-NEXT: $x10 = COPY [[SELECT]](s32)171    ; RV32I-NEXT: PseudoRET implicit $x10172    %3:_(s32) = COPY $x10173    %4:_(s32) = COPY $f10_f174    %5:_(s32) = COPY $x11175    %12:_(s32) = G_CONSTANT i32 1176    %11:_(s32) = G_AND %3, %12177    %10:_(s32) = G_SELECT %11(s32), %4, %5178    $x10 = COPY %10(s32)179    PseudoRET implicit $x10180 181...182