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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=riscv64 -mattr=+m,+v -run-pass=regbankselect \3# RUN: -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \4# RUN: -o - | FileCheck %s5 6---7name: splat_zero_nxv1i88legalized: true9regBankSelected: false10body: |11 bb.1:12 ; CHECK-LABEL: name: splat_zero_nxv1i813 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 014 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)15 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 1 x s8>) = G_SPLAT_VECTOR [[ANYEXT]](s64)16 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s8>)17 ; CHECK-NEXT: PseudoRET implicit $v818 %3:_(s32) = G_CONSTANT i32 019 %2:_(s64) = G_ANYEXT %3(s32)20 %0:_(<vscale x 1 x s8>) = G_SPLAT_VECTOR %2(s64)21 $v8 = COPY %0(<vscale x 1 x s8>)22 PseudoRET implicit $v823 24...25---26name: splat_zero_nxv2i827legalized: true28regBankSelected: false29body: |30 bb.1:31 ; CHECK-LABEL: name: splat_zero_nxv2i832 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 033 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)34 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 2 x s8>) = G_SPLAT_VECTOR [[ANYEXT]](s64)35 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s8>)36 ; CHECK-NEXT: PseudoRET implicit $v837 %3:_(s32) = G_CONSTANT i32 038 %2:_(s64) = G_ANYEXT %3(s32)39 %0:_(<vscale x 2 x s8>) = G_SPLAT_VECTOR %2(s64)40 $v8 = COPY %0(<vscale x 2 x s8>)41 PseudoRET implicit $v842 43...44---45name: splat_zero_nxv4i846legalized: true47regBankSelected: false48body: |49 bb.1:50 ; CHECK-LABEL: name: splat_zero_nxv4i851 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 052 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)53 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 4 x s8>) = G_SPLAT_VECTOR [[ANYEXT]](s64)54 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s8>)55 ; CHECK-NEXT: PseudoRET implicit $v856 %3:_(s32) = G_CONSTANT i32 057 %2:_(s64) = G_ANYEXT %3(s32)58 %0:_(<vscale x 4 x s8>) = G_SPLAT_VECTOR %2(s64)59 $v8 = COPY %0(<vscale x 4 x s8>)60 PseudoRET implicit $v861 62...63---64name: splat_zero_nxv8i865legalized: true66regBankSelected: false67body: |68 bb.1:69 ; CHECK-LABEL: name: splat_zero_nxv8i870 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 071 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)72 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 8 x s8>) = G_SPLAT_VECTOR [[ANYEXT]](s64)73 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s8>)74 ; CHECK-NEXT: PseudoRET implicit $v875 %3:_(s32) = G_CONSTANT i32 076 %2:_(s64) = G_ANYEXT %3(s32)77 %0:_(<vscale x 8 x s8>) = G_SPLAT_VECTOR %2(s64)78 $v8 = COPY %0(<vscale x 8 x s8>)79 PseudoRET implicit $v880 81...82---83name: splat_zero_nxv16i884legalized: true85regBankSelected: false86body: |87 bb.1:88 ; CHECK-LABEL: name: splat_zero_nxv16i889 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 090 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)91 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 16 x s8>) = G_SPLAT_VECTOR [[ANYEXT]](s64)92 ; CHECK-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s8>)93 ; CHECK-NEXT: PseudoRET implicit $v8m294 %3:_(s32) = G_CONSTANT i32 095 %2:_(s64) = G_ANYEXT %3(s32)96 %0:_(<vscale x 16 x s8>) = G_SPLAT_VECTOR %2(s64)97 $v8m2 = COPY %0(<vscale x 16 x s8>)98 PseudoRET implicit $v8m299 100...101---102name: splat_zero_nxv32i8103legalized: true104regBankSelected: false105body: |106 bb.1:107 ; CHECK-LABEL: name: splat_zero_nxv32i8108 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0109 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)110 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 32 x s8>) = G_SPLAT_VECTOR [[ANYEXT]](s64)111 ; CHECK-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 32 x s8>)112 ; CHECK-NEXT: PseudoRET implicit $v8m4113 %3:_(s32) = G_CONSTANT i32 0114 %2:_(s64) = G_ANYEXT %3(s32)115 %0:_(<vscale x 32 x s8>) = G_SPLAT_VECTOR %2(s64)116 $v8m4 = COPY %0(<vscale x 32 x s8>)117 PseudoRET implicit $v8m4118 119...120---121name: splat_zero_nxv64i8122legalized: true123regBankSelected: false124body: |125 bb.1:126 ; CHECK-LABEL: name: splat_zero_nxv64i8127 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0128 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)129 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 64 x s8>) = G_SPLAT_VECTOR [[ANYEXT]](s64)130 ; CHECK-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 64 x s8>)131 ; CHECK-NEXT: PseudoRET implicit $v8m8132 %3:_(s32) = G_CONSTANT i32 0133 %2:_(s64) = G_ANYEXT %3(s32)134 %0:_(<vscale x 64 x s8>) = G_SPLAT_VECTOR %2(s64)135 $v8m8 = COPY %0(<vscale x 64 x s8>)136 PseudoRET implicit $v8m8137 138...139---140name: splat_zero_nxv1i16141legalized: true142regBankSelected: false143body: |144 bb.1:145 ; CHECK-LABEL: name: splat_zero_nxv1i16146 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0147 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)148 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 1 x s16>) = G_SPLAT_VECTOR [[ANYEXT]](s64)149 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s16>)150 ; CHECK-NEXT: PseudoRET implicit $v8151 %3:_(s32) = G_CONSTANT i32 0152 %2:_(s64) = G_ANYEXT %3(s32)153 %0:_(<vscale x 1 x s16>) = G_SPLAT_VECTOR %2(s64)154 $v8 = COPY %0(<vscale x 1 x s16>)155 PseudoRET implicit $v8156 157...158---159name: splat_zero_nxv2i16160legalized: true161regBankSelected: false162body: |163 bb.1:164 ; CHECK-LABEL: name: splat_zero_nxv2i16165 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0166 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)167 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 2 x s16>) = G_SPLAT_VECTOR [[ANYEXT]](s64)168 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s16>)169 ; CHECK-NEXT: PseudoRET implicit $v8170 %3:_(s32) = G_CONSTANT i32 0171 %2:_(s64) = G_ANYEXT %3(s32)172 %0:_(<vscale x 2 x s16>) = G_SPLAT_VECTOR %2(s64)173 $v8 = COPY %0(<vscale x 2 x s16>)174 PseudoRET implicit $v8175 176...177---178name: splat_zero_nxv4i16179legalized: true180regBankSelected: false181body: |182 bb.1:183 ; CHECK-LABEL: name: splat_zero_nxv4i16184 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0185 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)186 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 4 x s16>) = G_SPLAT_VECTOR [[ANYEXT]](s64)187 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s16>)188 ; CHECK-NEXT: PseudoRET implicit $v8189 %3:_(s32) = G_CONSTANT i32 0190 %2:_(s64) = G_ANYEXT %3(s32)191 %0:_(<vscale x 4 x s16>) = G_SPLAT_VECTOR %2(s64)192 $v8 = COPY %0(<vscale x 4 x s16>)193 PseudoRET implicit $v8194 195...196---197name: splat_zero_nxv8i16198legalized: true199regBankSelected: false200body: |201 bb.1:202 ; CHECK-LABEL: name: splat_zero_nxv8i16203 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0204 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)205 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 8 x s16>) = G_SPLAT_VECTOR [[ANYEXT]](s64)206 ; CHECK-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s16>)207 ; CHECK-NEXT: PseudoRET implicit $v8m2208 %3:_(s32) = G_CONSTANT i32 0209 %2:_(s64) = G_ANYEXT %3(s32)210 %0:_(<vscale x 8 x s16>) = G_SPLAT_VECTOR %2(s64)211 $v8m2 = COPY %0(<vscale x 8 x s16>)212 PseudoRET implicit $v8m2213 214...215---216name: splat_zero_nxv16i16217legalized: true218regBankSelected: false219body: |220 bb.1:221 ; CHECK-LABEL: name: splat_zero_nxv16i16222 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0223 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)224 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 16 x s16>) = G_SPLAT_VECTOR [[ANYEXT]](s64)225 ; CHECK-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s16>)226 ; CHECK-NEXT: PseudoRET implicit $v8m4227 %3:_(s32) = G_CONSTANT i32 0228 %2:_(s64) = G_ANYEXT %3(s32)229 %0:_(<vscale x 16 x s16>) = G_SPLAT_VECTOR %2(s64)230 $v8m4 = COPY %0(<vscale x 16 x s16>)231 PseudoRET implicit $v8m4232 233...234---235name: splat_zero_nxv32i16236legalized: true237regBankSelected: false238body: |239 bb.1:240 ; CHECK-LABEL: name: splat_zero_nxv32i16241 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0242 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)243 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 32 x s16>) = G_SPLAT_VECTOR [[ANYEXT]](s64)244 ; CHECK-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 32 x s16>)245 ; CHECK-NEXT: PseudoRET implicit $v8m8246 %3:_(s32) = G_CONSTANT i32 0247 %2:_(s64) = G_ANYEXT %3(s32)248 %0:_(<vscale x 32 x s16>) = G_SPLAT_VECTOR %2(s64)249 $v8m8 = COPY %0(<vscale x 32 x s16>)250 PseudoRET implicit $v8m8251 252...253---254name: splat_zero_nxv1i32255legalized: true256regBankSelected: false257body: |258 bb.1:259 ; CHECK-LABEL: name: splat_zero_nxv1i32260 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0261 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)262 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[ANYEXT]](s64)263 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s32>)264 ; CHECK-NEXT: PseudoRET implicit $v8265 %1:_(s32) = G_CONSTANT i32 0266 %2:_(s64) = G_ANYEXT %1(s32)267 %0:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR %2(s64)268 $v8 = COPY %0(<vscale x 1 x s32>)269 PseudoRET implicit $v8270 271...272---273name: splat_zero_nxv2i32274legalized: true275regBankSelected: false276body: |277 bb.1:278 ; CHECK-LABEL: name: splat_zero_nxv2i32279 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0280 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)281 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[ANYEXT]](s64)282 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s32>)283 ; CHECK-NEXT: PseudoRET implicit $v8284 %1:_(s32) = G_CONSTANT i32 0285 %2:_(s64) = G_ANYEXT %1(s32)286 %0:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR %2(s64)287 $v8 = COPY %0(<vscale x 2 x s32>)288 PseudoRET implicit $v8289 290...291---292name: splat_zero_nxv4i32293legalized: true294regBankSelected: false295body: |296 bb.1:297 ; CHECK-LABEL: name: splat_zero_nxv4i32298 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0299 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)300 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[ANYEXT]](s64)301 ; CHECK-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s32>)302 ; CHECK-NEXT: PseudoRET implicit $v8m2303 %1:_(s32) = G_CONSTANT i32 0304 %2:_(s64) = G_ANYEXT %1(s32)305 %0:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR %2(s64)306 $v8m2 = COPY %0(<vscale x 4 x s32>)307 PseudoRET implicit $v8m2308 309...310---311name: splat_zero_nxv8i32312legalized: true313regBankSelected: false314body: |315 bb.1:316 ; CHECK-LABEL: name: splat_zero_nxv8i32317 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0318 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)319 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[ANYEXT]](s64)320 ; CHECK-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s32>)321 ; CHECK-NEXT: PseudoRET implicit $v8m4322 %1:_(s32) = G_CONSTANT i32 0323 %2:_(s64) = G_ANYEXT %1(s32)324 %0:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR %2(s64)325 $v8m4 = COPY %0(<vscale x 8 x s32>)326 PseudoRET implicit $v8m4327 328...329---330name: splat_zero_nxv16i32331legalized: true332regBankSelected: false333body: |334 bb.1:335 ; CHECK-LABEL: name: splat_zero_nxv16i32336 ; CHECK: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0337 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[C]](s32)338 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[ANYEXT]](s64)339 ; CHECK-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s32>)340 ; CHECK-NEXT: PseudoRET implicit $v8m8341 %1:_(s32) = G_CONSTANT i32 0342 %2:_(s64) = G_ANYEXT %1(s32)343 %0:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR %2(s64)344 $v8m8 = COPY %0(<vscale x 16 x s32>)345 PseudoRET implicit $v8m8346 347...348---349name: splat_zero_nxv1i64350legalized: true351regBankSelected: false352body: |353 bb.1:354 ; CHECK-LABEL: name: splat_zero_nxv1i64355 ; CHECK: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 0356 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[C]](s64)357 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s64>)358 ; CHECK-NEXT: PseudoRET implicit $v8359 %1:_(s64) = G_CONSTANT i64 0360 %0:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR %1(s64)361 $v8 = COPY %0(<vscale x 1 x s64>)362 PseudoRET implicit $v8363 364...365---366name: splat_zero_nxv2i64367legalized: true368regBankSelected: false369body: |370 bb.1:371 ; CHECK-LABEL: name: splat_zero_nxv2i64372 ; CHECK: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 0373 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[C]](s64)374 ; CHECK-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s64>)375 ; CHECK-NEXT: PseudoRET implicit $v8m2376 %1:_(s64) = G_CONSTANT i64 0377 %0:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR %1(s64)378 $v8m2 = COPY %0(<vscale x 2 x s64>)379 PseudoRET implicit $v8m2380 381...382---383name: splat_zero_nxv4i64384legalized: true385regBankSelected: false386body: |387 bb.1:388 ; CHECK-LABEL: name: splat_zero_nxv4i64389 ; CHECK: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 0390 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[C]](s64)391 ; CHECK-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s64>)392 ; CHECK-NEXT: PseudoRET implicit $v8m4393 %1:_(s64) = G_CONSTANT i64 0394 %0:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR %1(s64)395 $v8m4 = COPY %0(<vscale x 4 x s64>)396 PseudoRET implicit $v8m4397 398...399---400name: splat_zero_nxv8i64401legalized: true402regBankSelected: false403body: |404 bb.1:405 ; CHECK-LABEL: name: splat_zero_nxv8i64406 ; CHECK: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 0407 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[C]](s64)408 ; CHECK-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s64>)409 ; CHECK-NEXT: PseudoRET implicit $v8m8410 %1:_(s64) = G_CONSTANT i64 0411 %0:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR %1(s64)412 $v8m8 = COPY %0(<vscale x 8 x s64>)413 PseudoRET implicit $v8m8414 415...416---417name: splat_zero_nxv1f32418legalized: true419regBankSelected: false420body: |421 bb.1:422 ; CHECK-LABEL: name: splat_zero_nxv1f32423 ; CHECK: [[C:%[0-9]+]]:fprb(s32) = G_FCONSTANT float 0.000000e+00424 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY [[C]](s32)425 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[COPY]](s32)426 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 1 x s32>) = G_SPLAT_VECTOR [[ANYEXT]](s64)427 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s32>)428 ; CHECK-NEXT: PseudoRET implicit $v8429 %1:_(s32) = G_FCONSTANT float 0.000000e+00430 %2:_(s64) = G_ANYEXT %1(s32)431 %0:_(<vscale x 1 x s32>) = G_SPLAT_VECTOR %2(s64)432 $v8 = COPY %0(<vscale x 1 x s32>)433 PseudoRET implicit $v8434 435...436---437name: splat_zero_nxv2f32438legalized: true439regBankSelected: false440body: |441 bb.1:442 ; CHECK-LABEL: name: splat_zero_nxv2f32443 ; CHECK: [[C:%[0-9]+]]:fprb(s32) = G_FCONSTANT float 0.000000e+00444 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY [[C]](s32)445 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[COPY]](s32)446 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 2 x s32>) = G_SPLAT_VECTOR [[ANYEXT]](s64)447 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s32>)448 ; CHECK-NEXT: PseudoRET implicit $v8449 %1:_(s32) = G_FCONSTANT float 0.000000e+00450 %2:_(s64) = G_ANYEXT %1(s32)451 %0:_(<vscale x 2 x s32>) = G_SPLAT_VECTOR %2(s64)452 $v8 = COPY %0(<vscale x 2 x s32>)453 PseudoRET implicit $v8454 455...456---457name: splat_zero_nxv4f32458legalized: true459regBankSelected: false460body: |461 bb.1:462 ; CHECK-LABEL: name: splat_zero_nxv4f32463 ; CHECK: [[C:%[0-9]+]]:fprb(s32) = G_FCONSTANT float 0.000000e+00464 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY [[C]](s32)465 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[COPY]](s32)466 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 4 x s32>) = G_SPLAT_VECTOR [[ANYEXT]](s64)467 ; CHECK-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s32>)468 ; CHECK-NEXT: PseudoRET implicit $v8m2469 %1:_(s32) = G_FCONSTANT float 0.000000e+00470 %2:_(s64) = G_ANYEXT %1(s32)471 %0:_(<vscale x 4 x s32>) = G_SPLAT_VECTOR %2(s64)472 $v8m2 = COPY %0(<vscale x 4 x s32>)473 PseudoRET implicit $v8m2474 475...476---477name: splat_zero_nxv8f32478legalized: true479regBankSelected: false480body: |481 bb.1:482 ; CHECK-LABEL: name: splat_zero_nxv8f32483 ; CHECK: [[C:%[0-9]+]]:fprb(s32) = G_FCONSTANT float 0.000000e+00484 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY [[C]](s32)485 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[COPY]](s32)486 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 8 x s32>) = G_SPLAT_VECTOR [[ANYEXT]](s64)487 ; CHECK-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s32>)488 ; CHECK-NEXT: PseudoRET implicit $v8m4489 %1:_(s32) = G_FCONSTANT float 0.000000e+00490 %2:_(s64) = G_ANYEXT %1(s32)491 %0:_(<vscale x 8 x s32>) = G_SPLAT_VECTOR %2(s64)492 $v8m4 = COPY %0(<vscale x 8 x s32>)493 PseudoRET implicit $v8m4494 495...496---497name: splat_zero_nxv16f32498legalized: true499regBankSelected: false500body: |501 bb.1:502 ; CHECK-LABEL: name: splat_zero_nxv16f32503 ; CHECK: [[C:%[0-9]+]]:fprb(s32) = G_FCONSTANT float 0.000000e+00504 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY [[C]](s32)505 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[COPY]](s32)506 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 16 x s32>) = G_SPLAT_VECTOR [[ANYEXT]](s64)507 ; CHECK-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 16 x s32>)508 ; CHECK-NEXT: PseudoRET implicit $v8m8509 %1:_(s32) = G_FCONSTANT float 0.000000e+00510 %2:_(s64) = G_ANYEXT %1(s32)511 %0:_(<vscale x 16 x s32>) = G_SPLAT_VECTOR %2(s64)512 $v8m8 = COPY %0(<vscale x 16 x s32>)513 PseudoRET implicit $v8m8514 515...516---517name: splat_zero_nxv1f64518legalized: true519regBankSelected: false520body: |521 bb.1:522 ; CHECK-LABEL: name: splat_zero_nxv1f64523 ; CHECK: [[C:%[0-9]+]]:fprb(s64) = G_FCONSTANT double 0.000000e+00524 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 1 x s64>) = G_SPLAT_VECTOR [[C]](s64)525 ; CHECK-NEXT: $v8 = COPY [[SPLAT_VECTOR]](<vscale x 1 x s64>)526 ; CHECK-NEXT: PseudoRET implicit $v8527 %1:_(s64) = G_FCONSTANT double 0.000000e+00528 %0:_(<vscale x 1 x s64>) = G_SPLAT_VECTOR %1(s64)529 $v8 = COPY %0(<vscale x 1 x s64>)530 PseudoRET implicit $v8531 532...533---534name: splat_zero_nxv2f64535legalized: true536regBankSelected: false537body: |538 bb.1:539 ; CHECK-LABEL: name: splat_zero_nxv2f64540 ; CHECK: [[C:%[0-9]+]]:fprb(s64) = G_FCONSTANT double 0.000000e+00541 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 2 x s64>) = G_SPLAT_VECTOR [[C]](s64)542 ; CHECK-NEXT: $v8m2 = COPY [[SPLAT_VECTOR]](<vscale x 2 x s64>)543 ; CHECK-NEXT: PseudoRET implicit $v8m2544 %1:_(s64) = G_FCONSTANT double 0.000000e+00545 %0:_(<vscale x 2 x s64>) = G_SPLAT_VECTOR %1(s64)546 $v8m2 = COPY %0(<vscale x 2 x s64>)547 PseudoRET implicit $v8m2548 549...550---551name: splat_zero_nxv4f64552legalized: true553regBankSelected: false554body: |555 bb.1:556 ; CHECK-LABEL: name: splat_zero_nxv4f64557 ; CHECK: [[C:%[0-9]+]]:fprb(s64) = G_FCONSTANT double 0.000000e+00558 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 4 x s64>) = G_SPLAT_VECTOR [[C]](s64)559 ; CHECK-NEXT: $v8m4 = COPY [[SPLAT_VECTOR]](<vscale x 4 x s64>)560 ; CHECK-NEXT: PseudoRET implicit $v8m4561 %1:_(s64) = G_FCONSTANT double 0.000000e+00562 %0:_(<vscale x 4 x s64>) = G_SPLAT_VECTOR %1(s64)563 $v8m4 = COPY %0(<vscale x 4 x s64>)564 PseudoRET implicit $v8m4565 566...567---568name: splat_zero_nxv8f64569legalized: true570regBankSelected: false571body: |572 bb.1:573 ; CHECK-LABEL: name: splat_zero_nxv8f64574 ; CHECK: [[C:%[0-9]+]]:fprb(s64) = G_FCONSTANT double 0.000000e+00575 ; CHECK-NEXT: [[SPLAT_VECTOR:%[0-9]+]]:vrb(<vscale x 8 x s64>) = G_SPLAT_VECTOR [[C]](s64)576 ; CHECK-NEXT: $v8m8 = COPY [[SPLAT_VECTOR]](<vscale x 8 x s64>)577 ; CHECK-NEXT: PseudoRET implicit $v8m8578 %1:_(s64) = G_FCONSTANT double 0.000000e+00579 %0:_(<vscale x 8 x s64>) = G_SPLAT_VECTOR %1(s64)580 $v8m8 = COPY %0(<vscale x 8 x s64>)581 PseudoRET implicit $v8m8582 583...584