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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -run-pass=regbankselect \3# RUN: -simplify-mir -verify-machineinstrs %s \4# RUN: -o - | FileCheck -check-prefixes=RV32 %s5# RUN: llc -mtriple=riscv64 -run-pass=regbankselect \6# RUN: -simplify-mir -verify-machineinstrs %s \7# RUN: -o - | FileCheck -check-prefixes=RV64 %s8 9...10---11name: test_ret_nxv1i812legalized: true13tracksRegLiveness: true14body: |15 bb.1.entry:16 liveins: $v817 ; RV32-LABEL: name: test_ret_nxv1i818 ; RV32: liveins: $v819 ; RV32-NEXT: {{ $}}20 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s8>) = COPY $v821 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s8>)22 ; RV32-NEXT: PseudoRET implicit $v823 ;24 ; RV64-LABEL: name: test_ret_nxv1i825 ; RV64: liveins: $v826 ; RV64-NEXT: {{ $}}27 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s8>) = COPY $v828 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s8>)29 ; RV64-NEXT: PseudoRET implicit $v830 %0:_(<vscale x 1 x s8>) = COPY $v831 $v8 = COPY %0(<vscale x 1 x s8>)32 PseudoRET implicit $v833 34...35---36name: test_ret_nxv2i837legalized: true38tracksRegLiveness: true39body: |40 bb.1.entry:41 liveins: $v842 ; RV32-LABEL: name: test_ret_nxv2i843 ; RV32: liveins: $v844 ; RV32-NEXT: {{ $}}45 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s8>) = COPY $v846 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s8>)47 ; RV32-NEXT: PseudoRET implicit $v848 ;49 ; RV64-LABEL: name: test_ret_nxv2i850 ; RV64: liveins: $v851 ; RV64-NEXT: {{ $}}52 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s8>) = COPY $v853 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s8>)54 ; RV64-NEXT: PseudoRET implicit $v855 %0:_(<vscale x 2 x s8>) = COPY $v856 $v8 = COPY %0(<vscale x 2 x s8>)57 PseudoRET implicit $v858 59...60---61name: test_ret_nxv4i862legalized: true63tracksRegLiveness: true64body: |65 bb.1.entry:66 liveins: $v867 ; RV32-LABEL: name: test_ret_nxv4i868 ; RV32: liveins: $v869 ; RV32-NEXT: {{ $}}70 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s8>) = COPY $v871 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 4 x s8>)72 ; RV32-NEXT: PseudoRET implicit $v873 ;74 ; RV64-LABEL: name: test_ret_nxv4i875 ; RV64: liveins: $v876 ; RV64-NEXT: {{ $}}77 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s8>) = COPY $v878 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 4 x s8>)79 ; RV64-NEXT: PseudoRET implicit $v880 %0:_(<vscale x 4 x s8>) = COPY $v881 $v8 = COPY %0(<vscale x 4 x s8>)82 PseudoRET implicit $v883 84...85---86name: test_ret_nxv8i887legalized: true88tracksRegLiveness: true89body: |90 bb.1.entry:91 liveins: $v892 ; RV32-LABEL: name: test_ret_nxv8i893 ; RV32: liveins: $v894 ; RV32-NEXT: {{ $}}95 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s8>) = COPY $v896 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 8 x s8>)97 ; RV32-NEXT: PseudoRET implicit $v898 ;99 ; RV64-LABEL: name: test_ret_nxv8i8100 ; RV64: liveins: $v8101 ; RV64-NEXT: {{ $}}102 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s8>) = COPY $v8103 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 8 x s8>)104 ; RV64-NEXT: PseudoRET implicit $v8105 %0:_(<vscale x 8 x s8>) = COPY $v8106 $v8 = COPY %0(<vscale x 8 x s8>)107 PseudoRET implicit $v8108 109...110---111name: test_ret_nxv16i8112legalized: true113tracksRegLiveness: true114body: |115 bb.1.entry:116 liveins: $v8117 ; RV32-LABEL: name: test_ret_nxv16i8118 ; RV32: liveins: $v8119 ; RV32-NEXT: {{ $}}120 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s8>) = COPY $v8121 ; RV32-NEXT: $v8m2 = COPY [[COPY]](<vscale x 16 x s8>)122 ; RV32-NEXT: PseudoRET implicit $v8m2123 ;124 ; RV64-LABEL: name: test_ret_nxv16i8125 ; RV64: liveins: $v8126 ; RV64-NEXT: {{ $}}127 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s8>) = COPY $v8128 ; RV64-NEXT: $v8m2 = COPY [[COPY]](<vscale x 16 x s8>)129 ; RV64-NEXT: PseudoRET implicit $v8m2130 %0:_(<vscale x 16 x s8>) = COPY $v8131 $v8m2 = COPY %0(<vscale x 16 x s8>)132 PseudoRET implicit $v8m2133 134...135---136name: test_ret_nxv32i8137legalized: true138tracksRegLiveness: true139body: |140 bb.1.entry:141 liveins: $v8142 ; RV32-LABEL: name: test_ret_nxv32i8143 ; RV32: liveins: $v8144 ; RV32-NEXT: {{ $}}145 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 32 x s8>) = COPY $v8146 ; RV32-NEXT: $v8m4 = COPY [[COPY]](<vscale x 32 x s8>)147 ; RV32-NEXT: PseudoRET implicit $v8m4148 ;149 ; RV64-LABEL: name: test_ret_nxv32i8150 ; RV64: liveins: $v8151 ; RV64-NEXT: {{ $}}152 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 32 x s8>) = COPY $v8153 ; RV64-NEXT: $v8m4 = COPY [[COPY]](<vscale x 32 x s8>)154 ; RV64-NEXT: PseudoRET implicit $v8m4155 %0:_(<vscale x 32 x s8>) = COPY $v8156 $v8m4 = COPY %0(<vscale x 32 x s8>)157 PseudoRET implicit $v8m4158 159...160---161name: test_ret_nxv64i8162legalized: true163tracksRegLiveness: true164body: |165 bb.1.entry:166 liveins: $v8167 ; RV32-LABEL: name: test_ret_nxv64i8168 ; RV32: liveins: $v8169 ; RV32-NEXT: {{ $}}170 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 64 x s8>) = COPY $v8171 ; RV32-NEXT: $v8m8 = COPY [[COPY]](<vscale x 64 x s8>)172 ; RV32-NEXT: PseudoRET implicit $v8m8173 ;174 ; RV64-LABEL: name: test_ret_nxv64i8175 ; RV64: liveins: $v8176 ; RV64-NEXT: {{ $}}177 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 64 x s8>) = COPY $v8178 ; RV64-NEXT: $v8m8 = COPY [[COPY]](<vscale x 64 x s8>)179 ; RV64-NEXT: PseudoRET implicit $v8m8180 %0:_(<vscale x 64 x s8>) = COPY $v8181 $v8m8 = COPY %0(<vscale x 64 x s8>)182 PseudoRET implicit $v8m8183 184...185---186name: test_ret_nxv1i16187legalized: true188tracksRegLiveness: true189body: |190 bb.1.entry:191 liveins: $v8192 ; RV32-LABEL: name: test_ret_nxv1i16193 ; RV32: liveins: $v8194 ; RV32-NEXT: {{ $}}195 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s16>) = COPY $v8196 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s16>)197 ; RV32-NEXT: PseudoRET implicit $v8198 ;199 ; RV64-LABEL: name: test_ret_nxv1i16200 ; RV64: liveins: $v8201 ; RV64-NEXT: {{ $}}202 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s16>) = COPY $v8203 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s16>)204 ; RV64-NEXT: PseudoRET implicit $v8205 %0:_(<vscale x 1 x s16>) = COPY $v8206 $v8 = COPY %0(<vscale x 1 x s16>)207 PseudoRET implicit $v8208 209...210---211name: test_ret_nxv2i16212legalized: true213tracksRegLiveness: true214body: |215 bb.1.entry:216 liveins: $v8217 ; RV32-LABEL: name: test_ret_nxv2i16218 ; RV32: liveins: $v8219 ; RV32-NEXT: {{ $}}220 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s16>) = COPY $v8221 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s16>)222 ; RV32-NEXT: PseudoRET implicit $v8223 ;224 ; RV64-LABEL: name: test_ret_nxv2i16225 ; RV64: liveins: $v8226 ; RV64-NEXT: {{ $}}227 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s16>) = COPY $v8228 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s16>)229 ; RV64-NEXT: PseudoRET implicit $v8230 %0:_(<vscale x 2 x s16>) = COPY $v8231 $v8 = COPY %0(<vscale x 2 x s16>)232 PseudoRET implicit $v8233 234...235---236name: test_ret_nxv4i16237legalized: true238tracksRegLiveness: true239body: |240 bb.1.entry:241 liveins: $v8242 ; RV32-LABEL: name: test_ret_nxv4i16243 ; RV32: liveins: $v8244 ; RV32-NEXT: {{ $}}245 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s16>) = COPY $v8246 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 4 x s16>)247 ; RV32-NEXT: PseudoRET implicit $v8248 ;249 ; RV64-LABEL: name: test_ret_nxv4i16250 ; RV64: liveins: $v8251 ; RV64-NEXT: {{ $}}252 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s16>) = COPY $v8253 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 4 x s16>)254 ; RV64-NEXT: PseudoRET implicit $v8255 %0:_(<vscale x 4 x s16>) = COPY $v8256 $v8 = COPY %0(<vscale x 4 x s16>)257 PseudoRET implicit $v8258 259...260---261name: test_ret_nxv8i16262legalized: true263tracksRegLiveness: true264body: |265 bb.1.entry:266 liveins: $v8267 ; RV32-LABEL: name: test_ret_nxv8i16268 ; RV32: liveins: $v8269 ; RV32-NEXT: {{ $}}270 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s16>) = COPY $v8271 ; RV32-NEXT: $v8m2 = COPY [[COPY]](<vscale x 8 x s16>)272 ; RV32-NEXT: PseudoRET implicit $v8m2273 ;274 ; RV64-LABEL: name: test_ret_nxv8i16275 ; RV64: liveins: $v8276 ; RV64-NEXT: {{ $}}277 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s16>) = COPY $v8278 ; RV64-NEXT: $v8m2 = COPY [[COPY]](<vscale x 8 x s16>)279 ; RV64-NEXT: PseudoRET implicit $v8m2280 %0:_(<vscale x 8 x s16>) = COPY $v8281 $v8m2 = COPY %0(<vscale x 8 x s16>)282 PseudoRET implicit $v8m2283 284...285---286name: test_ret_nxv16i16287legalized: true288tracksRegLiveness: true289body: |290 bb.1.entry:291 liveins: $v8292 ; RV32-LABEL: name: test_ret_nxv16i16293 ; RV32: liveins: $v8294 ; RV32-NEXT: {{ $}}295 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s16>) = COPY $v8296 ; RV32-NEXT: $v8m4 = COPY [[COPY]](<vscale x 16 x s16>)297 ; RV32-NEXT: PseudoRET implicit $v8m4298 ;299 ; RV64-LABEL: name: test_ret_nxv16i16300 ; RV64: liveins: $v8301 ; RV64-NEXT: {{ $}}302 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s16>) = COPY $v8303 ; RV64-NEXT: $v8m4 = COPY [[COPY]](<vscale x 16 x s16>)304 ; RV64-NEXT: PseudoRET implicit $v8m4305 %0:_(<vscale x 16 x s16>) = COPY $v8306 $v8m4 = COPY %0(<vscale x 16 x s16>)307 PseudoRET implicit $v8m4308 309...310---311name: test_ret_nxv32i16312legalized: true313tracksRegLiveness: true314body: |315 bb.1.entry:316 liveins: $v8317 ; RV32-LABEL: name: test_ret_nxv32i16318 ; RV32: liveins: $v8319 ; RV32-NEXT: {{ $}}320 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 32 x s16>) = COPY $v8321 ; RV32-NEXT: $v8m8 = COPY [[COPY]](<vscale x 32 x s16>)322 ; RV32-NEXT: PseudoRET implicit $v8m8323 ;324 ; RV64-LABEL: name: test_ret_nxv32i16325 ; RV64: liveins: $v8326 ; RV64-NEXT: {{ $}}327 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 32 x s16>) = COPY $v8328 ; RV64-NEXT: $v8m8 = COPY [[COPY]](<vscale x 32 x s16>)329 ; RV64-NEXT: PseudoRET implicit $v8m8330 %0:_(<vscale x 32 x s16>) = COPY $v8331 $v8m8 = COPY %0(<vscale x 32 x s16>)332 PseudoRET implicit $v8m8333 334...335---336name: test_ret_nxv1i32337legalized: true338tracksRegLiveness: true339body: |340 bb.1.entry:341 liveins: $v8342 ; RV32-LABEL: name: test_ret_nxv1i32343 ; RV32: liveins: $v8344 ; RV32-NEXT: {{ $}}345 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s32>) = COPY $v8346 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s32>)347 ; RV32-NEXT: PseudoRET implicit $v8348 ;349 ; RV64-LABEL: name: test_ret_nxv1i32350 ; RV64: liveins: $v8351 ; RV64-NEXT: {{ $}}352 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s32>) = COPY $v8353 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s32>)354 ; RV64-NEXT: PseudoRET implicit $v8355 %0:_(<vscale x 1 x s32>) = COPY $v8356 $v8 = COPY %0(<vscale x 1 x s32>)357 PseudoRET implicit $v8358 359...360---361name: test_ret_nxv2i32362legalized: true363tracksRegLiveness: true364body: |365 bb.1.entry:366 liveins: $v8367 ; RV32-LABEL: name: test_ret_nxv2i32368 ; RV32: liveins: $v8369 ; RV32-NEXT: {{ $}}370 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s32>) = COPY $v8371 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s32>)372 ; RV32-NEXT: PseudoRET implicit $v8373 ;374 ; RV64-LABEL: name: test_ret_nxv2i32375 ; RV64: liveins: $v8376 ; RV64-NEXT: {{ $}}377 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s32>) = COPY $v8378 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s32>)379 ; RV64-NEXT: PseudoRET implicit $v8380 %0:_(<vscale x 2 x s32>) = COPY $v8381 $v8 = COPY %0(<vscale x 2 x s32>)382 PseudoRET implicit $v8383 384...385---386name: test_ret_nxv4i32387legalized: true388tracksRegLiveness: true389body: |390 bb.1.entry:391 liveins: $v8392 ; RV32-LABEL: name: test_ret_nxv4i32393 ; RV32: liveins: $v8394 ; RV32-NEXT: {{ $}}395 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s32>) = COPY $v8396 ; RV32-NEXT: $v8m2 = COPY [[COPY]](<vscale x 4 x s32>)397 ; RV32-NEXT: PseudoRET implicit $v8m2398 ;399 ; RV64-LABEL: name: test_ret_nxv4i32400 ; RV64: liveins: $v8401 ; RV64-NEXT: {{ $}}402 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s32>) = COPY $v8403 ; RV64-NEXT: $v8m2 = COPY [[COPY]](<vscale x 4 x s32>)404 ; RV64-NEXT: PseudoRET implicit $v8m2405 %0:_(<vscale x 4 x s32>) = COPY $v8406 $v8m2 = COPY %0(<vscale x 4 x s32>)407 PseudoRET implicit $v8m2408 409...410---411name: test_ret_nxv8i32412legalized: true413tracksRegLiveness: true414body: |415 bb.1.entry:416 liveins: $v8417 ; RV32-LABEL: name: test_ret_nxv8i32418 ; RV32: liveins: $v8419 ; RV32-NEXT: {{ $}}420 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s32>) = COPY $v8421 ; RV32-NEXT: $v8m4 = COPY [[COPY]](<vscale x 8 x s32>)422 ; RV32-NEXT: PseudoRET implicit $v8m4423 ;424 ; RV64-LABEL: name: test_ret_nxv8i32425 ; RV64: liveins: $v8426 ; RV64-NEXT: {{ $}}427 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s32>) = COPY $v8428 ; RV64-NEXT: $v8m4 = COPY [[COPY]](<vscale x 8 x s32>)429 ; RV64-NEXT: PseudoRET implicit $v8m4430 %0:_(<vscale x 8 x s32>) = COPY $v8431 $v8m4 = COPY %0(<vscale x 8 x s32>)432 PseudoRET implicit $v8m4433 434...435---436name: test_ret_nxv16i32437legalized: true438tracksRegLiveness: true439body: |440 bb.1.entry:441 liveins: $v8442 ; RV32-LABEL: name: test_ret_nxv16i32443 ; RV32: liveins: $v8444 ; RV32-NEXT: {{ $}}445 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s32>) = COPY $v8446 ; RV32-NEXT: $v8m8 = COPY [[COPY]](<vscale x 16 x s32>)447 ; RV32-NEXT: PseudoRET implicit $v8m8448 ;449 ; RV64-LABEL: name: test_ret_nxv16i32450 ; RV64: liveins: $v8451 ; RV64-NEXT: {{ $}}452 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s32>) = COPY $v8453 ; RV64-NEXT: $v8m8 = COPY [[COPY]](<vscale x 16 x s32>)454 ; RV64-NEXT: PseudoRET implicit $v8m8455 %0:_(<vscale x 16 x s32>) = COPY $v8456 $v8m8 = COPY %0(<vscale x 16 x s32>)457 PseudoRET implicit $v8m8458 459...460---461name: test_ret_nxv1i64462legalized: true463tracksRegLiveness: true464body: |465 bb.1.entry:466 liveins: $v8467 ; RV32-LABEL: name: test_ret_nxv1i64468 ; RV32: liveins: $v8469 ; RV32-NEXT: {{ $}}470 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s64>) = COPY $v8471 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s64>)472 ; RV32-NEXT: PseudoRET implicit $v8473 ;474 ; RV64-LABEL: name: test_ret_nxv1i64475 ; RV64: liveins: $v8476 ; RV64-NEXT: {{ $}}477 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s64>) = COPY $v8478 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s64>)479 ; RV64-NEXT: PseudoRET implicit $v8480 %0:_(<vscale x 1 x s64>) = COPY $v8481 $v8 = COPY %0(<vscale x 1 x s64>)482 PseudoRET implicit $v8483 484...485---486name: test_ret_nxv2i64487legalized: true488tracksRegLiveness: true489body: |490 bb.1.entry:491 liveins: $v8492 ; RV32-LABEL: name: test_ret_nxv2i64493 ; RV32: liveins: $v8494 ; RV32-NEXT: {{ $}}495 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s64>) = COPY $v8496 ; RV32-NEXT: $v8m2 = COPY [[COPY]](<vscale x 2 x s64>)497 ; RV32-NEXT: PseudoRET implicit $v8m2498 ;499 ; RV64-LABEL: name: test_ret_nxv2i64500 ; RV64: liveins: $v8501 ; RV64-NEXT: {{ $}}502 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s64>) = COPY $v8503 ; RV64-NEXT: $v8m2 = COPY [[COPY]](<vscale x 2 x s64>)504 ; RV64-NEXT: PseudoRET implicit $v8m2505 %0:_(<vscale x 2 x s64>) = COPY $v8506 $v8m2 = COPY %0(<vscale x 2 x s64>)507 PseudoRET implicit $v8m2508 509...510---511name: test_ret_nxv4i64512legalized: true513tracksRegLiveness: true514body: |515 bb.1.entry:516 liveins: $v8517 ; RV32-LABEL: name: test_ret_nxv4i64518 ; RV32: liveins: $v8519 ; RV32-NEXT: {{ $}}520 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s64>) = COPY $v8521 ; RV32-NEXT: $v8m4 = COPY [[COPY]](<vscale x 4 x s64>)522 ; RV32-NEXT: PseudoRET implicit $v8m4523 ;524 ; RV64-LABEL: name: test_ret_nxv4i64525 ; RV64: liveins: $v8526 ; RV64-NEXT: {{ $}}527 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s64>) = COPY $v8528 ; RV64-NEXT: $v8m4 = COPY [[COPY]](<vscale x 4 x s64>)529 ; RV64-NEXT: PseudoRET implicit $v8m4530 %0:_(<vscale x 4 x s64>) = COPY $v8531 $v8m4 = COPY %0(<vscale x 4 x s64>)532 PseudoRET implicit $v8m4533 534...535---536name: test_ret_nxv8i64537legalized: true538tracksRegLiveness: true539body: |540 bb.1.entry:541 liveins: $v8542 ; RV32-LABEL: name: test_ret_nxv8i64543 ; RV32: liveins: $v8544 ; RV32-NEXT: {{ $}}545 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s64>) = COPY $v8546 ; RV32-NEXT: $v8m8 = COPY [[COPY]](<vscale x 8 x s64>)547 ; RV32-NEXT: PseudoRET implicit $v8m8548 ;549 ; RV64-LABEL: name: test_ret_nxv8i64550 ; RV64: liveins: $v8551 ; RV64-NEXT: {{ $}}552 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s64>) = COPY $v8553 ; RV64-NEXT: $v8m8 = COPY [[COPY]](<vscale x 8 x s64>)554 ; RV64-NEXT: PseudoRET implicit $v8m8555 %0:_(<vscale x 8 x s64>) = COPY $v8556 $v8m8 = COPY %0(<vscale x 8 x s64>)557 PseudoRET implicit $v8m8558 559...560---561name: test_ret_nxv64i1562legalized: true563tracksRegLiveness: true564body: |565 bb.1.entry:566 liveins: $v8567 ; RV32-LABEL: name: test_ret_nxv64i1568 ; RV32: liveins: $v8569 ; RV32-NEXT: {{ $}}570 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 64 x s1>) = COPY $v8571 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 64 x s1>)572 ; RV32-NEXT: PseudoRET implicit $v8573 ;574 ; RV64-LABEL: name: test_ret_nxv64i1575 ; RV64: liveins: $v8576 ; RV64-NEXT: {{ $}}577 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 64 x s1>) = COPY $v8578 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 64 x s1>)579 ; RV64-NEXT: PseudoRET implicit $v8580 %0:_(<vscale x 64 x s1>) = COPY $v8581 $v8 = COPY %0(<vscale x 64 x s1>)582 PseudoRET implicit $v8583 584...585---586name: test_ret_nxv32i1587legalized: true588tracksRegLiveness: true589body: |590 bb.1.entry:591 liveins: $v8592 ; RV32-LABEL: name: test_ret_nxv32i1593 ; RV32: liveins: $v8594 ; RV32-NEXT: {{ $}}595 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 32 x s1>) = COPY $v8596 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 32 x s1>)597 ; RV32-NEXT: PseudoRET implicit $v8598 ;599 ; RV64-LABEL: name: test_ret_nxv32i1600 ; RV64: liveins: $v8601 ; RV64-NEXT: {{ $}}602 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 32 x s1>) = COPY $v8603 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 32 x s1>)604 ; RV64-NEXT: PseudoRET implicit $v8605 %0:_(<vscale x 32 x s1>) = COPY $v8606 $v8 = COPY %0(<vscale x 32 x s1>)607 PseudoRET implicit $v8608 609...610---611name: test_ret_nxv16i1612legalized: true613tracksRegLiveness: true614body: |615 bb.1.entry:616 liveins: $v8617 ; RV32-LABEL: name: test_ret_nxv16i1618 ; RV32: liveins: $v8619 ; RV32-NEXT: {{ $}}620 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s1>) = COPY $v8621 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 16 x s1>)622 ; RV32-NEXT: PseudoRET implicit $v8623 ;624 ; RV64-LABEL: name: test_ret_nxv16i1625 ; RV64: liveins: $v8626 ; RV64-NEXT: {{ $}}627 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s1>) = COPY $v8628 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 16 x s1>)629 ; RV64-NEXT: PseudoRET implicit $v8630 %0:_(<vscale x 16 x s1>) = COPY $v8631 $v8 = COPY %0(<vscale x 16 x s1>)632 PseudoRET implicit $v8633 634...635---636name: test_ret_nxv8i1637legalized: true638tracksRegLiveness: true639body: |640 bb.1.entry:641 liveins: $v8642 ; RV32-LABEL: name: test_ret_nxv8i1643 ; RV32: liveins: $v8644 ; RV32-NEXT: {{ $}}645 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s1>) = COPY $v8646 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 8 x s1>)647 ; RV32-NEXT: PseudoRET implicit $v8648 ;649 ; RV64-LABEL: name: test_ret_nxv8i1650 ; RV64: liveins: $v8651 ; RV64-NEXT: {{ $}}652 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s1>) = COPY $v8653 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 8 x s1>)654 ; RV64-NEXT: PseudoRET implicit $v8655 %0:_(<vscale x 8 x s1>) = COPY $v8656 $v8 = COPY %0(<vscale x 8 x s1>)657 PseudoRET implicit $v8658 659...660---661name: test_ret_nxv4i1662legalized: true663tracksRegLiveness: true664body: |665 bb.1.entry:666 liveins: $v8667 ; RV32-LABEL: name: test_ret_nxv4i1668 ; RV32: liveins: $v8669 ; RV32-NEXT: {{ $}}670 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s1>) = COPY $v8671 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 4 x s1>)672 ; RV32-NEXT: PseudoRET implicit $v8673 ;674 ; RV64-LABEL: name: test_ret_nxv4i1675 ; RV64: liveins: $v8676 ; RV64-NEXT: {{ $}}677 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s1>) = COPY $v8678 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 4 x s1>)679 ; RV64-NEXT: PseudoRET implicit $v8680 %0:_(<vscale x 4 x s1>) = COPY $v8681 $v8 = COPY %0(<vscale x 4 x s1>)682 PseudoRET implicit $v8683 684...685---686name: test_ret_nxv2i1687legalized: true688tracksRegLiveness: true689body: |690 bb.1.entry:691 liveins: $v8692 ; RV32-LABEL: name: test_ret_nxv2i1693 ; RV32: liveins: $v8694 ; RV32-NEXT: {{ $}}695 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s1>) = COPY $v8696 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s1>)697 ; RV32-NEXT: PseudoRET implicit $v8698 ;699 ; RV64-LABEL: name: test_ret_nxv2i1700 ; RV64: liveins: $v8701 ; RV64-NEXT: {{ $}}702 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s1>) = COPY $v8703 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s1>)704 ; RV64-NEXT: PseudoRET implicit $v8705 %0:_(<vscale x 2 x s1>) = COPY $v8706 $v8 = COPY %0(<vscale x 2 x s1>)707 PseudoRET implicit $v8708 709...710---711name: test_ret_nxv1i1712legalized: true713tracksRegLiveness: true714body: |715 bb.1.entry:716 liveins: $v8717 ; RV32-LABEL: name: test_ret_nxv1i1718 ; RV32: liveins: $v8719 ; RV32-NEXT: {{ $}}720 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s1>) = COPY $v8721 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s1>)722 ; RV32-NEXT: PseudoRET implicit $v8723 ;724 ; RV64-LABEL: name: test_ret_nxv1i1725 ; RV64: liveins: $v8726 ; RV64-NEXT: {{ $}}727 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s1>) = COPY $v8728 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s1>)729 ; RV64-NEXT: PseudoRET implicit $v8730 %0:_(<vscale x 1 x s1>) = COPY $v8731 $v8 = COPY %0(<vscale x 1 x s1>)732 PseudoRET implicit $v8733 734...735---736name: test_ret_nxv1f32737legalized: true738tracksRegLiveness: true739body: |740 bb.1.entry:741 liveins: $v8742 ; RV32-LABEL: name: test_ret_nxv1f32743 ; RV32: liveins: $v8744 ; RV32-NEXT: {{ $}}745 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s32>) = COPY $v8746 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s32>)747 ; RV32-NEXT: PseudoRET implicit $v8748 ;749 ; RV64-LABEL: name: test_ret_nxv1f32750 ; RV64: liveins: $v8751 ; RV64-NEXT: {{ $}}752 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s32>) = COPY $v8753 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s32>)754 ; RV64-NEXT: PseudoRET implicit $v8755 %0:_(<vscale x 1 x s32>) = COPY $v8756 $v8 = COPY %0(<vscale x 1 x s32>)757 PseudoRET implicit $v8758 759...760---761name: test_ret_nxv2f32762legalized: true763tracksRegLiveness: true764body: |765 bb.1.entry:766 liveins: $v8767 ; RV32-LABEL: name: test_ret_nxv2f32768 ; RV32: liveins: $v8769 ; RV32-NEXT: {{ $}}770 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s32>) = COPY $v8771 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s32>)772 ; RV32-NEXT: PseudoRET implicit $v8773 ;774 ; RV64-LABEL: name: test_ret_nxv2f32775 ; RV64: liveins: $v8776 ; RV64-NEXT: {{ $}}777 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s32>) = COPY $v8778 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s32>)779 ; RV64-NEXT: PseudoRET implicit $v8780 %0:_(<vscale x 2 x s32>) = COPY $v8781 $v8 = COPY %0(<vscale x 2 x s32>)782 PseudoRET implicit $v8783 784...785---786name: test_ret_nxv4f32787legalized: true788tracksRegLiveness: true789body: |790 bb.1.entry:791 liveins: $v8792 ; RV32-LABEL: name: test_ret_nxv4f32793 ; RV32: liveins: $v8794 ; RV32-NEXT: {{ $}}795 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s32>) = COPY $v8796 ; RV32-NEXT: $v8m2 = COPY [[COPY]](<vscale x 4 x s32>)797 ; RV32-NEXT: PseudoRET implicit $v8m2798 ;799 ; RV64-LABEL: name: test_ret_nxv4f32800 ; RV64: liveins: $v8801 ; RV64-NEXT: {{ $}}802 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s32>) = COPY $v8803 ; RV64-NEXT: $v8m2 = COPY [[COPY]](<vscale x 4 x s32>)804 ; RV64-NEXT: PseudoRET implicit $v8m2805 %0:_(<vscale x 4 x s32>) = COPY $v8806 $v8m2 = COPY %0(<vscale x 4 x s32>)807 PseudoRET implicit $v8m2808 809...810---811name: test_ret_nxv8f32812legalized: true813tracksRegLiveness: true814body: |815 bb.1.entry:816 liveins: $v8817 ; RV32-LABEL: name: test_ret_nxv8f32818 ; RV32: liveins: $v8819 ; RV32-NEXT: {{ $}}820 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s32>) = COPY $v8821 ; RV32-NEXT: $v8m4 = COPY [[COPY]](<vscale x 8 x s32>)822 ; RV32-NEXT: PseudoRET implicit $v8m4823 ;824 ; RV64-LABEL: name: test_ret_nxv8f32825 ; RV64: liveins: $v8826 ; RV64-NEXT: {{ $}}827 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s32>) = COPY $v8828 ; RV64-NEXT: $v8m4 = COPY [[COPY]](<vscale x 8 x s32>)829 ; RV64-NEXT: PseudoRET implicit $v8m4830 %0:_(<vscale x 8 x s32>) = COPY $v8831 $v8m4 = COPY %0(<vscale x 8 x s32>)832 PseudoRET implicit $v8m4833 834...835---836name: test_ret_nxv16f32837legalized: true838tracksRegLiveness: true839body: |840 bb.1.entry:841 liveins: $v8842 ; RV32-LABEL: name: test_ret_nxv16f32843 ; RV32: liveins: $v8844 ; RV32-NEXT: {{ $}}845 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s32>) = COPY $v8846 ; RV32-NEXT: $v8m8 = COPY [[COPY]](<vscale x 16 x s32>)847 ; RV32-NEXT: PseudoRET implicit $v8m8848 ;849 ; RV64-LABEL: name: test_ret_nxv16f32850 ; RV64: liveins: $v8851 ; RV64-NEXT: {{ $}}852 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s32>) = COPY $v8853 ; RV64-NEXT: $v8m8 = COPY [[COPY]](<vscale x 16 x s32>)854 ; RV64-NEXT: PseudoRET implicit $v8m8855 %0:_(<vscale x 16 x s32>) = COPY $v8856 $v8m8 = COPY %0(<vscale x 16 x s32>)857 PseudoRET implicit $v8m8858 859...860---861name: test_ret_nxv1f64862legalized: true863tracksRegLiveness: true864body: |865 bb.1.entry:866 liveins: $v8867 ; RV32-LABEL: name: test_ret_nxv1f64868 ; RV32: liveins: $v8869 ; RV32-NEXT: {{ $}}870 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s64>) = COPY $v8871 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s64>)872 ; RV32-NEXT: PseudoRET implicit $v8873 ;874 ; RV64-LABEL: name: test_ret_nxv1f64875 ; RV64: liveins: $v8876 ; RV64-NEXT: {{ $}}877 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s64>) = COPY $v8878 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s64>)879 ; RV64-NEXT: PseudoRET implicit $v8880 %0:_(<vscale x 1 x s64>) = COPY $v8881 $v8 = COPY %0(<vscale x 1 x s64>)882 PseudoRET implicit $v8883 884...885---886name: test_ret_nxv2f64887legalized: true888tracksRegLiveness: true889body: |890 bb.1.entry:891 liveins: $v8892 ; RV32-LABEL: name: test_ret_nxv2f64893 ; RV32: liveins: $v8894 ; RV32-NEXT: {{ $}}895 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s64>) = COPY $v8896 ; RV32-NEXT: $v8m2 = COPY [[COPY]](<vscale x 2 x s64>)897 ; RV32-NEXT: PseudoRET implicit $v8m2898 ;899 ; RV64-LABEL: name: test_ret_nxv2f64900 ; RV64: liveins: $v8901 ; RV64-NEXT: {{ $}}902 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s64>) = COPY $v8903 ; RV64-NEXT: $v8m2 = COPY [[COPY]](<vscale x 2 x s64>)904 ; RV64-NEXT: PseudoRET implicit $v8m2905 %0:_(<vscale x 2 x s64>) = COPY $v8906 $v8m2 = COPY %0(<vscale x 2 x s64>)907 PseudoRET implicit $v8m2908 909...910---911name: test_ret_nxv4f64912legalized: true913tracksRegLiveness: true914body: |915 bb.1.entry:916 liveins: $v8917 ; RV32-LABEL: name: test_ret_nxv4f64918 ; RV32: liveins: $v8919 ; RV32-NEXT: {{ $}}920 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s64>) = COPY $v8921 ; RV32-NEXT: $v8m4 = COPY [[COPY]](<vscale x 4 x s64>)922 ; RV32-NEXT: PseudoRET implicit $v8m4923 ;924 ; RV64-LABEL: name: test_ret_nxv4f64925 ; RV64: liveins: $v8926 ; RV64-NEXT: {{ $}}927 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s64>) = COPY $v8928 ; RV64-NEXT: $v8m4 = COPY [[COPY]](<vscale x 4 x s64>)929 ; RV64-NEXT: PseudoRET implicit $v8m4930 %0:_(<vscale x 4 x s64>) = COPY $v8931 $v8m4 = COPY %0(<vscale x 4 x s64>)932 PseudoRET implicit $v8m4933 934...935---936name: test_ret_nxv8f64937legalized: true938tracksRegLiveness: true939body: |940 bb.1.entry:941 liveins: $v8942 ; RV32-LABEL: name: test_ret_nxv8f64943 ; RV32: liveins: $v8944 ; RV32-NEXT: {{ $}}945 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s64>) = COPY $v8946 ; RV32-NEXT: $v8m8 = COPY [[COPY]](<vscale x 8 x s64>)947 ; RV32-NEXT: PseudoRET implicit $v8m8948 ;949 ; RV64-LABEL: name: test_ret_nxv8f64950 ; RV64: liveins: $v8951 ; RV64-NEXT: {{ $}}952 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s64>) = COPY $v8953 ; RV64-NEXT: $v8m8 = COPY [[COPY]](<vscale x 8 x s64>)954 ; RV64-NEXT: PseudoRET implicit $v8m8955 %0:_(<vscale x 8 x s64>) = COPY $v8956 $v8m8 = COPY %0(<vscale x 8 x s64>)957 PseudoRET implicit $v8m8958 959...960---961name: test_ret_nxv1f16962legalized: true963tracksRegLiveness: true964body: |965 bb.1.entry:966 liveins: $v8967 ; RV32-LABEL: name: test_ret_nxv1f16968 ; RV32: liveins: $v8969 ; RV32-NEXT: {{ $}}970 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s16>) = COPY $v8971 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s16>)972 ; RV32-NEXT: PseudoRET implicit $v8973 ;974 ; RV64-LABEL: name: test_ret_nxv1f16975 ; RV64: liveins: $v8976 ; RV64-NEXT: {{ $}}977 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s16>) = COPY $v8978 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s16>)979 ; RV64-NEXT: PseudoRET implicit $v8980 %0:_(<vscale x 1 x s16>) = COPY $v8981 $v8 = COPY %0(<vscale x 1 x s16>)982 PseudoRET implicit $v8983 984...985---986name: test_ret_nxv2f16987legalized: true988tracksRegLiveness: true989body: |990 bb.1.entry:991 liveins: $v8992 ; RV32-LABEL: name: test_ret_nxv2f16993 ; RV32: liveins: $v8994 ; RV32-NEXT: {{ $}}995 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s16>) = COPY $v8996 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s16>)997 ; RV32-NEXT: PseudoRET implicit $v8998 ;999 ; RV64-LABEL: name: test_ret_nxv2f161000 ; RV64: liveins: $v81001 ; RV64-NEXT: {{ $}}1002 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s16>) = COPY $v81003 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s16>)1004 ; RV64-NEXT: PseudoRET implicit $v81005 %0:_(<vscale x 2 x s16>) = COPY $v81006 $v8 = COPY %0(<vscale x 2 x s16>)1007 PseudoRET implicit $v81008 1009...1010---1011name: test_ret_nxv4f161012legalized: true1013tracksRegLiveness: true1014body: |1015 bb.1.entry:1016 liveins: $v81017 ; RV32-LABEL: name: test_ret_nxv4f161018 ; RV32: liveins: $v81019 ; RV32-NEXT: {{ $}}1020 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s16>) = COPY $v81021 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 4 x s16>)1022 ; RV32-NEXT: PseudoRET implicit $v81023 ;1024 ; RV64-LABEL: name: test_ret_nxv4f161025 ; RV64: liveins: $v81026 ; RV64-NEXT: {{ $}}1027 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s16>) = COPY $v81028 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 4 x s16>)1029 ; RV64-NEXT: PseudoRET implicit $v81030 %0:_(<vscale x 4 x s16>) = COPY $v81031 $v8 = COPY %0(<vscale x 4 x s16>)1032 PseudoRET implicit $v81033 1034...1035---1036name: test_ret_nxv8f161037legalized: true1038tracksRegLiveness: true1039body: |1040 bb.1.entry:1041 liveins: $v81042 ; RV32-LABEL: name: test_ret_nxv8f161043 ; RV32: liveins: $v81044 ; RV32-NEXT: {{ $}}1045 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s16>) = COPY $v81046 ; RV32-NEXT: $v8m2 = COPY [[COPY]](<vscale x 8 x s16>)1047 ; RV32-NEXT: PseudoRET implicit $v8m21048 ;1049 ; RV64-LABEL: name: test_ret_nxv8f161050 ; RV64: liveins: $v81051 ; RV64-NEXT: {{ $}}1052 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s16>) = COPY $v81053 ; RV64-NEXT: $v8m2 = COPY [[COPY]](<vscale x 8 x s16>)1054 ; RV64-NEXT: PseudoRET implicit $v8m21055 %0:_(<vscale x 8 x s16>) = COPY $v81056 $v8m2 = COPY %0(<vscale x 8 x s16>)1057 PseudoRET implicit $v8m21058 1059...1060---1061name: test_ret_nxv16f161062legalized: true1063tracksRegLiveness: true1064body: |1065 bb.1.entry:1066 liveins: $v81067 ; RV32-LABEL: name: test_ret_nxv16f161068 ; RV32: liveins: $v81069 ; RV32-NEXT: {{ $}}1070 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s16>) = COPY $v81071 ; RV32-NEXT: $v8m4 = COPY [[COPY]](<vscale x 16 x s16>)1072 ; RV32-NEXT: PseudoRET implicit $v8m41073 ;1074 ; RV64-LABEL: name: test_ret_nxv16f161075 ; RV64: liveins: $v81076 ; RV64-NEXT: {{ $}}1077 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s16>) = COPY $v81078 ; RV64-NEXT: $v8m4 = COPY [[COPY]](<vscale x 16 x s16>)1079 ; RV64-NEXT: PseudoRET implicit $v8m41080 %0:_(<vscale x 16 x s16>) = COPY $v81081 $v8m4 = COPY %0(<vscale x 16 x s16>)1082 PseudoRET implicit $v8m41083 1084...1085---1086name: test_ret_nxv32f161087legalized: true1088tracksRegLiveness: true1089body: |1090 bb.1.entry:1091 liveins: $v81092 ; RV32-LABEL: name: test_ret_nxv32f161093 ; RV32: liveins: $v81094 ; RV32-NEXT: {{ $}}1095 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 32 x s16>) = COPY $v81096 ; RV32-NEXT: $v8m8 = COPY [[COPY]](<vscale x 32 x s16>)1097 ; RV32-NEXT: PseudoRET implicit $v8m81098 ;1099 ; RV64-LABEL: name: test_ret_nxv32f161100 ; RV64: liveins: $v81101 ; RV64-NEXT: {{ $}}1102 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 32 x s16>) = COPY $v81103 ; RV64-NEXT: $v8m8 = COPY [[COPY]](<vscale x 32 x s16>)1104 ; RV64-NEXT: PseudoRET implicit $v8m81105 %0:_(<vscale x 32 x s16>) = COPY $v81106 $v8m8 = COPY %0(<vscale x 32 x s16>)1107 PseudoRET implicit $v8m81108 1109...1110---1111name: test_ret_nxv1b161112legalized: true1113tracksRegLiveness: true1114body: |1115 bb.1.entry:1116 liveins: $v81117 ; RV32-LABEL: name: test_ret_nxv1b161118 ; RV32: liveins: $v81119 ; RV32-NEXT: {{ $}}1120 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s16>) = COPY $v81121 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s16>)1122 ; RV32-NEXT: PseudoRET implicit $v81123 ;1124 ; RV64-LABEL: name: test_ret_nxv1b161125 ; RV64: liveins: $v81126 ; RV64-NEXT: {{ $}}1127 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 1 x s16>) = COPY $v81128 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 1 x s16>)1129 ; RV64-NEXT: PseudoRET implicit $v81130 %0:_(<vscale x 1 x s16>) = COPY $v81131 $v8 = COPY %0(<vscale x 1 x s16>)1132 PseudoRET implicit $v81133 1134...1135---1136name: test_ret_nxv2b161137legalized: true1138tracksRegLiveness: true1139body: |1140 bb.1.entry:1141 liveins: $v81142 ; RV32-LABEL: name: test_ret_nxv2b161143 ; RV32: liveins: $v81144 ; RV32-NEXT: {{ $}}1145 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s16>) = COPY $v81146 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s16>)1147 ; RV32-NEXT: PseudoRET implicit $v81148 ;1149 ; RV64-LABEL: name: test_ret_nxv2b161150 ; RV64: liveins: $v81151 ; RV64-NEXT: {{ $}}1152 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 2 x s16>) = COPY $v81153 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 2 x s16>)1154 ; RV64-NEXT: PseudoRET implicit $v81155 %0:_(<vscale x 2 x s16>) = COPY $v81156 $v8 = COPY %0(<vscale x 2 x s16>)1157 PseudoRET implicit $v81158 1159...1160---1161name: test_ret_nxv4b161162legalized: true1163tracksRegLiveness: true1164body: |1165 bb.1.entry:1166 liveins: $v81167 ; RV32-LABEL: name: test_ret_nxv4b161168 ; RV32: liveins: $v81169 ; RV32-NEXT: {{ $}}1170 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s16>) = COPY $v81171 ; RV32-NEXT: $v8 = COPY [[COPY]](<vscale x 4 x s16>)1172 ; RV32-NEXT: PseudoRET implicit $v81173 ;1174 ; RV64-LABEL: name: test_ret_nxv4b161175 ; RV64: liveins: $v81176 ; RV64-NEXT: {{ $}}1177 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 4 x s16>) = COPY $v81178 ; RV64-NEXT: $v8 = COPY [[COPY]](<vscale x 4 x s16>)1179 ; RV64-NEXT: PseudoRET implicit $v81180 %0:_(<vscale x 4 x s16>) = COPY $v81181 $v8 = COPY %0(<vscale x 4 x s16>)1182 PseudoRET implicit $v81183 1184...1185---1186name: test_ret_nxv8b161187legalized: true1188tracksRegLiveness: true1189body: |1190 bb.1.entry:1191 liveins: $v81192 ; RV32-LABEL: name: test_ret_nxv8b161193 ; RV32: liveins: $v81194 ; RV32-NEXT: {{ $}}1195 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s16>) = COPY $v81196 ; RV32-NEXT: $v8m2 = COPY [[COPY]](<vscale x 8 x s16>)1197 ; RV32-NEXT: PseudoRET implicit $v8m21198 ;1199 ; RV64-LABEL: name: test_ret_nxv8b161200 ; RV64: liveins: $v81201 ; RV64-NEXT: {{ $}}1202 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 8 x s16>) = COPY $v81203 ; RV64-NEXT: $v8m2 = COPY [[COPY]](<vscale x 8 x s16>)1204 ; RV64-NEXT: PseudoRET implicit $v8m21205 %0:_(<vscale x 8 x s16>) = COPY $v81206 $v8m2 = COPY %0(<vscale x 8 x s16>)1207 PseudoRET implicit $v8m21208 1209...1210---1211name: test_ret_nxv16b161212legalized: true1213tracksRegLiveness: true1214body: |1215 bb.1.entry:1216 liveins: $v81217 ; RV32-LABEL: name: test_ret_nxv16b161218 ; RV32: liveins: $v81219 ; RV32-NEXT: {{ $}}1220 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s16>) = COPY $v81221 ; RV32-NEXT: $v8m4 = COPY [[COPY]](<vscale x 16 x s16>)1222 ; RV32-NEXT: PseudoRET implicit $v8m41223 ;1224 ; RV64-LABEL: name: test_ret_nxv16b161225 ; RV64: liveins: $v81226 ; RV64-NEXT: {{ $}}1227 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 16 x s16>) = COPY $v81228 ; RV64-NEXT: $v8m4 = COPY [[COPY]](<vscale x 16 x s16>)1229 ; RV64-NEXT: PseudoRET implicit $v8m41230 %0:_(<vscale x 16 x s16>) = COPY $v81231 $v8m4 = COPY %0(<vscale x 16 x s16>)1232 PseudoRET implicit $v8m41233 1234...1235---1236name: test_ret_nxv32b161237legalized: true1238tracksRegLiveness: true1239body: |1240 bb.1.entry:1241 liveins: $v81242 ; RV32-LABEL: name: test_ret_nxv32b161243 ; RV32: liveins: $v81244 ; RV32-NEXT: {{ $}}1245 ; RV32-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 32 x s16>) = COPY $v81246 ; RV32-NEXT: $v8m8 = COPY [[COPY]](<vscale x 32 x s16>)1247 ; RV32-NEXT: PseudoRET implicit $v8m81248 ;1249 ; RV64-LABEL: name: test_ret_nxv32b161250 ; RV64: liveins: $v81251 ; RV64-NEXT: {{ $}}1252 ; RV64-NEXT: [[COPY:%[0-9]+]]:vrb(<vscale x 32 x s16>) = COPY $v81253 ; RV64-NEXT: $v8m8 = COPY [[COPY]](<vscale x 32 x s16>)1254 ; RV64-NEXT: PseudoRET implicit $v8m81255 %0:_(<vscale x 32 x s16>) = COPY $v81256 $v8m8 = COPY %0(<vscale x 32 x s16>)1257 PseudoRET implicit $v8m81258 1259...1260