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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -global-isel -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefix=RV64I4; RUN: llc -mtriple=riscv64 -global-isel -mattr=+zbb -verify-machineinstrs < %s \5; RUN: | FileCheck %s -check-prefix=RV64ZBB6 7; FIXME: We don't need the shift pair before the beqz for RV64I.8define signext i32 @ctlz_i32(i32 signext %a) nounwind {9; RV64I-LABEL: ctlz_i32:10; RV64I: # %bb.0:11; RV64I-NEXT: sext.w a1, a012; RV64I-NEXT: beqz a1, .LBB0_213; RV64I-NEXT: # %bb.1: # %cond.false14; RV64I-NEXT: addi sp, sp, -1615; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill16; RV64I-NEXT: srliw a1, a0, 117; RV64I-NEXT: lui a2, 34952518; RV64I-NEXT: or a0, a0, a119; RV64I-NEXT: addi a1, a2, 136520; RV64I-NEXT: srliw a2, a0, 221; RV64I-NEXT: or a0, a0, a222; RV64I-NEXT: srliw a2, a0, 423; RV64I-NEXT: or a0, a0, a224; RV64I-NEXT: srliw a2, a0, 825; RV64I-NEXT: or a0, a0, a226; RV64I-NEXT: srliw a2, a0, 1627; RV64I-NEXT: or a0, a0, a228; RV64I-NEXT: srliw a2, a0, 129; RV64I-NEXT: and a1, a2, a130; RV64I-NEXT: lui a2, 20971531; RV64I-NEXT: addi a2, a2, 81932; RV64I-NEXT: sub a0, a0, a133; RV64I-NEXT: srliw a1, a0, 234; RV64I-NEXT: and a0, a0, a235; RV64I-NEXT: and a1, a1, a236; RV64I-NEXT: lui a2, 6168137; RV64I-NEXT: add a0, a1, a038; RV64I-NEXT: sraiw a1, a0, 439; RV64I-NEXT: addw a0, a1, a040; RV64I-NEXT: lui a1, 411241; RV64I-NEXT: addi a2, a2, -24142; RV64I-NEXT: and a0, a0, a243; RV64I-NEXT: addi a1, a1, 25744; RV64I-NEXT: call __muldi345; RV64I-NEXT: srliw a0, a0, 2446; RV64I-NEXT: li a1, 3247; RV64I-NEXT: subw a0, a1, a048; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload49; RV64I-NEXT: addi sp, sp, 1650; RV64I-NEXT: ret51; RV64I-NEXT: .LBB0_2:52; RV64I-NEXT: li a0, 3253; RV64I-NEXT: ret54;55; RV64ZBB-LABEL: ctlz_i32:56; RV64ZBB: # %bb.0:57; RV64ZBB-NEXT: clzw a0, a058; RV64ZBB-NEXT: ret59 %1 = call i32 @llvm.ctlz.i32(i32 %a, i1 false)60 ret i32 %161}62 63define signext i32 @log2_i32(i32 signext %a) nounwind {64; RV64I-LABEL: log2_i32:65; RV64I: # %bb.0:66; RV64I-NEXT: addi sp, sp, -1667; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill68; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill69; RV64I-NEXT: sext.w a1, a070; RV64I-NEXT: li s0, 3171; RV64I-NEXT: beqz a1, .LBB1_272; RV64I-NEXT: # %bb.1: # %cond.false73; RV64I-NEXT: srliw a1, a0, 174; RV64I-NEXT: lui a2, 34952575; RV64I-NEXT: or a0, a0, a176; RV64I-NEXT: addi a1, a2, 136577; RV64I-NEXT: srliw a2, a0, 278; RV64I-NEXT: or a0, a0, a279; RV64I-NEXT: srliw a2, a0, 480; RV64I-NEXT: or a0, a0, a281; RV64I-NEXT: srliw a2, a0, 882; RV64I-NEXT: or a0, a0, a283; RV64I-NEXT: srliw a2, a0, 1684; RV64I-NEXT: or a0, a0, a285; RV64I-NEXT: srliw a2, a0, 186; RV64I-NEXT: and a1, a2, a187; RV64I-NEXT: lui a2, 20971588; RV64I-NEXT: addi a2, a2, 81989; RV64I-NEXT: sub a0, a0, a190; RV64I-NEXT: srliw a1, a0, 291; RV64I-NEXT: and a0, a0, a292; RV64I-NEXT: and a1, a1, a293; RV64I-NEXT: lui a2, 6168194; RV64I-NEXT: add a0, a1, a095; RV64I-NEXT: sraiw a1, a0, 496; RV64I-NEXT: addw a0, a1, a097; RV64I-NEXT: lui a1, 411298; RV64I-NEXT: addi a2, a2, -24199; RV64I-NEXT: and a0, a0, a2100; RV64I-NEXT: addi a1, a1, 257101; RV64I-NEXT: call __muldi3102; RV64I-NEXT: srliw a0, a0, 24103; RV64I-NEXT: li a1, 32104; RV64I-NEXT: sub a0, a1, a0105; RV64I-NEXT: j .LBB1_3106; RV64I-NEXT: .LBB1_2:107; RV64I-NEXT: li a0, 32108; RV64I-NEXT: .LBB1_3: # %cond.end109; RV64I-NEXT: subw a0, s0, a0110; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload111; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload112; RV64I-NEXT: addi sp, sp, 16113; RV64I-NEXT: ret114;115; RV64ZBB-LABEL: log2_i32:116; RV64ZBB: # %bb.0:117; RV64ZBB-NEXT: li a1, 31118; RV64ZBB-NEXT: clzw a0, a0119; RV64ZBB-NEXT: subw a0, a1, a0120; RV64ZBB-NEXT: ret121 %1 = call i32 @llvm.ctlz.i32(i32 %a, i1 false)122 %2 = sub i32 31, %1123 ret i32 %2124}125 126; FIXME: We don't need the shift pair before the beqz for RV64I.127define signext i32 @log2_ceil_i32(i32 signext %a) nounwind {128; RV64I-LABEL: log2_ceil_i32:129; RV64I: # %bb.0:130; RV64I-NEXT: addi sp, sp, -16131; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill132; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill133; RV64I-NEXT: li s0, 32134; RV64I-NEXT: addiw a0, a0, -1135; RV64I-NEXT: li a1, 32136; RV64I-NEXT: beqz a0, .LBB2_2137; RV64I-NEXT: # %bb.1: # %cond.false138; RV64I-NEXT: srliw a1, a0, 1139; RV64I-NEXT: lui a2, 349525140; RV64I-NEXT: or a0, a0, a1141; RV64I-NEXT: addi a1, a2, 1365142; RV64I-NEXT: srliw a2, a0, 2143; RV64I-NEXT: or a0, a0, a2144; RV64I-NEXT: srliw a2, a0, 4145; RV64I-NEXT: or a0, a0, a2146; RV64I-NEXT: srliw a2, a0, 8147; RV64I-NEXT: or a0, a0, a2148; RV64I-NEXT: srliw a2, a0, 16149; RV64I-NEXT: or a0, a0, a2150; RV64I-NEXT: srliw a2, a0, 1151; RV64I-NEXT: and a1, a2, a1152; RV64I-NEXT: lui a2, 209715153; RV64I-NEXT: addi a2, a2, 819154; RV64I-NEXT: sub a0, a0, a1155; RV64I-NEXT: srliw a1, a0, 2156; RV64I-NEXT: and a0, a0, a2157; RV64I-NEXT: and a1, a1, a2158; RV64I-NEXT: lui a2, 61681159; RV64I-NEXT: add a0, a1, a0160; RV64I-NEXT: sraiw a1, a0, 4161; RV64I-NEXT: addw a0, a1, a0162; RV64I-NEXT: lui a1, 4112163; RV64I-NEXT: addi a2, a2, -241164; RV64I-NEXT: and a0, a0, a2165; RV64I-NEXT: addi a1, a1, 257166; RV64I-NEXT: call __muldi3167; RV64I-NEXT: srliw a0, a0, 24168; RV64I-NEXT: li a1, 32169; RV64I-NEXT: sub a1, a1, a0170; RV64I-NEXT: .LBB2_2: # %cond.end171; RV64I-NEXT: subw a0, s0, a1172; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload173; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload174; RV64I-NEXT: addi sp, sp, 16175; RV64I-NEXT: ret176;177; RV64ZBB-LABEL: log2_ceil_i32:178; RV64ZBB: # %bb.0:179; RV64ZBB-NEXT: li a1, 32180; RV64ZBB-NEXT: addi a0, a0, -1181; RV64ZBB-NEXT: clzw a0, a0182; RV64ZBB-NEXT: subw a0, a1, a0183; RV64ZBB-NEXT: ret184 %1 = sub i32 %a, 1185 %2 = call i32 @llvm.ctlz.i32(i32 %1, i1 false)186 %3 = sub i32 32, %2187 ret i32 %3188}189 190define signext i32 @findLastSet_i32(i32 signext %a) nounwind {191; RV64I-LABEL: findLastSet_i32:192; RV64I: # %bb.0:193; RV64I-NEXT: addi sp, sp, -16194; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill195; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill196; RV64I-NEXT: mv s0, a0197; RV64I-NEXT: srliw a0, a0, 1198; RV64I-NEXT: lui a1, 349525199; RV64I-NEXT: or a0, s0, a0200; RV64I-NEXT: addi a1, a1, 1365201; RV64I-NEXT: srliw a2, a0, 2202; RV64I-NEXT: or a0, a0, a2203; RV64I-NEXT: srliw a2, a0, 4204; RV64I-NEXT: or a0, a0, a2205; RV64I-NEXT: srliw a2, a0, 8206; RV64I-NEXT: or a0, a0, a2207; RV64I-NEXT: srliw a2, a0, 16208; RV64I-NEXT: or a0, a0, a2209; RV64I-NEXT: srliw a2, a0, 1210; RV64I-NEXT: and a1, a2, a1211; RV64I-NEXT: lui a2, 209715212; RV64I-NEXT: addi a2, a2, 819213; RV64I-NEXT: sub a0, a0, a1214; RV64I-NEXT: srliw a1, a0, 2215; RV64I-NEXT: and a0, a0, a2216; RV64I-NEXT: and a1, a1, a2217; RV64I-NEXT: lui a2, 61681218; RV64I-NEXT: add a0, a1, a0219; RV64I-NEXT: sraiw a1, a0, 4220; RV64I-NEXT: addw a0, a1, a0221; RV64I-NEXT: lui a1, 4112222; RV64I-NEXT: addi a2, a2, -241223; RV64I-NEXT: and a0, a0, a2224; RV64I-NEXT: addi a1, a1, 257225; RV64I-NEXT: call __muldi3226; RV64I-NEXT: beqz s0, .LBB3_2227; RV64I-NEXT: # %bb.1:228; RV64I-NEXT: srliw a0, a0, 24229; RV64I-NEXT: li a1, 32230; RV64I-NEXT: subw a1, a1, a0231; RV64I-NEXT: xori a0, a1, 31232; RV64I-NEXT: j .LBB3_3233; RV64I-NEXT: .LBB3_2:234; RV64I-NEXT: li a0, -1235; RV64I-NEXT: .LBB3_3:236; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload237; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload238; RV64I-NEXT: addi sp, sp, 16239; RV64I-NEXT: ret240;241; RV64ZBB-LABEL: findLastSet_i32:242; RV64ZBB: # %bb.0:243; RV64ZBB-NEXT: beqz a0, .LBB3_2244; RV64ZBB-NEXT: # %bb.1:245; RV64ZBB-NEXT: clzw a0, a0246; RV64ZBB-NEXT: xori a0, a0, 31247; RV64ZBB-NEXT: ret248; RV64ZBB-NEXT: .LBB3_2:249; RV64ZBB-NEXT: li a0, -1250; RV64ZBB-NEXT: ret251 %1 = call i32 @llvm.ctlz.i32(i32 %a, i1 true)252 %2 = xor i32 31, %1253 %3 = icmp eq i32 %a, 0254 %4 = select i1 %3, i32 -1, i32 %2255 ret i32 %4256}257 258define i32 @ctlz_lshr_i32(i32 signext %a) {259; RV64I-LABEL: ctlz_lshr_i32:260; RV64I: # %bb.0:261; RV64I-NEXT: srliw a1, a0, 1262; RV64I-NEXT: beqz a1, .LBB4_2263; RV64I-NEXT: # %bb.1: # %cond.false264; RV64I-NEXT: addi sp, sp, -16265; RV64I-NEXT: .cfi_def_cfa_offset 16266; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill267; RV64I-NEXT: .cfi_offset ra, -8268; RV64I-NEXT: srliw a0, a0, 2269; RV64I-NEXT: lui a2, 349525270; RV64I-NEXT: or a0, a1, a0271; RV64I-NEXT: addi a1, a2, 1365272; RV64I-NEXT: srli a2, a0, 2273; RV64I-NEXT: or a0, a0, a2274; RV64I-NEXT: srli a2, a0, 4275; RV64I-NEXT: or a0, a0, a2276; RV64I-NEXT: srliw a2, a0, 8277; RV64I-NEXT: or a0, a0, a2278; RV64I-NEXT: srliw a2, a0, 16279; RV64I-NEXT: or a0, a0, a2280; RV64I-NEXT: srliw a2, a0, 1281; RV64I-NEXT: and a1, a2, a1282; RV64I-NEXT: lui a2, 209715283; RV64I-NEXT: addi a2, a2, 819284; RV64I-NEXT: sub a0, a0, a1285; RV64I-NEXT: srliw a1, a0, 2286; RV64I-NEXT: and a0, a0, a2287; RV64I-NEXT: and a1, a1, a2288; RV64I-NEXT: lui a2, 61681289; RV64I-NEXT: add a0, a1, a0290; RV64I-NEXT: sraiw a1, a0, 4291; RV64I-NEXT: addw a0, a1, a0292; RV64I-NEXT: lui a1, 4112293; RV64I-NEXT: addi a2, a2, -241294; RV64I-NEXT: and a0, a0, a2295; RV64I-NEXT: addi a1, a1, 257296; RV64I-NEXT: call __muldi3297; RV64I-NEXT: srliw a0, a0, 24298; RV64I-NEXT: li a1, 32299; RV64I-NEXT: subw a0, a1, a0300; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload301; RV64I-NEXT: .cfi_restore ra302; RV64I-NEXT: addi sp, sp, 16303; RV64I-NEXT: .cfi_def_cfa_offset 0304; RV64I-NEXT: ret305; RV64I-NEXT: .LBB4_2:306; RV64I-NEXT: li a0, 32307; RV64I-NEXT: ret308;309; RV64ZBB-LABEL: ctlz_lshr_i32:310; RV64ZBB: # %bb.0:311; RV64ZBB-NEXT: srliw a0, a0, 1312; RV64ZBB-NEXT: clzw a0, a0313; RV64ZBB-NEXT: ret314 %1 = lshr i32 %a, 1315 %2 = call i32 @llvm.ctlz.i32(i32 %1, i1 false)316 ret i32 %2317}318 319define i64 @ctlz_i64(i64 %a) nounwind {320; RV64I-LABEL: ctlz_i64:321; RV64I: # %bb.0:322; RV64I-NEXT: beqz a0, .LBB5_2323; RV64I-NEXT: # %bb.1: # %cond.false324; RV64I-NEXT: srli a1, a0, 1325; RV64I-NEXT: lui a2, 21845326; RV64I-NEXT: or a0, a0, a1327; RV64I-NEXT: addi a1, a2, 1365328; RV64I-NEXT: srli a2, a0, 2329; RV64I-NEXT: slli a1, a1, 12330; RV64I-NEXT: or a0, a0, a2331; RV64I-NEXT: addi a1, a1, 1365332; RV64I-NEXT: srli a2, a0, 4333; RV64I-NEXT: slli a1, a1, 12334; RV64I-NEXT: or a0, a0, a2335; RV64I-NEXT: addi a1, a1, 1365336; RV64I-NEXT: srli a2, a0, 8337; RV64I-NEXT: slli a1, a1, 12338; RV64I-NEXT: or a0, a0, a2339; RV64I-NEXT: addi a1, a1, 1365340; RV64I-NEXT: srli a2, a0, 16341; RV64I-NEXT: or a0, a0, a2342; RV64I-NEXT: srli a2, a0, 32343; RV64I-NEXT: or a0, a0, a2344; RV64I-NEXT: srli a2, a0, 1345; RV64I-NEXT: and a1, a2, a1346; RV64I-NEXT: lui a2, 13107347; RV64I-NEXT: addi a2, a2, 819348; RV64I-NEXT: slli a2, a2, 12349; RV64I-NEXT: addi a2, a2, 819350; RV64I-NEXT: slli a2, a2, 12351; RV64I-NEXT: addi a2, a2, 819352; RV64I-NEXT: slli a2, a2, 12353; RV64I-NEXT: addi a2, a2, 819354; RV64I-NEXT: sub a0, a0, a1355; RV64I-NEXT: srli a1, a0, 2356; RV64I-NEXT: and a0, a0, a2357; RV64I-NEXT: and a1, a1, a2358; RV64I-NEXT: lui a2, 3855359; RV64I-NEXT: addi a2, a2, 241360; RV64I-NEXT: slli a2, a2, 12361; RV64I-NEXT: addi a2, a2, -241362; RV64I-NEXT: slli a2, a2, 12363; RV64I-NEXT: addi a2, a2, 241364; RV64I-NEXT: slli a2, a2, 12365; RV64I-NEXT: addi a2, a2, -241366; RV64I-NEXT: add a0, a1, a0367; RV64I-NEXT: srli a1, a0, 4368; RV64I-NEXT: add a0, a1, a0369; RV64I-NEXT: and a0, a0, a2370; RV64I-NEXT: slli a1, a0, 8371; RV64I-NEXT: add a0, a0, a1372; RV64I-NEXT: slli a1, a0, 16373; RV64I-NEXT: add a0, a0, a1374; RV64I-NEXT: slli a1, a0, 32375; RV64I-NEXT: add a0, a0, a1376; RV64I-NEXT: srli a0, a0, 56377; RV64I-NEXT: li a1, 64378; RV64I-NEXT: sub a0, a1, a0379; RV64I-NEXT: ret380; RV64I-NEXT: .LBB5_2:381; RV64I-NEXT: li a0, 64382; RV64I-NEXT: ret383;384; RV64ZBB-LABEL: ctlz_i64:385; RV64ZBB: # %bb.0:386; RV64ZBB-NEXT: clz a0, a0387; RV64ZBB-NEXT: ret388 %1 = call i64 @llvm.ctlz.i64(i64 %a, i1 false)389 ret i64 %1390}391 392define signext i32 @cttz_i32(i32 signext %a) nounwind {393; RV64I-LABEL: cttz_i32:394; RV64I: # %bb.0:395; RV64I-NEXT: sext.w a1, a0396; RV64I-NEXT: beqz a1, .LBB6_2397; RV64I-NEXT: # %bb.1: # %cond.false398; RV64I-NEXT: addi sp, sp, -16399; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill400; RV64I-NEXT: not a1, a0401; RV64I-NEXT: addi a0, a0, -1402; RV64I-NEXT: lui a2, 349525403; RV64I-NEXT: and a0, a1, a0404; RV64I-NEXT: addi a1, a2, 1365405; RV64I-NEXT: srliw a2, a0, 1406; RV64I-NEXT: and a1, a2, a1407; RV64I-NEXT: lui a2, 209715408; RV64I-NEXT: addi a2, a2, 819409; RV64I-NEXT: sub a0, a0, a1410; RV64I-NEXT: srliw a1, a0, 2411; RV64I-NEXT: and a0, a0, a2412; RV64I-NEXT: and a1, a1, a2413; RV64I-NEXT: lui a2, 61681414; RV64I-NEXT: add a0, a1, a0415; RV64I-NEXT: sraiw a1, a0, 4416; RV64I-NEXT: addw a0, a1, a0417; RV64I-NEXT: lui a1, 4112418; RV64I-NEXT: addi a2, a2, -241419; RV64I-NEXT: and a0, a0, a2420; RV64I-NEXT: addi a1, a1, 257421; RV64I-NEXT: call __muldi3422; RV64I-NEXT: srliw a0, a0, 24423; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload424; RV64I-NEXT: addi sp, sp, 16425; RV64I-NEXT: ret426; RV64I-NEXT: .LBB6_2:427; RV64I-NEXT: li a0, 32428; RV64I-NEXT: ret429;430; RV64ZBB-LABEL: cttz_i32:431; RV64ZBB: # %bb.0:432; RV64ZBB-NEXT: ctzw a0, a0433; RV64ZBB-NEXT: ret434 %1 = call i32 @llvm.cttz.i32(i32 %a, i1 false)435 ret i32 %1436}437 438define signext i32 @cttz_zero_undef_i32(i32 signext %a) nounwind {439; RV64I-LABEL: cttz_zero_undef_i32:440; RV64I: # %bb.0:441; RV64I-NEXT: addi sp, sp, -16442; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill443; RV64I-NEXT: not a1, a0444; RV64I-NEXT: addi a0, a0, -1445; RV64I-NEXT: lui a2, 349525446; RV64I-NEXT: and a0, a1, a0447; RV64I-NEXT: addi a1, a2, 1365448; RV64I-NEXT: srliw a2, a0, 1449; RV64I-NEXT: and a1, a2, a1450; RV64I-NEXT: lui a2, 209715451; RV64I-NEXT: addi a2, a2, 819452; RV64I-NEXT: sub a0, a0, a1453; RV64I-NEXT: srliw a1, a0, 2454; RV64I-NEXT: and a0, a0, a2455; RV64I-NEXT: and a1, a1, a2456; RV64I-NEXT: lui a2, 61681457; RV64I-NEXT: add a0, a1, a0458; RV64I-NEXT: sraiw a1, a0, 4459; RV64I-NEXT: addw a0, a1, a0460; RV64I-NEXT: lui a1, 4112461; RV64I-NEXT: addi a2, a2, -241462; RV64I-NEXT: and a0, a0, a2463; RV64I-NEXT: addi a1, a1, 257464; RV64I-NEXT: call __muldi3465; RV64I-NEXT: srliw a0, a0, 24466; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload467; RV64I-NEXT: addi sp, sp, 16468; RV64I-NEXT: ret469;470; RV64ZBB-LABEL: cttz_zero_undef_i32:471; RV64ZBB: # %bb.0:472; RV64ZBB-NEXT: ctzw a0, a0473; RV64ZBB-NEXT: ret474 %1 = call i32 @llvm.cttz.i32(i32 %a, i1 true)475 ret i32 %1476}477 478define signext i32 @findFirstSet_i32(i32 signext %a) nounwind {479; RV64I-LABEL: findFirstSet_i32:480; RV64I: # %bb.0:481; RV64I-NEXT: addi sp, sp, -16482; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill483; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill484; RV64I-NEXT: mv s0, a0485; RV64I-NEXT: not a0, a0486; RV64I-NEXT: addi a1, s0, -1487; RV64I-NEXT: lui a2, 349525488; RV64I-NEXT: and a0, a0, a1489; RV64I-NEXT: addi a1, a2, 1365490; RV64I-NEXT: srliw a2, a0, 1491; RV64I-NEXT: and a1, a2, a1492; RV64I-NEXT: lui a2, 209715493; RV64I-NEXT: addi a2, a2, 819494; RV64I-NEXT: sub a0, a0, a1495; RV64I-NEXT: srliw a1, a0, 2496; RV64I-NEXT: and a0, a0, a2497; RV64I-NEXT: and a1, a1, a2498; RV64I-NEXT: lui a2, 61681499; RV64I-NEXT: add a0, a1, a0500; RV64I-NEXT: sraiw a1, a0, 4501; RV64I-NEXT: addw a0, a1, a0502; RV64I-NEXT: lui a1, 4112503; RV64I-NEXT: addi a2, a2, -241504; RV64I-NEXT: and a0, a0, a2505; RV64I-NEXT: addi a1, a1, 257506; RV64I-NEXT: call __muldi3507; RV64I-NEXT: beqz s0, .LBB8_2508; RV64I-NEXT: # %bb.1:509; RV64I-NEXT: srliw a0, a0, 24510; RV64I-NEXT: j .LBB8_3511; RV64I-NEXT: .LBB8_2:512; RV64I-NEXT: li a0, -1513; RV64I-NEXT: .LBB8_3:514; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload515; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload516; RV64I-NEXT: addi sp, sp, 16517; RV64I-NEXT: ret518;519; RV64ZBB-LABEL: findFirstSet_i32:520; RV64ZBB: # %bb.0:521; RV64ZBB-NEXT: beqz a0, .LBB8_2522; RV64ZBB-NEXT: # %bb.1:523; RV64ZBB-NEXT: ctzw a0, a0524; RV64ZBB-NEXT: ret525; RV64ZBB-NEXT: .LBB8_2:526; RV64ZBB-NEXT: li a0, -1527; RV64ZBB-NEXT: ret528 %1 = call i32 @llvm.cttz.i32(i32 %a, i1 true)529 %2 = icmp eq i32 %a, 0530 %3 = select i1 %2, i32 -1, i32 %1531 ret i32 %3532}533 534define signext i32 @ffs_i32(i32 signext %a) nounwind {535; RV64I-LABEL: ffs_i32:536; RV64I: # %bb.0:537; RV64I-NEXT: addi sp, sp, -16538; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill539; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill540; RV64I-NEXT: mv s0, a0541; RV64I-NEXT: not a0, a0542; RV64I-NEXT: addi a1, s0, -1543; RV64I-NEXT: lui a2, 349525544; RV64I-NEXT: and a0, a0, a1545; RV64I-NEXT: addi a1, a2, 1365546; RV64I-NEXT: srliw a2, a0, 1547; RV64I-NEXT: and a1, a2, a1548; RV64I-NEXT: lui a2, 209715549; RV64I-NEXT: addi a2, a2, 819550; RV64I-NEXT: sub a0, a0, a1551; RV64I-NEXT: srliw a1, a0, 2552; RV64I-NEXT: and a0, a0, a2553; RV64I-NEXT: and a1, a1, a2554; RV64I-NEXT: lui a2, 61681555; RV64I-NEXT: add a0, a1, a0556; RV64I-NEXT: sraiw a1, a0, 4557; RV64I-NEXT: addw a0, a1, a0558; RV64I-NEXT: lui a1, 4112559; RV64I-NEXT: addi a2, a2, -241560; RV64I-NEXT: and a0, a0, a2561; RV64I-NEXT: addi a1, a1, 257562; RV64I-NEXT: call __muldi3563; RV64I-NEXT: mv a1, a0564; RV64I-NEXT: li a0, 0565; RV64I-NEXT: beqz s0, .LBB9_2566; RV64I-NEXT: # %bb.1:567; RV64I-NEXT: srliw a0, a1, 24568; RV64I-NEXT: addiw a0, a0, 1569; RV64I-NEXT: .LBB9_2:570; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload571; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload572; RV64I-NEXT: addi sp, sp, 16573; RV64I-NEXT: ret574;575; RV64ZBB-LABEL: ffs_i32:576; RV64ZBB: # %bb.0:577; RV64ZBB-NEXT: mv a1, a0578; RV64ZBB-NEXT: li a0, 0579; RV64ZBB-NEXT: beqz a1, .LBB9_2580; RV64ZBB-NEXT: # %bb.1:581; RV64ZBB-NEXT: ctzw a0, a1582; RV64ZBB-NEXT: addiw a0, a0, 1583; RV64ZBB-NEXT: .LBB9_2:584; RV64ZBB-NEXT: ret585 %1 = call i32 @llvm.cttz.i32(i32 %a, i1 true)586 %2 = add i32 %1, 1587 %3 = icmp eq i32 %a, 0588 %4 = select i1 %3, i32 0, i32 %2589 ret i32 %4590}591 592define i64 @cttz_i64(i64 %a) nounwind {593; RV64I-LABEL: cttz_i64:594; RV64I: # %bb.0:595; RV64I-NEXT: beqz a0, .LBB10_2596; RV64I-NEXT: # %bb.1: # %cond.false597; RV64I-NEXT: not a1, a0598; RV64I-NEXT: addi a0, a0, -1599; RV64I-NEXT: lui a2, 21845600; RV64I-NEXT: and a0, a1, a0601; RV64I-NEXT: addi a1, a2, 1365602; RV64I-NEXT: srli a2, a0, 1603; RV64I-NEXT: slli a1, a1, 12604; RV64I-NEXT: addi a1, a1, 1365605; RV64I-NEXT: slli a1, a1, 12606; RV64I-NEXT: addi a1, a1, 1365607; RV64I-NEXT: slli a1, a1, 12608; RV64I-NEXT: addi a1, a1, 1365609; RV64I-NEXT: and a1, a2, a1610; RV64I-NEXT: lui a2, 13107611; RV64I-NEXT: addi a2, a2, 819612; RV64I-NEXT: slli a2, a2, 12613; RV64I-NEXT: addi a2, a2, 819614; RV64I-NEXT: slli a2, a2, 12615; RV64I-NEXT: addi a2, a2, 819616; RV64I-NEXT: slli a2, a2, 12617; RV64I-NEXT: addi a2, a2, 819618; RV64I-NEXT: sub a0, a0, a1619; RV64I-NEXT: srli a1, a0, 2620; RV64I-NEXT: and a0, a0, a2621; RV64I-NEXT: and a1, a1, a2622; RV64I-NEXT: lui a2, 3855623; RV64I-NEXT: addi a2, a2, 241624; RV64I-NEXT: slli a2, a2, 12625; RV64I-NEXT: addi a2, a2, -241626; RV64I-NEXT: slli a2, a2, 12627; RV64I-NEXT: addi a2, a2, 241628; RV64I-NEXT: slli a2, a2, 12629; RV64I-NEXT: add a0, a1, a0630; RV64I-NEXT: srli a1, a0, 4631; RV64I-NEXT: add a0, a1, a0632; RV64I-NEXT: addi a1, a2, -241633; RV64I-NEXT: and a0, a0, a1634; RV64I-NEXT: slli a1, a0, 8635; RV64I-NEXT: add a0, a0, a1636; RV64I-NEXT: slli a1, a0, 16637; RV64I-NEXT: add a0, a0, a1638; RV64I-NEXT: slli a1, a0, 32639; RV64I-NEXT: add a0, a0, a1640; RV64I-NEXT: srli a0, a0, 56641; RV64I-NEXT: ret642; RV64I-NEXT: .LBB10_2:643; RV64I-NEXT: li a0, 64644; RV64I-NEXT: ret645;646; RV64ZBB-LABEL: cttz_i64:647; RV64ZBB: # %bb.0:648; RV64ZBB-NEXT: ctz a0, a0649; RV64ZBB-NEXT: ret650 %1 = call i64 @llvm.cttz.i64(i64 %a, i1 false)651 ret i64 %1652}653 654define signext i32 @ctpop_i32(i32 signext %a) nounwind {655; RV64I-LABEL: ctpop_i32:656; RV64I: # %bb.0:657; RV64I-NEXT: addi sp, sp, -16658; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill659; RV64I-NEXT: srliw a1, a0, 1660; RV64I-NEXT: lui a2, 349525661; RV64I-NEXT: addi a2, a2, 1365662; RV64I-NEXT: and a1, a1, a2663; RV64I-NEXT: lui a2, 209715664; RV64I-NEXT: addi a2, a2, 819665; RV64I-NEXT: sub a0, a0, a1666; RV64I-NEXT: srliw a1, a0, 2667; RV64I-NEXT: and a0, a0, a2668; RV64I-NEXT: and a1, a1, a2669; RV64I-NEXT: lui a2, 61681670; RV64I-NEXT: add a0, a1, a0671; RV64I-NEXT: sraiw a1, a0, 4672; RV64I-NEXT: addw a0, a1, a0673; RV64I-NEXT: lui a1, 4112674; RV64I-NEXT: addi a2, a2, -241675; RV64I-NEXT: and a0, a0, a2676; RV64I-NEXT: addi a1, a1, 257677; RV64I-NEXT: call __muldi3678; RV64I-NEXT: srliw a0, a0, 24679; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload680; RV64I-NEXT: addi sp, sp, 16681; RV64I-NEXT: ret682;683; RV64ZBB-LABEL: ctpop_i32:684; RV64ZBB: # %bb.0:685; RV64ZBB-NEXT: cpopw a0, a0686; RV64ZBB-NEXT: ret687 %1 = call i32 @llvm.ctpop.i32(i32 %a)688 ret i32 %1689}690 691define i1 @ctpop_i32_ult_two(i32 signext %a) nounwind {692; RV64I-LABEL: ctpop_i32_ult_two:693; RV64I: # %bb.0:694; RV64I-NEXT: addiw a1, a0, -1695; RV64I-NEXT: and a0, a0, a1696; RV64I-NEXT: seqz a0, a0697; RV64I-NEXT: ret698;699; RV64ZBB-LABEL: ctpop_i32_ult_two:700; RV64ZBB: # %bb.0:701; RV64ZBB-NEXT: cpopw a0, a0702; RV64ZBB-NEXT: sltiu a0, a0, 2703; RV64ZBB-NEXT: ret704 %1 = call i32 @llvm.ctpop.i32(i32 %a)705 %2 = icmp ult i32 %1, 2706 ret i1 %2707}708 709define signext i32 @ctpop_i32_load(ptr %p) nounwind {710; RV64I-LABEL: ctpop_i32_load:711; RV64I: # %bb.0:712; RV64I-NEXT: addi sp, sp, -16713; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill714; RV64I-NEXT: lwu a0, 0(a0)715; RV64I-NEXT: lui a1, 349525716; RV64I-NEXT: addi a1, a1, 1365717; RV64I-NEXT: srli a2, a0, 1718; RV64I-NEXT: and a1, a2, a1719; RV64I-NEXT: lui a2, 209715720; RV64I-NEXT: addi a2, a2, 819721; RV64I-NEXT: sub a0, a0, a1722; RV64I-NEXT: srliw a1, a0, 2723; RV64I-NEXT: and a0, a0, a2724; RV64I-NEXT: and a1, a1, a2725; RV64I-NEXT: lui a2, 61681726; RV64I-NEXT: add a0, a1, a0727; RV64I-NEXT: sraiw a1, a0, 4728; RV64I-NEXT: addw a0, a1, a0729; RV64I-NEXT: lui a1, 4112730; RV64I-NEXT: addi a2, a2, -241731; RV64I-NEXT: and a0, a0, a2732; RV64I-NEXT: addi a1, a1, 257733; RV64I-NEXT: call __muldi3734; RV64I-NEXT: srliw a0, a0, 24735; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload736; RV64I-NEXT: addi sp, sp, 16737; RV64I-NEXT: ret738;739; RV64ZBB-LABEL: ctpop_i32_load:740; RV64ZBB: # %bb.0:741; RV64ZBB-NEXT: lw a0, 0(a0)742; RV64ZBB-NEXT: cpopw a0, a0743; RV64ZBB-NEXT: ret744 %a = load i32, ptr %p745 %1 = call i32 @llvm.ctpop.i32(i32 %a)746 ret i32 %1747}748 749define i64 @ctpop_i64(i64 %a) nounwind {750; RV64I-LABEL: ctpop_i64:751; RV64I: # %bb.0:752; RV64I-NEXT: srli a1, a0, 1753; RV64I-NEXT: lui a2, 21845754; RV64I-NEXT: addi a2, a2, 1365755; RV64I-NEXT: slli a2, a2, 12756; RV64I-NEXT: addi a2, a2, 1365757; RV64I-NEXT: slli a2, a2, 12758; RV64I-NEXT: addi a2, a2, 1365759; RV64I-NEXT: slli a2, a2, 12760; RV64I-NEXT: addi a2, a2, 1365761; RV64I-NEXT: and a1, a1, a2762; RV64I-NEXT: lui a2, 13107763; RV64I-NEXT: addi a2, a2, 819764; RV64I-NEXT: slli a2, a2, 12765; RV64I-NEXT: addi a2, a2, 819766; RV64I-NEXT: slli a2, a2, 12767; RV64I-NEXT: addi a2, a2, 819768; RV64I-NEXT: slli a2, a2, 12769; RV64I-NEXT: addi a2, a2, 819770; RV64I-NEXT: sub a0, a0, a1771; RV64I-NEXT: srli a1, a0, 2772; RV64I-NEXT: and a0, a0, a2773; RV64I-NEXT: and a1, a1, a2774; RV64I-NEXT: lui a2, 3855775; RV64I-NEXT: addi a2, a2, 241776; RV64I-NEXT: slli a2, a2, 12777; RV64I-NEXT: addi a2, a2, -241778; RV64I-NEXT: slli a2, a2, 12779; RV64I-NEXT: addi a2, a2, 241780; RV64I-NEXT: slli a2, a2, 12781; RV64I-NEXT: add a0, a1, a0782; RV64I-NEXT: srli a1, a0, 4783; RV64I-NEXT: add a0, a1, a0784; RV64I-NEXT: addi a1, a2, -241785; RV64I-NEXT: and a0, a0, a1786; RV64I-NEXT: slli a1, a0, 8787; RV64I-NEXT: add a0, a0, a1788; RV64I-NEXT: slli a1, a0, 16789; RV64I-NEXT: add a0, a0, a1790; RV64I-NEXT: slli a1, a0, 32791; RV64I-NEXT: add a0, a0, a1792; RV64I-NEXT: srli a0, a0, 56793; RV64I-NEXT: ret794;795; RV64ZBB-LABEL: ctpop_i64:796; RV64ZBB: # %bb.0:797; RV64ZBB-NEXT: cpop a0, a0798; RV64ZBB-NEXT: ret799 %1 = call i64 @llvm.ctpop.i64(i64 %a)800 ret i64 %1801}802 803define signext i32 @sextb_i32(i32 signext %a) nounwind {804; RV64I-LABEL: sextb_i32:805; RV64I: # %bb.0:806; RV64I-NEXT: slli a0, a0, 56807; RV64I-NEXT: srai a0, a0, 56808; RV64I-NEXT: ret809;810; RV64ZBB-LABEL: sextb_i32:811; RV64ZBB: # %bb.0:812; RV64ZBB-NEXT: sext.b a0, a0813; RV64ZBB-NEXT: ret814 %shl = shl i32 %a, 24815 %shr = ashr exact i32 %shl, 24816 ret i32 %shr817}818 819define i64 @sextb_i64(i64 %a) nounwind {820; RV64I-LABEL: sextb_i64:821; RV64I: # %bb.0:822; RV64I-NEXT: slli a0, a0, 56823; RV64I-NEXT: srai a0, a0, 56824; RV64I-NEXT: ret825;826; RV64ZBB-LABEL: sextb_i64:827; RV64ZBB: # %bb.0:828; RV64ZBB-NEXT: sext.b a0, a0829; RV64ZBB-NEXT: ret830 %shl = shl i64 %a, 56831 %shr = ashr exact i64 %shl, 56832 ret i64 %shr833}834 835define signext i32 @sexth_i32(i32 signext %a) nounwind {836; RV64I-LABEL: sexth_i32:837; RV64I: # %bb.0:838; RV64I-NEXT: slli a0, a0, 48839; RV64I-NEXT: srai a0, a0, 48840; RV64I-NEXT: ret841;842; RV64ZBB-LABEL: sexth_i32:843; RV64ZBB: # %bb.0:844; RV64ZBB-NEXT: sext.h a0, a0845; RV64ZBB-NEXT: ret846 %shl = shl i32 %a, 16847 %shr = ashr exact i32 %shl, 16848 ret i32 %shr849}850 851define i64 @sexth_i64(i64 %a) nounwind {852; RV64I-LABEL: sexth_i64:853; RV64I: # %bb.0:854; RV64I-NEXT: slli a0, a0, 48855; RV64I-NEXT: srai a0, a0, 48856; RV64I-NEXT: ret857;858; RV64ZBB-LABEL: sexth_i64:859; RV64ZBB: # %bb.0:860; RV64ZBB-NEXT: sext.h a0, a0861; RV64ZBB-NEXT: ret862 %shl = shl i64 %a, 48863 %shr = ashr exact i64 %shl, 48864 ret i64 %shr865}866 867define signext i32 @min_i32(i32 signext %a, i32 signext %b) nounwind {868; RV64I-LABEL: min_i32:869; RV64I: # %bb.0:870; RV64I-NEXT: blt a0, a1, .LBB19_2871; RV64I-NEXT: # %bb.1:872; RV64I-NEXT: mv a0, a1873; RV64I-NEXT: .LBB19_2:874; RV64I-NEXT: sext.w a0, a0875; RV64I-NEXT: ret876;877; RV64ZBB-LABEL: min_i32:878; RV64ZBB: # %bb.0:879; RV64ZBB-NEXT: min a0, a0, a1880; RV64ZBB-NEXT: ret881 %cmp = icmp slt i32 %a, %b882 %cond = select i1 %cmp, i32 %a, i32 %b883 ret i32 %cond884}885 886define i64 @min_i64(i64 %a, i64 %b) nounwind {887; RV64I-LABEL: min_i64:888; RV64I: # %bb.0:889; RV64I-NEXT: blt a0, a1, .LBB20_2890; RV64I-NEXT: # %bb.1:891; RV64I-NEXT: mv a0, a1892; RV64I-NEXT: .LBB20_2:893; RV64I-NEXT: ret894;895; RV64ZBB-LABEL: min_i64:896; RV64ZBB: # %bb.0:897; RV64ZBB-NEXT: min a0, a0, a1898; RV64ZBB-NEXT: ret899 %cmp = icmp slt i64 %a, %b900 %cond = select i1 %cmp, i64 %a, i64 %b901 ret i64 %cond902}903 904define signext i32 @max_i32(i32 signext %a, i32 signext %b) nounwind {905; RV64I-LABEL: max_i32:906; RV64I: # %bb.0:907; RV64I-NEXT: blt a1, a0, .LBB21_2908; RV64I-NEXT: # %bb.1:909; RV64I-NEXT: mv a0, a1910; RV64I-NEXT: .LBB21_2:911; RV64I-NEXT: sext.w a0, a0912; RV64I-NEXT: ret913;914; RV64ZBB-LABEL: max_i32:915; RV64ZBB: # %bb.0:916; RV64ZBB-NEXT: max a0, a0, a1917; RV64ZBB-NEXT: ret918 %cmp = icmp sgt i32 %a, %b919 %cond = select i1 %cmp, i32 %a, i32 %b920 ret i32 %cond921}922 923define i64 @max_i64(i64 %a, i64 %b) nounwind {924; RV64I-LABEL: max_i64:925; RV64I: # %bb.0:926; RV64I-NEXT: blt a1, a0, .LBB22_2927; RV64I-NEXT: # %bb.1:928; RV64I-NEXT: mv a0, a1929; RV64I-NEXT: .LBB22_2:930; RV64I-NEXT: ret931;932; RV64ZBB-LABEL: max_i64:933; RV64ZBB: # %bb.0:934; RV64ZBB-NEXT: max a0, a0, a1935; RV64ZBB-NEXT: ret936 %cmp = icmp sgt i64 %a, %b937 %cond = select i1 %cmp, i64 %a, i64 %b938 ret i64 %cond939}940 941; FIXME: We don't need the shift pairs. The inputs are sign extended, we can942; compare them directly.943define signext i32 @minu_i32(i32 signext %a, i32 signext %b) nounwind {944; RV64I-LABEL: minu_i32:945; RV64I: # %bb.0:946; RV64I-NEXT: bltu a0, a1, .LBB23_2947; RV64I-NEXT: # %bb.1:948; RV64I-NEXT: mv a0, a1949; RV64I-NEXT: .LBB23_2:950; RV64I-NEXT: sext.w a0, a0951; RV64I-NEXT: ret952;953; RV64ZBB-LABEL: minu_i32:954; RV64ZBB: # %bb.0:955; RV64ZBB-NEXT: minu a0, a0, a1956; RV64ZBB-NEXT: ret957 %cmp = icmp ult i32 %a, %b958 %cond = select i1 %cmp, i32 %a, i32 %b959 ret i32 %cond960}961 962define i64 @minu_i64(i64 %a, i64 %b) nounwind {963; RV64I-LABEL: minu_i64:964; RV64I: # %bb.0:965; RV64I-NEXT: bltu a0, a1, .LBB24_2966; RV64I-NEXT: # %bb.1:967; RV64I-NEXT: mv a0, a1968; RV64I-NEXT: .LBB24_2:969; RV64I-NEXT: ret970;971; RV64ZBB-LABEL: minu_i64:972; RV64ZBB: # %bb.0:973; RV64ZBB-NEXT: minu a0, a0, a1974; RV64ZBB-NEXT: ret975 %cmp = icmp ult i64 %a, %b976 %cond = select i1 %cmp, i64 %a, i64 %b977 ret i64 %cond978}979 980; FIXME: We don't need the shift pairs. The inputs are sign extended, we can981; compare them directly.982define signext i32 @maxu_i32(i32 signext %a, i32 signext %b) nounwind {983; RV64I-LABEL: maxu_i32:984; RV64I: # %bb.0:985; RV64I-NEXT: bltu a1, a0, .LBB25_2986; RV64I-NEXT: # %bb.1:987; RV64I-NEXT: mv a0, a1988; RV64I-NEXT: .LBB25_2:989; RV64I-NEXT: sext.w a0, a0990; RV64I-NEXT: ret991;992; RV64ZBB-LABEL: maxu_i32:993; RV64ZBB: # %bb.0:994; RV64ZBB-NEXT: maxu a0, a0, a1995; RV64ZBB-NEXT: ret996 %cmp = icmp ugt i32 %a, %b997 %cond = select i1 %cmp, i32 %a, i32 %b998 ret i32 %cond999}1000 1001define i64 @maxu_i64(i64 %a, i64 %b) nounwind {1002; RV64I-LABEL: maxu_i64:1003; RV64I: # %bb.0:1004; RV64I-NEXT: bltu a1, a0, .LBB26_21005; RV64I-NEXT: # %bb.1:1006; RV64I-NEXT: mv a0, a11007; RV64I-NEXT: .LBB26_2:1008; RV64I-NEXT: ret1009;1010; RV64ZBB-LABEL: maxu_i64:1011; RV64ZBB: # %bb.0:1012; RV64ZBB-NEXT: maxu a0, a0, a11013; RV64ZBB-NEXT: ret1014 %cmp = icmp ugt i64 %a, %b1015 %cond = select i1 %cmp, i64 %a, i64 %b1016 ret i64 %cond1017}1018 1019define i32 @abs_i32(i32 %x) {1020; RV64I-LABEL: abs_i32:1021; RV64I: # %bb.0:1022; RV64I-NEXT: sraiw a1, a0, 311023; RV64I-NEXT: addw a0, a0, a11024; RV64I-NEXT: xor a0, a0, a11025; RV64I-NEXT: ret1026;1027; RV64ZBB-LABEL: abs_i32:1028; RV64ZBB: # %bb.0:1029; RV64ZBB-NEXT: sext.w a0, a01030; RV64ZBB-NEXT: neg a1, a01031; RV64ZBB-NEXT: max a0, a0, a11032; RV64ZBB-NEXT: ret1033 %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true)1034 ret i32 %abs1035}1036 1037; FIXME: sext.w is not needed1038define signext i32 @abs_i32_sext(i32 signext %x) {1039; RV64I-LABEL: abs_i32_sext:1040; RV64I: # %bb.0:1041; RV64I-NEXT: srai a1, a0, 311042; RV64I-NEXT: addw a0, a0, a11043; RV64I-NEXT: xor a0, a0, a11044; RV64I-NEXT: ret1045;1046; RV64ZBB-LABEL: abs_i32_sext:1047; RV64ZBB: # %bb.0:1048; RV64ZBB-NEXT: neg a1, a01049; RV64ZBB-NEXT: max a0, a0, a11050; RV64ZBB-NEXT: sext.w a0, a01051; RV64ZBB-NEXT: ret1052 %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true)1053 ret i32 %abs1054}1055 1056define i64 @abs_i64(i64 %x) {1057; RV64I-LABEL: abs_i64:1058; RV64I: # %bb.0:1059; RV64I-NEXT: srai a1, a0, 631060; RV64I-NEXT: add a0, a0, a11061; RV64I-NEXT: xor a0, a0, a11062; RV64I-NEXT: ret1063;1064; RV64ZBB-LABEL: abs_i64:1065; RV64ZBB: # %bb.0:1066; RV64ZBB-NEXT: neg a1, a01067; RV64ZBB-NEXT: max a0, a0, a11068; RV64ZBB-NEXT: ret1069 %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)1070 ret i64 %abs1071}1072 1073define i32 @zexth_i32(i32 %a) nounwind {1074; RV64I-LABEL: zexth_i32:1075; RV64I: # %bb.0:1076; RV64I-NEXT: slli a0, a0, 481077; RV64I-NEXT: srli a0, a0, 481078; RV64I-NEXT: ret1079;1080; RV64ZBB-LABEL: zexth_i32:1081; RV64ZBB: # %bb.0:1082; RV64ZBB-NEXT: zext.h a0, a01083; RV64ZBB-NEXT: ret1084 %and = and i32 %a, 655351085 ret i32 %and1086}1087 1088define i64 @zexth_i64(i64 %a) nounwind {1089; RV64I-LABEL: zexth_i64:1090; RV64I: # %bb.0:1091; RV64I-NEXT: slli a0, a0, 481092; RV64I-NEXT: srli a0, a0, 481093; RV64I-NEXT: ret1094;1095; RV64ZBB-LABEL: zexth_i64:1096; RV64ZBB: # %bb.0:1097; RV64ZBB-NEXT: zext.h a0, a01098; RV64ZBB-NEXT: ret1099 %and = and i64 %a, 655351100 ret i64 %and1101}1102 1103define signext i32 @bswap_i32(i32 signext %a) nounwind {1104; RV64I-LABEL: bswap_i32:1105; RV64I: # %bb.0:1106; RV64I-NEXT: slliw a1, a0, 241107; RV64I-NEXT: srliw a2, a0, 241108; RV64I-NEXT: lui a3, 161109; RV64I-NEXT: or a1, a2, a11110; RV64I-NEXT: srliw a2, a0, 81111; RV64I-NEXT: addi a3, a3, -2561112; RV64I-NEXT: and a0, a0, a31113; RV64I-NEXT: and a2, a2, a31114; RV64I-NEXT: slliw a0, a0, 81115; RV64I-NEXT: or a1, a1, a21116; RV64I-NEXT: or a0, a1, a01117; RV64I-NEXT: ret1118;1119; RV64ZBB-LABEL: bswap_i32:1120; RV64ZBB: # %bb.0:1121; RV64ZBB-NEXT: rev8 a0, a01122; RV64ZBB-NEXT: srli a0, a0, 321123; RV64ZBB-NEXT: sext.w a0, a01124; RV64ZBB-NEXT: ret1125 %1 = tail call i32 @llvm.bswap.i32(i32 %a)1126 ret i32 %11127}1128 1129; Similar to bswap_i32 but the result is not sign extended.1130define void @bswap_i32_nosext(i32 signext %a, ptr %x) nounwind {1131; RV64I-LABEL: bswap_i32_nosext:1132; RV64I: # %bb.0:1133; RV64I-NEXT: slli a2, a0, 241134; RV64I-NEXT: srliw a3, a0, 241135; RV64I-NEXT: lui a4, 161136; RV64I-NEXT: or a2, a3, a21137; RV64I-NEXT: srliw a3, a0, 81138; RV64I-NEXT: addi a4, a4, -2561139; RV64I-NEXT: and a0, a0, a41140; RV64I-NEXT: and a3, a3, a41141; RV64I-NEXT: slli a0, a0, 81142; RV64I-NEXT: or a2, a2, a31143; RV64I-NEXT: or a0, a2, a01144; RV64I-NEXT: sw a0, 0(a1)1145; RV64I-NEXT: ret1146;1147; RV64ZBB-LABEL: bswap_i32_nosext:1148; RV64ZBB: # %bb.0:1149; RV64ZBB-NEXT: rev8 a0, a01150; RV64ZBB-NEXT: srli a0, a0, 321151; RV64ZBB-NEXT: sw a0, 0(a1)1152; RV64ZBB-NEXT: ret1153 %1 = tail call i32 @llvm.bswap.i32(i32 %a)1154 store i32 %1, ptr %x1155 ret void1156}1157 1158define i64 @bswap_i64(i64 %a) {1159; RV64I-LABEL: bswap_i64:1160; RV64I: # %bb.0:1161; RV64I-NEXT: slli a1, a0, 561162; RV64I-NEXT: srli a2, a0, 561163; RV64I-NEXT: lui a3, 161164; RV64I-NEXT: srli a4, a0, 401165; RV64I-NEXT: or a1, a2, a11166; RV64I-NEXT: lui a2, 40801167; RV64I-NEXT: addi a3, a3, -2561168; RV64I-NEXT: and a4, a4, a31169; RV64I-NEXT: or a1, a1, a41170; RV64I-NEXT: srli a4, a0, 241171; RV64I-NEXT: and a4, a4, a21172; RV64I-NEXT: and a2, a0, a21173; RV64I-NEXT: slli a2, a2, 241174; RV64I-NEXT: or a2, a2, a41175; RV64I-NEXT: lui a4, 10444801176; RV64I-NEXT: and a3, a0, a31177; RV64I-NEXT: slli a3, a3, 401178; RV64I-NEXT: or a1, a1, a31179; RV64I-NEXT: srli a3, a0, 81180; RV64I-NEXT: and a0, a0, a41181; RV64I-NEXT: slli a0, a0, 81182; RV64I-NEXT: or a0, a2, a01183; RV64I-NEXT: or a0, a1, a01184; RV64I-NEXT: and a3, a3, a41185; RV64I-NEXT: or a0, a0, a31186; RV64I-NEXT: ret1187;1188; RV64ZBB-LABEL: bswap_i64:1189; RV64ZBB: # %bb.0:1190; RV64ZBB-NEXT: rev8 a0, a01191; RV64ZBB-NEXT: ret1192 %1 = call i64 @llvm.bswap.i64(i64 %a)1193 ret i64 %11194}1195 1196; This creates a i16->i32 G_ZEXT that we need to be able to select1197define i32 @zext_i16_i32(i1 %z, ptr %x, i32 %y) {1198; RV64I-LABEL: zext_i16_i32:1199; RV64I: # %bb.0:1200; RV64I-NEXT: andi a3, a0, 11201; RV64I-NEXT: bnez a3, .LBB35_21202; RV64I-NEXT: # %bb.1:1203; RV64I-NEXT: mv a0, a21204; RV64I-NEXT: ret1205; RV64I-NEXT: .LBB35_2:1206; RV64I-NEXT: lh a0, 0(a1)1207; RV64I-NEXT: slli a0, a0, 481208; RV64I-NEXT: srli a0, a0, 481209; RV64I-NEXT: ret1210;1211; RV64ZBB-LABEL: zext_i16_i32:1212; RV64ZBB: # %bb.0:1213; RV64ZBB-NEXT: andi a3, a0, 11214; RV64ZBB-NEXT: bnez a3, .LBB35_21215; RV64ZBB-NEXT: # %bb.1:1216; RV64ZBB-NEXT: mv a0, a21217; RV64ZBB-NEXT: ret1218; RV64ZBB-NEXT: .LBB35_2:1219; RV64ZBB-NEXT: lh a0, 0(a1)1220; RV64ZBB-NEXT: zext.h a0, a01221; RV64ZBB-NEXT: ret1222 %w = load i16, ptr %x1223 %a = freeze i16 %w1224 %b = zext i16 %a to i321225 %c = select i1 %z, i32 %b, i32 %y1226 ret i32 %c1227}1228 1229; This creates a i16->i32 G_SEXT that we need to be able to select1230define i32 @sext_i16_i32(i1 %z, ptr %x, i32 %y) {1231; RV64I-LABEL: sext_i16_i32:1232; RV64I: # %bb.0:1233; RV64I-NEXT: andi a3, a0, 11234; RV64I-NEXT: bnez a3, .LBB36_21235; RV64I-NEXT: # %bb.1:1236; RV64I-NEXT: mv a0, a21237; RV64I-NEXT: ret1238; RV64I-NEXT: .LBB36_2:1239; RV64I-NEXT: lh a0, 0(a1)1240; RV64I-NEXT: slli a0, a0, 481241; RV64I-NEXT: srai a0, a0, 481242; RV64I-NEXT: ret1243;1244; RV64ZBB-LABEL: sext_i16_i32:1245; RV64ZBB: # %bb.0:1246; RV64ZBB-NEXT: andi a3, a0, 11247; RV64ZBB-NEXT: bnez a3, .LBB36_21248; RV64ZBB-NEXT: # %bb.1:1249; RV64ZBB-NEXT: mv a0, a21250; RV64ZBB-NEXT: ret1251; RV64ZBB-NEXT: .LBB36_2:1252; RV64ZBB-NEXT: lh a0, 0(a1)1253; RV64ZBB-NEXT: sext.h a0, a01254; RV64ZBB-NEXT: ret1255 %w = load i16, ptr %x1256 %a = freeze i16 %w1257 %b = sext i16 %a to i321258 %c = select i1 %z, i32 %b, i32 %y1259 ret i32 %c1260}1261