74 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh -global-isel \3; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=CHECK,RV32 %s4; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh -global-isel \5; RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=CHECK,RV64 %s6 7define <vscale x 1 x i1> @splat_zero_nxv1i1() {8; CHECK-LABEL: splat_zero_nxv1i1:9; CHECK: # %bb.0:10; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, ma11; CHECK-NEXT: vmclr.m v012; CHECK-NEXT: ret13 ret <vscale x 1 x i1> zeroinitializer14}15 16define <vscale x 2 x i1> @splat_zero_nxv2i1() {17; CHECK-LABEL: splat_zero_nxv2i1:18; CHECK: # %bb.0:19; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, ma20; CHECK-NEXT: vmclr.m v021; CHECK-NEXT: ret22 ret <vscale x 2 x i1> zeroinitializer23}24 25define <vscale x 4 x i1> @splat_zero_nxv4i1() {26; CHECK-LABEL: splat_zero_nxv4i1:27; CHECK: # %bb.0:28; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma29; CHECK-NEXT: vmclr.m v030; CHECK-NEXT: ret31 ret <vscale x 4 x i1> zeroinitializer32}33 34define <vscale x 8 x i1> @splat_zero_nxv8i1() {35; CHECK-LABEL: splat_zero_nxv8i1:36; CHECK: # %bb.0:37; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma38; CHECK-NEXT: vmclr.m v039; CHECK-NEXT: ret40 ret <vscale x 8 x i1> zeroinitializer41}42 43define <vscale x 16 x i1> @splat_zero_nxv16i1() {44; CHECK-LABEL: splat_zero_nxv16i1:45; CHECK: # %bb.0:46; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, ma47; CHECK-NEXT: vmclr.m v048; CHECK-NEXT: ret49 ret <vscale x 16 x i1> zeroinitializer50}51 52define <vscale x 32 x i1> @splat_zero_nxv32i1() {53; CHECK-LABEL: splat_zero_nxv32i1:54; CHECK: # %bb.0:55; CHECK-NEXT: vsetvli a0, zero, e8, m4, ta, ma56; CHECK-NEXT: vmclr.m v057; CHECK-NEXT: ret58 ret <vscale x 32 x i1> zeroinitializer59}60 61define <vscale x 64 x i1> @splat_zero_nxv64i1() {62; CHECK-LABEL: splat_zero_nxv64i1:63; CHECK: # %bb.0:64; CHECK-NEXT: vsetvli a0, zero, e8, m8, ta, ma65; CHECK-NEXT: vmclr.m v066; CHECK-NEXT: ret67 ret <vscale x 64 x i1> zeroinitializer68}69 70 71;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:72; RV32: {{.*}}73; RV64: {{.*}}74