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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32I %s4 5; This test checks that LLVM can do basic stripping and reapplying of branches6; to basic blocks.7 8declare void @test_true()9declare void @test_false()10 11; !0 corresponds to a branch being taken, !1 to not being takne.12!0 = !{!"branch_weights", i32 64, i32 4}13!1 = !{!"branch_weights", i32 4, i32 64}14 15define void @test_bcc_fallthrough_taken(i32 %in) nounwind {16; RV32I-LABEL: test_bcc_fallthrough_taken:17; RV32I: # %bb.0:18; RV32I-NEXT: addi sp, sp, -1619; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill20; RV32I-NEXT: li a1, 4221; RV32I-NEXT: bne a0, a1, .LBB0_322; RV32I-NEXT: # %bb.1: # %true23; RV32I-NEXT: call test_true24; RV32I-NEXT: .LBB0_2: # %true25; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload26; RV32I-NEXT: addi sp, sp, 1627; RV32I-NEXT: ret28; RV32I-NEXT: .LBB0_3: # %false29; RV32I-NEXT: call test_false30; RV32I-NEXT: j .LBB0_231 %tst = icmp eq i32 %in, 4232 br i1 %tst, label %true, label %false, !prof !033 34; Expected layout order is: Entry, TrueBlock, FalseBlock35; Entry->TrueBlock is the common path, which should be taken whenever the36; conditional branch is false.37 38true:39 call void @test_true()40 ret void41 42false:43 call void @test_false()44 ret void45}46 47define void @test_bcc_fallthrough_nottaken(i32 %in) nounwind {48; RV32I-LABEL: test_bcc_fallthrough_nottaken:49; RV32I: # %bb.0:50; RV32I-NEXT: addi sp, sp, -1651; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill52; RV32I-NEXT: li a1, 4253; RV32I-NEXT: beq a0, a1, .LBB1_354; RV32I-NEXT: # %bb.1: # %false55; RV32I-NEXT: call test_false56; RV32I-NEXT: .LBB1_2: # %true57; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload58; RV32I-NEXT: addi sp, sp, 1659; RV32I-NEXT: ret60; RV32I-NEXT: .LBB1_3: # %true61; RV32I-NEXT: call test_true62; RV32I-NEXT: j .LBB1_263 %tst = icmp eq i32 %in, 4264 br i1 %tst, label %true, label %false, !prof !165 66; Expected layout order is: Entry, FalseBlock, TrueBlock67; Entry->FalseBlock is the common path, which should be taken whenever the68; conditional branch is false69 70true:71 call void @test_true()72 ret void73 74false:75 call void @test_false()76 ret void77}78 79; TODO: how can we expand the coverage of the branch analysis functions?80