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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=riscv32 -mattr=+zfbfmin -verify-machineinstrs \3; RUN: -target-abi ilp32f < %s | FileCheck -check-prefixes=CHECK32ZFBFMIN,RV32IZFBFMIN %s4; RUN: llc -mtriple=riscv32 -mattr=+d,+zfbfmin -verify-machineinstrs \5; RUN: -target-abi ilp32d < %s | FileCheck -check-prefixes=CHECK32ZFBFMIN,R32IDZFBFMIN %s6; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs \7; RUN: -target-abi ilp32d < %s | FileCheck -check-prefixes=RV32ID %s8; RUN: llc -mtriple=riscv64 -mattr=+zfbfmin -verify-machineinstrs \9; RUN: -target-abi lp64f < %s | FileCheck -check-prefixes=CHECK64ZFBFMIN,RV64IZFBFMIN %s10; RUN: llc -mtriple=riscv64 -mattr=+d,+zfbfmin -verify-machineinstrs \11; RUN: -target-abi lp64d < %s | FileCheck -check-prefixes=CHECK64ZFBFMIN,RV64IDZFBFMIN %s12; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs \13; RUN: -target-abi lp64d < %s | FileCheck -check-prefixes=RV64ID %s14 15; These tests descend from float-arith.ll, where each function was targeted at16; a particular RISC-V FPU instruction.17 18define i16 @fcvt_si_bf16(bfloat %a) nounwind {19; CHECK32ZFBFMIN-LABEL: fcvt_si_bf16:20; CHECK32ZFBFMIN: # %bb.0:21; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa022; CHECK32ZFBFMIN-NEXT: fcvt.w.s a0, fa5, rtz23; CHECK32ZFBFMIN-NEXT: ret24;25; RV32ID-LABEL: fcvt_si_bf16:26; RV32ID: # %bb.0:27; RV32ID-NEXT: fmv.x.w a0, fa028; RV32ID-NEXT: slli a0, a0, 1629; RV32ID-NEXT: fmv.w.x fa5, a030; RV32ID-NEXT: fcvt.w.s a0, fa5, rtz31; RV32ID-NEXT: ret32;33; CHECK64ZFBFMIN-LABEL: fcvt_si_bf16:34; CHECK64ZFBFMIN: # %bb.0:35; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa036; CHECK64ZFBFMIN-NEXT: fcvt.l.s a0, fa5, rtz37; CHECK64ZFBFMIN-NEXT: ret38;39; RV64ID-LABEL: fcvt_si_bf16:40; RV64ID: # %bb.0:41; RV64ID-NEXT: fmv.x.w a0, fa042; RV64ID-NEXT: slli a0, a0, 1643; RV64ID-NEXT: fmv.w.x fa5, a044; RV64ID-NEXT: fcvt.l.s a0, fa5, rtz45; RV64ID-NEXT: ret46 %1 = fptosi bfloat %a to i1647 ret i16 %148}49 50define i16 @fcvt_si_bf16_sat(bfloat %a) nounwind {51; CHECK32ZFBFMIN-LABEL: fcvt_si_bf16_sat:52; CHECK32ZFBFMIN: # %bb.0: # %start53; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa054; CHECK32ZFBFMIN-NEXT: lui a0, 81510455; CHECK32ZFBFMIN-NEXT: lui a1, 29081656; CHECK32ZFBFMIN-NEXT: fmv.w.x fa4, a057; CHECK32ZFBFMIN-NEXT: feq.s a0, fa5, fa558; CHECK32ZFBFMIN-NEXT: addi a1, a1, -51259; CHECK32ZFBFMIN-NEXT: neg a0, a060; CHECK32ZFBFMIN-NEXT: fmax.s fa5, fa5, fa461; CHECK32ZFBFMIN-NEXT: fmv.w.x fa4, a162; CHECK32ZFBFMIN-NEXT: fmin.s fa5, fa5, fa463; CHECK32ZFBFMIN-NEXT: fcvt.w.s a1, fa5, rtz64; CHECK32ZFBFMIN-NEXT: and a0, a0, a165; CHECK32ZFBFMIN-NEXT: ret66;67; RV32ID-LABEL: fcvt_si_bf16_sat:68; RV32ID: # %bb.0: # %start69; RV32ID-NEXT: fmv.x.w a0, fa070; RV32ID-NEXT: lui a1, 81510471; RV32ID-NEXT: fmv.w.x fa5, a172; RV32ID-NEXT: lui a1, 29081673; RV32ID-NEXT: slli a0, a0, 1674; RV32ID-NEXT: addi a1, a1, -51275; RV32ID-NEXT: fmv.w.x fa4, a076; RV32ID-NEXT: feq.s a0, fa4, fa477; RV32ID-NEXT: fmax.s fa5, fa4, fa578; RV32ID-NEXT: fmv.w.x fa4, a179; RV32ID-NEXT: neg a0, a080; RV32ID-NEXT: fmin.s fa5, fa5, fa481; RV32ID-NEXT: fcvt.w.s a1, fa5, rtz82; RV32ID-NEXT: and a0, a0, a183; RV32ID-NEXT: ret84;85; CHECK64ZFBFMIN-LABEL: fcvt_si_bf16_sat:86; CHECK64ZFBFMIN: # %bb.0: # %start87; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa088; CHECK64ZFBFMIN-NEXT: lui a0, 81510489; CHECK64ZFBFMIN-NEXT: lui a1, 29081690; CHECK64ZFBFMIN-NEXT: fmv.w.x fa4, a091; CHECK64ZFBFMIN-NEXT: feq.s a0, fa5, fa592; CHECK64ZFBFMIN-NEXT: addi a1, a1, -51293; CHECK64ZFBFMIN-NEXT: neg a0, a094; CHECK64ZFBFMIN-NEXT: fmax.s fa5, fa5, fa495; CHECK64ZFBFMIN-NEXT: fmv.w.x fa4, a196; CHECK64ZFBFMIN-NEXT: fmin.s fa5, fa5, fa497; CHECK64ZFBFMIN-NEXT: fcvt.l.s a1, fa5, rtz98; CHECK64ZFBFMIN-NEXT: and a0, a0, a199; CHECK64ZFBFMIN-NEXT: ret100;101; RV64ID-LABEL: fcvt_si_bf16_sat:102; RV64ID: # %bb.0: # %start103; RV64ID-NEXT: fmv.x.w a0, fa0104; RV64ID-NEXT: lui a1, 815104105; RV64ID-NEXT: fmv.w.x fa5, a1106; RV64ID-NEXT: lui a1, 290816107; RV64ID-NEXT: slli a0, a0, 16108; RV64ID-NEXT: addi a1, a1, -512109; RV64ID-NEXT: fmv.w.x fa4, a0110; RV64ID-NEXT: feq.s a0, fa4, fa4111; RV64ID-NEXT: fmax.s fa5, fa4, fa5112; RV64ID-NEXT: fmv.w.x fa4, a1113; RV64ID-NEXT: neg a0, a0114; RV64ID-NEXT: fmin.s fa5, fa5, fa4115; RV64ID-NEXT: fcvt.l.s a1, fa5, rtz116; RV64ID-NEXT: and a0, a0, a1117; RV64ID-NEXT: ret118start:119 %0 = tail call i16 @llvm.fptosi.sat.i16.bf16(bfloat %a)120 ret i16 %0121}122 123define i16 @fcvt_ui_bf16(bfloat %a) nounwind {124; CHECK32ZFBFMIN-LABEL: fcvt_ui_bf16:125; CHECK32ZFBFMIN: # %bb.0:126; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0127; CHECK32ZFBFMIN-NEXT: fcvt.w.s a0, fa5, rtz128; CHECK32ZFBFMIN-NEXT: ret129;130; RV32ID-LABEL: fcvt_ui_bf16:131; RV32ID: # %bb.0:132; RV32ID-NEXT: fmv.x.w a0, fa0133; RV32ID-NEXT: slli a0, a0, 16134; RV32ID-NEXT: fmv.w.x fa5, a0135; RV32ID-NEXT: fcvt.wu.s a0, fa5, rtz136; RV32ID-NEXT: ret137;138; CHECK64ZFBFMIN-LABEL: fcvt_ui_bf16:139; CHECK64ZFBFMIN: # %bb.0:140; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0141; CHECK64ZFBFMIN-NEXT: fcvt.l.s a0, fa5, rtz142; CHECK64ZFBFMIN-NEXT: ret143;144; RV64ID-LABEL: fcvt_ui_bf16:145; RV64ID: # %bb.0:146; RV64ID-NEXT: fmv.x.w a0, fa0147; RV64ID-NEXT: slli a0, a0, 16148; RV64ID-NEXT: fmv.w.x fa5, a0149; RV64ID-NEXT: fcvt.lu.s a0, fa5, rtz150; RV64ID-NEXT: ret151 %1 = fptoui bfloat %a to i16152 ret i16 %1153}154 155define i16 @fcvt_ui_bf16_sat(bfloat %a) nounwind {156; CHECK32ZFBFMIN-LABEL: fcvt_ui_bf16_sat:157; CHECK32ZFBFMIN: # %bb.0: # %start158; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0159; CHECK32ZFBFMIN-NEXT: fmv.w.x fa4, zero160; CHECK32ZFBFMIN-NEXT: lui a0, 292864161; CHECK32ZFBFMIN-NEXT: fmax.s fa5, fa5, fa4162; CHECK32ZFBFMIN-NEXT: addi a0, a0, -256163; CHECK32ZFBFMIN-NEXT: fmv.w.x fa4, a0164; CHECK32ZFBFMIN-NEXT: fmin.s fa5, fa5, fa4165; CHECK32ZFBFMIN-NEXT: fcvt.wu.s a0, fa5, rtz166; CHECK32ZFBFMIN-NEXT: ret167;168; RV32ID-LABEL: fcvt_ui_bf16_sat:169; RV32ID: # %bb.0: # %start170; RV32ID-NEXT: fmv.x.w a0, fa0171; RV32ID-NEXT: fmv.w.x fa5, zero172; RV32ID-NEXT: slli a0, a0, 16173; RV32ID-NEXT: fmv.w.x fa4, a0174; RV32ID-NEXT: lui a0, 292864175; RV32ID-NEXT: addi a0, a0, -256176; RV32ID-NEXT: fmax.s fa5, fa4, fa5177; RV32ID-NEXT: fmv.w.x fa4, a0178; RV32ID-NEXT: fmin.s fa5, fa5, fa4179; RV32ID-NEXT: fcvt.wu.s a0, fa5, rtz180; RV32ID-NEXT: ret181;182; CHECK64ZFBFMIN-LABEL: fcvt_ui_bf16_sat:183; CHECK64ZFBFMIN: # %bb.0: # %start184; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0185; CHECK64ZFBFMIN-NEXT: fmv.w.x fa4, zero186; CHECK64ZFBFMIN-NEXT: lui a0, 292864187; CHECK64ZFBFMIN-NEXT: fmax.s fa5, fa5, fa4188; CHECK64ZFBFMIN-NEXT: addi a0, a0, -256189; CHECK64ZFBFMIN-NEXT: fmv.w.x fa4, a0190; CHECK64ZFBFMIN-NEXT: fmin.s fa5, fa5, fa4191; CHECK64ZFBFMIN-NEXT: fcvt.lu.s a0, fa5, rtz192; CHECK64ZFBFMIN-NEXT: ret193;194; RV64ID-LABEL: fcvt_ui_bf16_sat:195; RV64ID: # %bb.0: # %start196; RV64ID-NEXT: fmv.x.w a0, fa0197; RV64ID-NEXT: fmv.w.x fa5, zero198; RV64ID-NEXT: slli a0, a0, 16199; RV64ID-NEXT: fmv.w.x fa4, a0200; RV64ID-NEXT: lui a0, 292864201; RV64ID-NEXT: addi a0, a0, -256202; RV64ID-NEXT: fmax.s fa5, fa4, fa5203; RV64ID-NEXT: fmv.w.x fa4, a0204; RV64ID-NEXT: fmin.s fa5, fa5, fa4205; RV64ID-NEXT: fcvt.lu.s a0, fa5, rtz206; RV64ID-NEXT: ret207start:208 %0 = tail call i16 @llvm.fptoui.sat.i16.bf16(bfloat %a)209 ret i16 %0210}211 212define i32 @fcvt_w_bf16(bfloat %a) nounwind {213; CHECK32ZFBFMIN-LABEL: fcvt_w_bf16:214; CHECK32ZFBFMIN: # %bb.0:215; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0216; CHECK32ZFBFMIN-NEXT: fcvt.w.s a0, fa5, rtz217; CHECK32ZFBFMIN-NEXT: ret218;219; RV32ID-LABEL: fcvt_w_bf16:220; RV32ID: # %bb.0:221; RV32ID-NEXT: fmv.x.w a0, fa0222; RV32ID-NEXT: slli a0, a0, 16223; RV32ID-NEXT: fmv.w.x fa5, a0224; RV32ID-NEXT: fcvt.w.s a0, fa5, rtz225; RV32ID-NEXT: ret226;227; CHECK64ZFBFMIN-LABEL: fcvt_w_bf16:228; CHECK64ZFBFMIN: # %bb.0:229; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0230; CHECK64ZFBFMIN-NEXT: fcvt.w.s a0, fa5, rtz231; CHECK64ZFBFMIN-NEXT: ret232;233; RV64ID-LABEL: fcvt_w_bf16:234; RV64ID: # %bb.0:235; RV64ID-NEXT: fmv.x.w a0, fa0236; RV64ID-NEXT: slli a0, a0, 16237; RV64ID-NEXT: fmv.w.x fa5, a0238; RV64ID-NEXT: fcvt.l.s a0, fa5, rtz239; RV64ID-NEXT: ret240 %1 = fptosi bfloat %a to i32241 ret i32 %1242}243 244define i32 @fcvt_w_bf16_sat(bfloat %a) nounwind {245; CHECK32ZFBFMIN-LABEL: fcvt_w_bf16_sat:246; CHECK32ZFBFMIN: # %bb.0: # %start247; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0248; CHECK32ZFBFMIN-NEXT: fcvt.w.s a0, fa5, rtz249; CHECK32ZFBFMIN-NEXT: feq.s a1, fa5, fa5250; CHECK32ZFBFMIN-NEXT: seqz a1, a1251; CHECK32ZFBFMIN-NEXT: addi a1, a1, -1252; CHECK32ZFBFMIN-NEXT: and a0, a1, a0253; CHECK32ZFBFMIN-NEXT: ret254;255; RV32ID-LABEL: fcvt_w_bf16_sat:256; RV32ID: # %bb.0: # %start257; RV32ID-NEXT: fmv.x.w a0, fa0258; RV32ID-NEXT: slli a0, a0, 16259; RV32ID-NEXT: fmv.w.x fa5, a0260; RV32ID-NEXT: fcvt.w.s a0, fa5, rtz261; RV32ID-NEXT: feq.s a1, fa5, fa5262; RV32ID-NEXT: seqz a1, a1263; RV32ID-NEXT: addi a1, a1, -1264; RV32ID-NEXT: and a0, a1, a0265; RV32ID-NEXT: ret266;267; CHECK64ZFBFMIN-LABEL: fcvt_w_bf16_sat:268; CHECK64ZFBFMIN: # %bb.0: # %start269; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0270; CHECK64ZFBFMIN-NEXT: fcvt.w.s a0, fa5, rtz271; CHECK64ZFBFMIN-NEXT: feq.s a1, fa5, fa5272; CHECK64ZFBFMIN-NEXT: seqz a1, a1273; CHECK64ZFBFMIN-NEXT: addi a1, a1, -1274; CHECK64ZFBFMIN-NEXT: and a0, a1, a0275; CHECK64ZFBFMIN-NEXT: ret276;277; RV64ID-LABEL: fcvt_w_bf16_sat:278; RV64ID: # %bb.0: # %start279; RV64ID-NEXT: fmv.x.w a0, fa0280; RV64ID-NEXT: slli a0, a0, 16281; RV64ID-NEXT: fmv.w.x fa5, a0282; RV64ID-NEXT: fcvt.w.s a0, fa5, rtz283; RV64ID-NEXT: feq.s a1, fa5, fa5284; RV64ID-NEXT: seqz a1, a1285; RV64ID-NEXT: addi a1, a1, -1286; RV64ID-NEXT: and a0, a1, a0287; RV64ID-NEXT: ret288start:289 %0 = tail call i32 @llvm.fptosi.sat.i32.bf16(bfloat %a)290 ret i32 %0291}292 293define i32 @fcvt_wu_bf16(bfloat %a) nounwind {294; CHECK32ZFBFMIN-LABEL: fcvt_wu_bf16:295; CHECK32ZFBFMIN: # %bb.0:296; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0297; CHECK32ZFBFMIN-NEXT: fcvt.wu.s a0, fa5, rtz298; CHECK32ZFBFMIN-NEXT: ret299;300; RV32ID-LABEL: fcvt_wu_bf16:301; RV32ID: # %bb.0:302; RV32ID-NEXT: fmv.x.w a0, fa0303; RV32ID-NEXT: slli a0, a0, 16304; RV32ID-NEXT: fmv.w.x fa5, a0305; RV32ID-NEXT: fcvt.wu.s a0, fa5, rtz306; RV32ID-NEXT: ret307;308; CHECK64ZFBFMIN-LABEL: fcvt_wu_bf16:309; CHECK64ZFBFMIN: # %bb.0:310; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0311; CHECK64ZFBFMIN-NEXT: fcvt.wu.s a0, fa5, rtz312; CHECK64ZFBFMIN-NEXT: ret313;314; RV64ID-LABEL: fcvt_wu_bf16:315; RV64ID: # %bb.0:316; RV64ID-NEXT: fmv.x.w a0, fa0317; RV64ID-NEXT: slli a0, a0, 16318; RV64ID-NEXT: fmv.w.x fa5, a0319; RV64ID-NEXT: fcvt.lu.s a0, fa5, rtz320; RV64ID-NEXT: ret321 %1 = fptoui bfloat %a to i32322 ret i32 %1323}324 325define i32 @fcvt_wu_bf16_multiple_use(bfloat %x, ptr %y) nounwind {326; CHECK32ZFBFMIN-LABEL: fcvt_wu_bf16_multiple_use:327; CHECK32ZFBFMIN: # %bb.0:328; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0329; CHECK32ZFBFMIN-NEXT: fcvt.wu.s a0, fa5, rtz330; CHECK32ZFBFMIN-NEXT: seqz a1, a0331; CHECK32ZFBFMIN-NEXT: add a0, a0, a1332; CHECK32ZFBFMIN-NEXT: ret333;334; RV32ID-LABEL: fcvt_wu_bf16_multiple_use:335; RV32ID: # %bb.0:336; RV32ID-NEXT: fmv.x.w a0, fa0337; RV32ID-NEXT: slli a0, a0, 16338; RV32ID-NEXT: fmv.w.x fa5, a0339; RV32ID-NEXT: fcvt.wu.s a0, fa5, rtz340; RV32ID-NEXT: seqz a1, a0341; RV32ID-NEXT: add a0, a0, a1342; RV32ID-NEXT: ret343;344; CHECK64ZFBFMIN-LABEL: fcvt_wu_bf16_multiple_use:345; CHECK64ZFBFMIN: # %bb.0:346; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0347; CHECK64ZFBFMIN-NEXT: fcvt.wu.s a0, fa5, rtz348; CHECK64ZFBFMIN-NEXT: seqz a1, a0349; CHECK64ZFBFMIN-NEXT: add a0, a0, a1350; CHECK64ZFBFMIN-NEXT: ret351;352; RV64ID-LABEL: fcvt_wu_bf16_multiple_use:353; RV64ID: # %bb.0:354; RV64ID-NEXT: fmv.x.w a0, fa0355; RV64ID-NEXT: slli a0, a0, 16356; RV64ID-NEXT: fmv.w.x fa5, a0357; RV64ID-NEXT: fcvt.lu.s a0, fa5, rtz358; RV64ID-NEXT: seqz a1, a0359; RV64ID-NEXT: add a0, a0, a1360; RV64ID-NEXT: ret361 %a = fptoui bfloat %x to i32362 %b = icmp eq i32 %a, 0363 %c = select i1 %b, i32 1, i32 %a364 ret i32 %c365}366 367define i32 @fcvt_wu_bf16_sat(bfloat %a) nounwind {368; CHECK32ZFBFMIN-LABEL: fcvt_wu_bf16_sat:369; CHECK32ZFBFMIN: # %bb.0: # %start370; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0371; CHECK32ZFBFMIN-NEXT: fcvt.wu.s a0, fa5, rtz372; CHECK32ZFBFMIN-NEXT: feq.s a1, fa5, fa5373; CHECK32ZFBFMIN-NEXT: seqz a1, a1374; CHECK32ZFBFMIN-NEXT: addi a1, a1, -1375; CHECK32ZFBFMIN-NEXT: and a0, a1, a0376; CHECK32ZFBFMIN-NEXT: ret377;378; RV32ID-LABEL: fcvt_wu_bf16_sat:379; RV32ID: # %bb.0: # %start380; RV32ID-NEXT: fmv.x.w a0, fa0381; RV32ID-NEXT: slli a0, a0, 16382; RV32ID-NEXT: fmv.w.x fa5, a0383; RV32ID-NEXT: fcvt.wu.s a0, fa5, rtz384; RV32ID-NEXT: feq.s a1, fa5, fa5385; RV32ID-NEXT: seqz a1, a1386; RV32ID-NEXT: addi a1, a1, -1387; RV32ID-NEXT: and a0, a1, a0388; RV32ID-NEXT: ret389;390; CHECK64ZFBFMIN-LABEL: fcvt_wu_bf16_sat:391; CHECK64ZFBFMIN: # %bb.0: # %start392; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0393; CHECK64ZFBFMIN-NEXT: fcvt.wu.s a0, fa5, rtz394; CHECK64ZFBFMIN-NEXT: feq.s a1, fa5, fa5395; CHECK64ZFBFMIN-NEXT: seqz a1, a1396; CHECK64ZFBFMIN-NEXT: addi a1, a1, -1397; CHECK64ZFBFMIN-NEXT: and a0, a0, a1398; CHECK64ZFBFMIN-NEXT: slli a0, a0, 32399; CHECK64ZFBFMIN-NEXT: srli a0, a0, 32400; CHECK64ZFBFMIN-NEXT: ret401;402; RV64ID-LABEL: fcvt_wu_bf16_sat:403; RV64ID: # %bb.0: # %start404; RV64ID-NEXT: fmv.x.w a0, fa0405; RV64ID-NEXT: slli a0, a0, 16406; RV64ID-NEXT: fmv.w.x fa5, a0407; RV64ID-NEXT: fcvt.wu.s a0, fa5, rtz408; RV64ID-NEXT: feq.s a1, fa5, fa5409; RV64ID-NEXT: seqz a1, a1410; RV64ID-NEXT: addi a1, a1, -1411; RV64ID-NEXT: and a0, a0, a1412; RV64ID-NEXT: slli a0, a0, 32413; RV64ID-NEXT: srli a0, a0, 32414; RV64ID-NEXT: ret415start:416 %0 = tail call i32 @llvm.fptoui.sat.i32.bf16(bfloat %a)417 ret i32 %0418}419 420define i64 @fcvt_l_bf16(bfloat %a) nounwind {421; CHECK32ZFBFMIN-LABEL: fcvt_l_bf16:422; CHECK32ZFBFMIN: # %bb.0:423; CHECK32ZFBFMIN-NEXT: addi sp, sp, -16424; CHECK32ZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill425; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa0, fa0426; CHECK32ZFBFMIN-NEXT: call __fixsfdi427; CHECK32ZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload428; CHECK32ZFBFMIN-NEXT: addi sp, sp, 16429; CHECK32ZFBFMIN-NEXT: ret430;431; RV32ID-LABEL: fcvt_l_bf16:432; RV32ID: # %bb.0:433; RV32ID-NEXT: addi sp, sp, -16434; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill435; RV32ID-NEXT: fmv.x.w a0, fa0436; RV32ID-NEXT: slli a0, a0, 16437; RV32ID-NEXT: fmv.w.x fa0, a0438; RV32ID-NEXT: call __fixsfdi439; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload440; RV32ID-NEXT: addi sp, sp, 16441; RV32ID-NEXT: ret442;443; CHECK64ZFBFMIN-LABEL: fcvt_l_bf16:444; CHECK64ZFBFMIN: # %bb.0:445; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0446; CHECK64ZFBFMIN-NEXT: fcvt.l.s a0, fa5, rtz447; CHECK64ZFBFMIN-NEXT: ret448;449; RV64ID-LABEL: fcvt_l_bf16:450; RV64ID: # %bb.0:451; RV64ID-NEXT: fmv.x.w a0, fa0452; RV64ID-NEXT: slli a0, a0, 16453; RV64ID-NEXT: fmv.w.x fa5, a0454; RV64ID-NEXT: fcvt.l.s a0, fa5, rtz455; RV64ID-NEXT: ret456 %1 = fptosi bfloat %a to i64457 ret i64 %1458}459 460define i64 @fcvt_l_bf16_sat(bfloat %a) nounwind {461; RV32IZFBFMIN-LABEL: fcvt_l_bf16_sat:462; RV32IZFBFMIN: # %bb.0: # %start463; RV32IZFBFMIN-NEXT: addi sp, sp, -16464; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill465; RV32IZFBFMIN-NEXT: sw s0, 8(sp) # 4-byte Folded Spill466; RV32IZFBFMIN-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill467; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fs0, fa0468; RV32IZFBFMIN-NEXT: lui a0, 913408469; RV32IZFBFMIN-NEXT: fmv.w.x fa5, a0470; RV32IZFBFMIN-NEXT: fle.s s0, fa5, fs0471; RV32IZFBFMIN-NEXT: fmv.s fa0, fs0472; RV32IZFBFMIN-NEXT: call __fixsfdi473; RV32IZFBFMIN-NEXT: lui a3, 524288474; RV32IZFBFMIN-NEXT: lui a2, 524288475; RV32IZFBFMIN-NEXT: beqz s0, .LBB10_2476; RV32IZFBFMIN-NEXT: # %bb.1: # %start477; RV32IZFBFMIN-NEXT: mv a2, a1478; RV32IZFBFMIN-NEXT: .LBB10_2: # %start479; RV32IZFBFMIN-NEXT: lui a1, 389120480; RV32IZFBFMIN-NEXT: addi a1, a1, -1481; RV32IZFBFMIN-NEXT: fmv.w.x fa5, a1482; RV32IZFBFMIN-NEXT: flt.s a1, fa5, fs0483; RV32IZFBFMIN-NEXT: beqz a1, .LBB10_4484; RV32IZFBFMIN-NEXT: # %bb.3:485; RV32IZFBFMIN-NEXT: addi a2, a3, -1486; RV32IZFBFMIN-NEXT: .LBB10_4: # %start487; RV32IZFBFMIN-NEXT: feq.s a3, fs0, fs0488; RV32IZFBFMIN-NEXT: neg a4, s0489; RV32IZFBFMIN-NEXT: neg a5, a1490; RV32IZFBFMIN-NEXT: neg a3, a3491; RV32IZFBFMIN-NEXT: and a0, a4, a0492; RV32IZFBFMIN-NEXT: and a1, a3, a2493; RV32IZFBFMIN-NEXT: or a0, a5, a0494; RV32IZFBFMIN-NEXT: and a0, a3, a0495; RV32IZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload496; RV32IZFBFMIN-NEXT: lw s0, 8(sp) # 4-byte Folded Reload497; RV32IZFBFMIN-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload498; RV32IZFBFMIN-NEXT: addi sp, sp, 16499; RV32IZFBFMIN-NEXT: ret500;501; R32IDZFBFMIN-LABEL: fcvt_l_bf16_sat:502; R32IDZFBFMIN: # %bb.0: # %start503; R32IDZFBFMIN-NEXT: addi sp, sp, -16504; R32IDZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill505; R32IDZFBFMIN-NEXT: sw s0, 8(sp) # 4-byte Folded Spill506; R32IDZFBFMIN-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill507; R32IDZFBFMIN-NEXT: fcvt.s.bf16 fs0, fa0508; R32IDZFBFMIN-NEXT: lui a0, 913408509; R32IDZFBFMIN-NEXT: fmv.w.x fa5, a0510; R32IDZFBFMIN-NEXT: fle.s s0, fa5, fs0511; R32IDZFBFMIN-NEXT: fmv.s fa0, fs0512; R32IDZFBFMIN-NEXT: call __fixsfdi513; R32IDZFBFMIN-NEXT: lui a3, 524288514; R32IDZFBFMIN-NEXT: lui a2, 524288515; R32IDZFBFMIN-NEXT: beqz s0, .LBB10_2516; R32IDZFBFMIN-NEXT: # %bb.1: # %start517; R32IDZFBFMIN-NEXT: mv a2, a1518; R32IDZFBFMIN-NEXT: .LBB10_2: # %start519; R32IDZFBFMIN-NEXT: lui a1, 389120520; R32IDZFBFMIN-NEXT: addi a1, a1, -1521; R32IDZFBFMIN-NEXT: fmv.w.x fa5, a1522; R32IDZFBFMIN-NEXT: flt.s a1, fa5, fs0523; R32IDZFBFMIN-NEXT: beqz a1, .LBB10_4524; R32IDZFBFMIN-NEXT: # %bb.3:525; R32IDZFBFMIN-NEXT: addi a2, a3, -1526; R32IDZFBFMIN-NEXT: .LBB10_4: # %start527; R32IDZFBFMIN-NEXT: feq.s a3, fs0, fs0528; R32IDZFBFMIN-NEXT: neg a4, s0529; R32IDZFBFMIN-NEXT: neg a5, a1530; R32IDZFBFMIN-NEXT: neg a3, a3531; R32IDZFBFMIN-NEXT: and a0, a4, a0532; R32IDZFBFMIN-NEXT: and a1, a3, a2533; R32IDZFBFMIN-NEXT: or a0, a5, a0534; R32IDZFBFMIN-NEXT: and a0, a3, a0535; R32IDZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload536; R32IDZFBFMIN-NEXT: lw s0, 8(sp) # 4-byte Folded Reload537; R32IDZFBFMIN-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload538; R32IDZFBFMIN-NEXT: addi sp, sp, 16539; R32IDZFBFMIN-NEXT: ret540;541; RV32ID-LABEL: fcvt_l_bf16_sat:542; RV32ID: # %bb.0: # %start543; RV32ID-NEXT: addi sp, sp, -16544; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill545; RV32ID-NEXT: sw s0, 8(sp) # 4-byte Folded Spill546; RV32ID-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill547; RV32ID-NEXT: fmv.x.w a0, fa0548; RV32ID-NEXT: slli a0, a0, 16549; RV32ID-NEXT: fmv.w.x fs0, a0550; RV32ID-NEXT: lui a0, 913408551; RV32ID-NEXT: fmv.w.x fa5, a0552; RV32ID-NEXT: fle.s s0, fa5, fs0553; RV32ID-NEXT: fmv.s fa0, fs0554; RV32ID-NEXT: call __fixsfdi555; RV32ID-NEXT: lui a3, 524288556; RV32ID-NEXT: lui a2, 524288557; RV32ID-NEXT: beqz s0, .LBB10_2558; RV32ID-NEXT: # %bb.1: # %start559; RV32ID-NEXT: mv a2, a1560; RV32ID-NEXT: .LBB10_2: # %start561; RV32ID-NEXT: lui a1, 389120562; RV32ID-NEXT: addi a1, a1, -1563; RV32ID-NEXT: fmv.w.x fa5, a1564; RV32ID-NEXT: flt.s a1, fa5, fs0565; RV32ID-NEXT: beqz a1, .LBB10_4566; RV32ID-NEXT: # %bb.3:567; RV32ID-NEXT: addi a2, a3, -1568; RV32ID-NEXT: .LBB10_4: # %start569; RV32ID-NEXT: feq.s a3, fs0, fs0570; RV32ID-NEXT: neg a4, a1571; RV32ID-NEXT: neg a1, s0572; RV32ID-NEXT: neg a3, a3573; RV32ID-NEXT: and a0, a1, a0574; RV32ID-NEXT: and a1, a3, a2575; RV32ID-NEXT: or a0, a4, a0576; RV32ID-NEXT: and a0, a3, a0577; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload578; RV32ID-NEXT: lw s0, 8(sp) # 4-byte Folded Reload579; RV32ID-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload580; RV32ID-NEXT: addi sp, sp, 16581; RV32ID-NEXT: ret582;583; CHECK64ZFBFMIN-LABEL: fcvt_l_bf16_sat:584; CHECK64ZFBFMIN: # %bb.0: # %start585; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0586; CHECK64ZFBFMIN-NEXT: fcvt.l.s a0, fa5, rtz587; CHECK64ZFBFMIN-NEXT: feq.s a1, fa5, fa5588; CHECK64ZFBFMIN-NEXT: seqz a1, a1589; CHECK64ZFBFMIN-NEXT: addi a1, a1, -1590; CHECK64ZFBFMIN-NEXT: and a0, a1, a0591; CHECK64ZFBFMIN-NEXT: ret592;593; RV64ID-LABEL: fcvt_l_bf16_sat:594; RV64ID: # %bb.0: # %start595; RV64ID-NEXT: fmv.x.w a0, fa0596; RV64ID-NEXT: slli a0, a0, 16597; RV64ID-NEXT: fmv.w.x fa5, a0598; RV64ID-NEXT: fcvt.l.s a0, fa5, rtz599; RV64ID-NEXT: feq.s a1, fa5, fa5600; RV64ID-NEXT: seqz a1, a1601; RV64ID-NEXT: addi a1, a1, -1602; RV64ID-NEXT: and a0, a1, a0603; RV64ID-NEXT: ret604start:605 %0 = tail call i64 @llvm.fptosi.sat.i64.bf16(bfloat %a)606 ret i64 %0607}608 609define i64 @fcvt_lu_bf16(bfloat %a) nounwind {610; CHECK32ZFBFMIN-LABEL: fcvt_lu_bf16:611; CHECK32ZFBFMIN: # %bb.0:612; CHECK32ZFBFMIN-NEXT: addi sp, sp, -16613; CHECK32ZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill614; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa0, fa0615; CHECK32ZFBFMIN-NEXT: call __fixunssfdi616; CHECK32ZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload617; CHECK32ZFBFMIN-NEXT: addi sp, sp, 16618; CHECK32ZFBFMIN-NEXT: ret619;620; RV32ID-LABEL: fcvt_lu_bf16:621; RV32ID: # %bb.0:622; RV32ID-NEXT: addi sp, sp, -16623; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill624; RV32ID-NEXT: fmv.x.w a0, fa0625; RV32ID-NEXT: slli a0, a0, 16626; RV32ID-NEXT: fmv.w.x fa0, a0627; RV32ID-NEXT: call __fixunssfdi628; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload629; RV32ID-NEXT: addi sp, sp, 16630; RV32ID-NEXT: ret631;632; CHECK64ZFBFMIN-LABEL: fcvt_lu_bf16:633; CHECK64ZFBFMIN: # %bb.0:634; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0635; CHECK64ZFBFMIN-NEXT: fcvt.lu.s a0, fa5, rtz636; CHECK64ZFBFMIN-NEXT: ret637;638; RV64ID-LABEL: fcvt_lu_bf16:639; RV64ID: # %bb.0:640; RV64ID-NEXT: fmv.x.w a0, fa0641; RV64ID-NEXT: slli a0, a0, 16642; RV64ID-NEXT: fmv.w.x fa5, a0643; RV64ID-NEXT: fcvt.lu.s a0, fa5, rtz644; RV64ID-NEXT: ret645 %1 = fptoui bfloat %a to i64646 ret i64 %1647}648 649define i64 @fcvt_lu_bf16_sat(bfloat %a) nounwind {650; RV32IZFBFMIN-LABEL: fcvt_lu_bf16_sat:651; RV32IZFBFMIN: # %bb.0: # %start652; RV32IZFBFMIN-NEXT: addi sp, sp, -16653; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill654; RV32IZFBFMIN-NEXT: sw s0, 8(sp) # 4-byte Folded Spill655; RV32IZFBFMIN-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill656; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fs0, fa0657; RV32IZFBFMIN-NEXT: fmv.w.x fa5, zero658; RV32IZFBFMIN-NEXT: fle.s a0, fa5, fs0659; RV32IZFBFMIN-NEXT: neg s0, a0660; RV32IZFBFMIN-NEXT: fmv.s fa0, fs0661; RV32IZFBFMIN-NEXT: call __fixunssfdi662; RV32IZFBFMIN-NEXT: and a0, s0, a0663; RV32IZFBFMIN-NEXT: lui a2, 391168664; RV32IZFBFMIN-NEXT: and a1, s0, a1665; RV32IZFBFMIN-NEXT: addi a2, a2, -1666; RV32IZFBFMIN-NEXT: fmv.w.x fa5, a2667; RV32IZFBFMIN-NEXT: flt.s a2, fa5, fs0668; RV32IZFBFMIN-NEXT: neg a2, a2669; RV32IZFBFMIN-NEXT: or a0, a2, a0670; RV32IZFBFMIN-NEXT: or a1, a2, a1671; RV32IZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload672; RV32IZFBFMIN-NEXT: lw s0, 8(sp) # 4-byte Folded Reload673; RV32IZFBFMIN-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload674; RV32IZFBFMIN-NEXT: addi sp, sp, 16675; RV32IZFBFMIN-NEXT: ret676;677; R32IDZFBFMIN-LABEL: fcvt_lu_bf16_sat:678; R32IDZFBFMIN: # %bb.0: # %start679; R32IDZFBFMIN-NEXT: addi sp, sp, -16680; R32IDZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill681; R32IDZFBFMIN-NEXT: sw s0, 8(sp) # 4-byte Folded Spill682; R32IDZFBFMIN-NEXT: fsd fs0, 0(sp) # 8-byte Folded Spill683; R32IDZFBFMIN-NEXT: fcvt.s.bf16 fs0, fa0684; R32IDZFBFMIN-NEXT: fmv.w.x fa5, zero685; R32IDZFBFMIN-NEXT: fle.s a0, fa5, fs0686; R32IDZFBFMIN-NEXT: neg s0, a0687; R32IDZFBFMIN-NEXT: fmv.s fa0, fs0688; R32IDZFBFMIN-NEXT: call __fixunssfdi689; R32IDZFBFMIN-NEXT: and a0, s0, a0690; R32IDZFBFMIN-NEXT: lui a2, 391168691; R32IDZFBFMIN-NEXT: and a1, s0, a1692; R32IDZFBFMIN-NEXT: addi a2, a2, -1693; R32IDZFBFMIN-NEXT: fmv.w.x fa5, a2694; R32IDZFBFMIN-NEXT: flt.s a2, fa5, fs0695; R32IDZFBFMIN-NEXT: neg a2, a2696; R32IDZFBFMIN-NEXT: or a0, a2, a0697; R32IDZFBFMIN-NEXT: or a1, a2, a1698; R32IDZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload699; R32IDZFBFMIN-NEXT: lw s0, 8(sp) # 4-byte Folded Reload700; R32IDZFBFMIN-NEXT: fld fs0, 0(sp) # 8-byte Folded Reload701; R32IDZFBFMIN-NEXT: addi sp, sp, 16702; R32IDZFBFMIN-NEXT: ret703;704; RV32ID-LABEL: fcvt_lu_bf16_sat:705; RV32ID: # %bb.0: # %start706; RV32ID-NEXT: addi sp, sp, -16707; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill708; RV32ID-NEXT: sw s0, 8(sp) # 4-byte Folded Spill709; RV32ID-NEXT: sw s1, 4(sp) # 4-byte Folded Spill710; RV32ID-NEXT: fmv.x.w a0, fa0711; RV32ID-NEXT: lui a1, 391168712; RV32ID-NEXT: slli a0, a0, 16713; RV32ID-NEXT: addi a1, a1, -1714; RV32ID-NEXT: fmv.w.x fa0, a0715; RV32ID-NEXT: fmv.w.x fa5, a1716; RV32ID-NEXT: flt.s a0, fa5, fa0717; RV32ID-NEXT: fmv.w.x fa5, zero718; RV32ID-NEXT: fle.s a1, fa5, fa0719; RV32ID-NEXT: neg s0, a0720; RV32ID-NEXT: neg s1, a1721; RV32ID-NEXT: call __fixunssfdi722; RV32ID-NEXT: and a0, s1, a0723; RV32ID-NEXT: and a1, s1, a1724; RV32ID-NEXT: or a0, s0, a0725; RV32ID-NEXT: or a1, s0, a1726; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload727; RV32ID-NEXT: lw s0, 8(sp) # 4-byte Folded Reload728; RV32ID-NEXT: lw s1, 4(sp) # 4-byte Folded Reload729; RV32ID-NEXT: addi sp, sp, 16730; RV32ID-NEXT: ret731;732; CHECK64ZFBFMIN-LABEL: fcvt_lu_bf16_sat:733; CHECK64ZFBFMIN: # %bb.0: # %start734; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0735; CHECK64ZFBFMIN-NEXT: fcvt.lu.s a0, fa5, rtz736; CHECK64ZFBFMIN-NEXT: feq.s a1, fa5, fa5737; CHECK64ZFBFMIN-NEXT: seqz a1, a1738; CHECK64ZFBFMIN-NEXT: addi a1, a1, -1739; CHECK64ZFBFMIN-NEXT: and a0, a1, a0740; CHECK64ZFBFMIN-NEXT: ret741;742; RV64ID-LABEL: fcvt_lu_bf16_sat:743; RV64ID: # %bb.0: # %start744; RV64ID-NEXT: fmv.x.w a0, fa0745; RV64ID-NEXT: slli a0, a0, 16746; RV64ID-NEXT: fmv.w.x fa5, a0747; RV64ID-NEXT: fcvt.lu.s a0, fa5, rtz748; RV64ID-NEXT: feq.s a1, fa5, fa5749; RV64ID-NEXT: seqz a1, a1750; RV64ID-NEXT: addi a1, a1, -1751; RV64ID-NEXT: and a0, a1, a0752; RV64ID-NEXT: ret753start:754 %0 = tail call i64 @llvm.fptoui.sat.i64.bf16(bfloat %a)755 ret i64 %0756}757 758define bfloat @fcvt_bf16_si(i16 %a) nounwind {759; CHECK32ZFBFMIN-LABEL: fcvt_bf16_si:760; CHECK32ZFBFMIN: # %bb.0:761; CHECK32ZFBFMIN-NEXT: slli a0, a0, 16762; CHECK32ZFBFMIN-NEXT: srai a0, a0, 16763; CHECK32ZFBFMIN-NEXT: fcvt.s.w fa5, a0764; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa5765; CHECK32ZFBFMIN-NEXT: ret766;767; RV32ID-LABEL: fcvt_bf16_si:768; RV32ID: # %bb.0:769; RV32ID-NEXT: addi sp, sp, -16770; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill771; RV32ID-NEXT: slli a0, a0, 16772; RV32ID-NEXT: srai a0, a0, 16773; RV32ID-NEXT: fcvt.s.w fa0, a0774; RV32ID-NEXT: call __truncsfbf2775; RV32ID-NEXT: fmv.x.w a0, fa0776; RV32ID-NEXT: lui a1, 1048560777; RV32ID-NEXT: or a0, a0, a1778; RV32ID-NEXT: fmv.w.x fa0, a0779; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload780; RV32ID-NEXT: addi sp, sp, 16781; RV32ID-NEXT: ret782;783; CHECK64ZFBFMIN-LABEL: fcvt_bf16_si:784; CHECK64ZFBFMIN: # %bb.0:785; CHECK64ZFBFMIN-NEXT: slli a0, a0, 48786; CHECK64ZFBFMIN-NEXT: srai a0, a0, 48787; CHECK64ZFBFMIN-NEXT: fcvt.s.w fa5, a0788; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa5789; CHECK64ZFBFMIN-NEXT: ret790;791; RV64ID-LABEL: fcvt_bf16_si:792; RV64ID: # %bb.0:793; RV64ID-NEXT: addi sp, sp, -16794; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill795; RV64ID-NEXT: slli a0, a0, 48796; RV64ID-NEXT: srai a0, a0, 48797; RV64ID-NEXT: fcvt.s.w fa0, a0798; RV64ID-NEXT: call __truncsfbf2799; RV64ID-NEXT: fmv.x.w a0, fa0800; RV64ID-NEXT: lui a1, 1048560801; RV64ID-NEXT: or a0, a0, a1802; RV64ID-NEXT: fmv.w.x fa0, a0803; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload804; RV64ID-NEXT: addi sp, sp, 16805; RV64ID-NEXT: ret806 %1 = sitofp i16 %a to bfloat807 ret bfloat %1808}809 810define bfloat @fcvt_bf16_si_signext(i16 signext %a) nounwind {811; CHECK32ZFBFMIN-LABEL: fcvt_bf16_si_signext:812; CHECK32ZFBFMIN: # %bb.0:813; CHECK32ZFBFMIN-NEXT: fcvt.s.w fa5, a0814; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa5815; CHECK32ZFBFMIN-NEXT: ret816;817; RV32ID-LABEL: fcvt_bf16_si_signext:818; RV32ID: # %bb.0:819; RV32ID-NEXT: addi sp, sp, -16820; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill821; RV32ID-NEXT: fcvt.s.w fa0, a0822; RV32ID-NEXT: call __truncsfbf2823; RV32ID-NEXT: fmv.x.w a0, fa0824; RV32ID-NEXT: lui a1, 1048560825; RV32ID-NEXT: or a0, a0, a1826; RV32ID-NEXT: fmv.w.x fa0, a0827; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload828; RV32ID-NEXT: addi sp, sp, 16829; RV32ID-NEXT: ret830;831; CHECK64ZFBFMIN-LABEL: fcvt_bf16_si_signext:832; CHECK64ZFBFMIN: # %bb.0:833; CHECK64ZFBFMIN-NEXT: fcvt.s.w fa5, a0834; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa5835; CHECK64ZFBFMIN-NEXT: ret836;837; RV64ID-LABEL: fcvt_bf16_si_signext:838; RV64ID: # %bb.0:839; RV64ID-NEXT: addi sp, sp, -16840; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill841; RV64ID-NEXT: fcvt.s.w fa0, a0842; RV64ID-NEXT: call __truncsfbf2843; RV64ID-NEXT: fmv.x.w a0, fa0844; RV64ID-NEXT: lui a1, 1048560845; RV64ID-NEXT: or a0, a0, a1846; RV64ID-NEXT: fmv.w.x fa0, a0847; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload848; RV64ID-NEXT: addi sp, sp, 16849; RV64ID-NEXT: ret850 %1 = sitofp i16 %a to bfloat851 ret bfloat %1852}853 854define bfloat @fcvt_bf16_ui(i16 %a) nounwind {855; CHECK32ZFBFMIN-LABEL: fcvt_bf16_ui:856; CHECK32ZFBFMIN: # %bb.0:857; CHECK32ZFBFMIN-NEXT: slli a0, a0, 16858; CHECK32ZFBFMIN-NEXT: srli a0, a0, 16859; CHECK32ZFBFMIN-NEXT: fcvt.s.wu fa5, a0860; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa5861; CHECK32ZFBFMIN-NEXT: ret862;863; RV32ID-LABEL: fcvt_bf16_ui:864; RV32ID: # %bb.0:865; RV32ID-NEXT: addi sp, sp, -16866; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill867; RV32ID-NEXT: slli a0, a0, 16868; RV32ID-NEXT: srli a0, a0, 16869; RV32ID-NEXT: fcvt.s.wu fa0, a0870; RV32ID-NEXT: call __truncsfbf2871; RV32ID-NEXT: fmv.x.w a0, fa0872; RV32ID-NEXT: lui a1, 1048560873; RV32ID-NEXT: or a0, a0, a1874; RV32ID-NEXT: fmv.w.x fa0, a0875; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload876; RV32ID-NEXT: addi sp, sp, 16877; RV32ID-NEXT: ret878;879; CHECK64ZFBFMIN-LABEL: fcvt_bf16_ui:880; CHECK64ZFBFMIN: # %bb.0:881; CHECK64ZFBFMIN-NEXT: slli a0, a0, 48882; CHECK64ZFBFMIN-NEXT: srli a0, a0, 48883; CHECK64ZFBFMIN-NEXT: fcvt.s.wu fa5, a0884; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa5885; CHECK64ZFBFMIN-NEXT: ret886;887; RV64ID-LABEL: fcvt_bf16_ui:888; RV64ID: # %bb.0:889; RV64ID-NEXT: addi sp, sp, -16890; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill891; RV64ID-NEXT: slli a0, a0, 48892; RV64ID-NEXT: srli a0, a0, 48893; RV64ID-NEXT: fcvt.s.wu fa0, a0894; RV64ID-NEXT: call __truncsfbf2895; RV64ID-NEXT: fmv.x.w a0, fa0896; RV64ID-NEXT: lui a1, 1048560897; RV64ID-NEXT: or a0, a0, a1898; RV64ID-NEXT: fmv.w.x fa0, a0899; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload900; RV64ID-NEXT: addi sp, sp, 16901; RV64ID-NEXT: ret902 %1 = uitofp i16 %a to bfloat903 ret bfloat %1904}905 906define bfloat @fcvt_bf16_ui_zeroext(i16 zeroext %a) nounwind {907; CHECK32ZFBFMIN-LABEL: fcvt_bf16_ui_zeroext:908; CHECK32ZFBFMIN: # %bb.0:909; CHECK32ZFBFMIN-NEXT: fcvt.s.wu fa5, a0910; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa5911; CHECK32ZFBFMIN-NEXT: ret912;913; RV32ID-LABEL: fcvt_bf16_ui_zeroext:914; RV32ID: # %bb.0:915; RV32ID-NEXT: addi sp, sp, -16916; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill917; RV32ID-NEXT: fcvt.s.wu fa0, a0918; RV32ID-NEXT: call __truncsfbf2919; RV32ID-NEXT: fmv.x.w a0, fa0920; RV32ID-NEXT: lui a1, 1048560921; RV32ID-NEXT: or a0, a0, a1922; RV32ID-NEXT: fmv.w.x fa0, a0923; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload924; RV32ID-NEXT: addi sp, sp, 16925; RV32ID-NEXT: ret926;927; CHECK64ZFBFMIN-LABEL: fcvt_bf16_ui_zeroext:928; CHECK64ZFBFMIN: # %bb.0:929; CHECK64ZFBFMIN-NEXT: fcvt.s.wu fa5, a0930; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa5931; CHECK64ZFBFMIN-NEXT: ret932;933; RV64ID-LABEL: fcvt_bf16_ui_zeroext:934; RV64ID: # %bb.0:935; RV64ID-NEXT: addi sp, sp, -16936; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill937; RV64ID-NEXT: fcvt.s.wu fa0, a0938; RV64ID-NEXT: call __truncsfbf2939; RV64ID-NEXT: fmv.x.w a0, fa0940; RV64ID-NEXT: lui a1, 1048560941; RV64ID-NEXT: or a0, a0, a1942; RV64ID-NEXT: fmv.w.x fa0, a0943; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload944; RV64ID-NEXT: addi sp, sp, 16945; RV64ID-NEXT: ret946 %1 = uitofp i16 %a to bfloat947 ret bfloat %1948}949 950define bfloat @fcvt_bf16_w(i32 %a) nounwind {951; CHECK32ZFBFMIN-LABEL: fcvt_bf16_w:952; CHECK32ZFBFMIN: # %bb.0:953; CHECK32ZFBFMIN-NEXT: fcvt.s.w fa5, a0954; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa5955; CHECK32ZFBFMIN-NEXT: ret956;957; RV32ID-LABEL: fcvt_bf16_w:958; RV32ID: # %bb.0:959; RV32ID-NEXT: addi sp, sp, -16960; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill961; RV32ID-NEXT: fcvt.s.w fa0, a0962; RV32ID-NEXT: call __truncsfbf2963; RV32ID-NEXT: fmv.x.w a0, fa0964; RV32ID-NEXT: lui a1, 1048560965; RV32ID-NEXT: or a0, a0, a1966; RV32ID-NEXT: fmv.w.x fa0, a0967; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload968; RV32ID-NEXT: addi sp, sp, 16969; RV32ID-NEXT: ret970;971; CHECK64ZFBFMIN-LABEL: fcvt_bf16_w:972; CHECK64ZFBFMIN: # %bb.0:973; CHECK64ZFBFMIN-NEXT: fcvt.s.w fa5, a0974; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa5975; CHECK64ZFBFMIN-NEXT: ret976;977; RV64ID-LABEL: fcvt_bf16_w:978; RV64ID: # %bb.0:979; RV64ID-NEXT: addi sp, sp, -16980; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill981; RV64ID-NEXT: fcvt.s.w fa0, a0982; RV64ID-NEXT: call __truncsfbf2983; RV64ID-NEXT: fmv.x.w a0, fa0984; RV64ID-NEXT: lui a1, 1048560985; RV64ID-NEXT: or a0, a0, a1986; RV64ID-NEXT: fmv.w.x fa0, a0987; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload988; RV64ID-NEXT: addi sp, sp, 16989; RV64ID-NEXT: ret990 %1 = sitofp i32 %a to bfloat991 ret bfloat %1992}993 994define bfloat @fcvt_bf16_w_load(ptr %p) nounwind {995; CHECK32ZFBFMIN-LABEL: fcvt_bf16_w_load:996; CHECK32ZFBFMIN: # %bb.0:997; CHECK32ZFBFMIN-NEXT: lw a0, 0(a0)998; CHECK32ZFBFMIN-NEXT: fcvt.s.w fa5, a0999; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa51000; CHECK32ZFBFMIN-NEXT: ret1001;1002; RV32ID-LABEL: fcvt_bf16_w_load:1003; RV32ID: # %bb.0:1004; RV32ID-NEXT: addi sp, sp, -161005; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1006; RV32ID-NEXT: lw a0, 0(a0)1007; RV32ID-NEXT: fcvt.s.w fa0, a01008; RV32ID-NEXT: call __truncsfbf21009; RV32ID-NEXT: fmv.x.w a0, fa01010; RV32ID-NEXT: lui a1, 10485601011; RV32ID-NEXT: or a0, a0, a11012; RV32ID-NEXT: fmv.w.x fa0, a01013; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1014; RV32ID-NEXT: addi sp, sp, 161015; RV32ID-NEXT: ret1016;1017; CHECK64ZFBFMIN-LABEL: fcvt_bf16_w_load:1018; CHECK64ZFBFMIN: # %bb.0:1019; CHECK64ZFBFMIN-NEXT: lw a0, 0(a0)1020; CHECK64ZFBFMIN-NEXT: fcvt.s.w fa5, a01021; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa51022; CHECK64ZFBFMIN-NEXT: ret1023;1024; RV64ID-LABEL: fcvt_bf16_w_load:1025; RV64ID: # %bb.0:1026; RV64ID-NEXT: addi sp, sp, -161027; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1028; RV64ID-NEXT: lw a0, 0(a0)1029; RV64ID-NEXT: fcvt.s.w fa0, a01030; RV64ID-NEXT: call __truncsfbf21031; RV64ID-NEXT: fmv.x.w a0, fa01032; RV64ID-NEXT: lui a1, 10485601033; RV64ID-NEXT: or a0, a0, a11034; RV64ID-NEXT: fmv.w.x fa0, a01035; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1036; RV64ID-NEXT: addi sp, sp, 161037; RV64ID-NEXT: ret1038 %a = load i32, ptr %p1039 %1 = sitofp i32 %a to bfloat1040 ret bfloat %11041}1042 1043define bfloat @fcvt_bf16_wu(i32 %a) nounwind {1044; CHECK32ZFBFMIN-LABEL: fcvt_bf16_wu:1045; CHECK32ZFBFMIN: # %bb.0:1046; CHECK32ZFBFMIN-NEXT: fcvt.s.wu fa5, a01047; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa51048; CHECK32ZFBFMIN-NEXT: ret1049;1050; RV32ID-LABEL: fcvt_bf16_wu:1051; RV32ID: # %bb.0:1052; RV32ID-NEXT: addi sp, sp, -161053; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1054; RV32ID-NEXT: fcvt.s.wu fa0, a01055; RV32ID-NEXT: call __truncsfbf21056; RV32ID-NEXT: fmv.x.w a0, fa01057; RV32ID-NEXT: lui a1, 10485601058; RV32ID-NEXT: or a0, a0, a11059; RV32ID-NEXT: fmv.w.x fa0, a01060; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1061; RV32ID-NEXT: addi sp, sp, 161062; RV32ID-NEXT: ret1063;1064; CHECK64ZFBFMIN-LABEL: fcvt_bf16_wu:1065; CHECK64ZFBFMIN: # %bb.0:1066; CHECK64ZFBFMIN-NEXT: fcvt.s.wu fa5, a01067; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa51068; CHECK64ZFBFMIN-NEXT: ret1069;1070; RV64ID-LABEL: fcvt_bf16_wu:1071; RV64ID: # %bb.0:1072; RV64ID-NEXT: addi sp, sp, -161073; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1074; RV64ID-NEXT: fcvt.s.wu fa0, a01075; RV64ID-NEXT: call __truncsfbf21076; RV64ID-NEXT: fmv.x.w a0, fa01077; RV64ID-NEXT: lui a1, 10485601078; RV64ID-NEXT: or a0, a0, a11079; RV64ID-NEXT: fmv.w.x fa0, a01080; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1081; RV64ID-NEXT: addi sp, sp, 161082; RV64ID-NEXT: ret1083 %1 = uitofp i32 %a to bfloat1084 ret bfloat %11085}1086 1087define bfloat @fcvt_bf16_wu_load(ptr %p) nounwind {1088; CHECK32ZFBFMIN-LABEL: fcvt_bf16_wu_load:1089; CHECK32ZFBFMIN: # %bb.0:1090; CHECK32ZFBFMIN-NEXT: lw a0, 0(a0)1091; CHECK32ZFBFMIN-NEXT: fcvt.s.wu fa5, a01092; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa51093; CHECK32ZFBFMIN-NEXT: ret1094;1095; RV32ID-LABEL: fcvt_bf16_wu_load:1096; RV32ID: # %bb.0:1097; RV32ID-NEXT: addi sp, sp, -161098; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1099; RV32ID-NEXT: lw a0, 0(a0)1100; RV32ID-NEXT: fcvt.s.wu fa0, a01101; RV32ID-NEXT: call __truncsfbf21102; RV32ID-NEXT: fmv.x.w a0, fa01103; RV32ID-NEXT: lui a1, 10485601104; RV32ID-NEXT: or a0, a0, a11105; RV32ID-NEXT: fmv.w.x fa0, a01106; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1107; RV32ID-NEXT: addi sp, sp, 161108; RV32ID-NEXT: ret1109;1110; CHECK64ZFBFMIN-LABEL: fcvt_bf16_wu_load:1111; CHECK64ZFBFMIN: # %bb.0:1112; CHECK64ZFBFMIN-NEXT: lw a0, 0(a0)1113; CHECK64ZFBFMIN-NEXT: fcvt.s.wu fa5, a01114; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa51115; CHECK64ZFBFMIN-NEXT: ret1116;1117; RV64ID-LABEL: fcvt_bf16_wu_load:1118; RV64ID: # %bb.0:1119; RV64ID-NEXT: addi sp, sp, -161120; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1121; RV64ID-NEXT: lw a0, 0(a0)1122; RV64ID-NEXT: fcvt.s.wu fa0, a01123; RV64ID-NEXT: call __truncsfbf21124; RV64ID-NEXT: fmv.x.w a0, fa01125; RV64ID-NEXT: lui a1, 10485601126; RV64ID-NEXT: or a0, a0, a11127; RV64ID-NEXT: fmv.w.x fa0, a01128; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1129; RV64ID-NEXT: addi sp, sp, 161130; RV64ID-NEXT: ret1131 %a = load i32, ptr %p1132 %1 = uitofp i32 %a to bfloat1133 ret bfloat %11134}1135 1136define bfloat @fcvt_bf16_l(i64 %a) nounwind {1137; CHECK32ZFBFMIN-LABEL: fcvt_bf16_l:1138; CHECK32ZFBFMIN: # %bb.0:1139; CHECK32ZFBFMIN-NEXT: addi sp, sp, -161140; CHECK32ZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1141; CHECK32ZFBFMIN-NEXT: call __floatdibf1142; CHECK32ZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1143; CHECK32ZFBFMIN-NEXT: addi sp, sp, 161144; CHECK32ZFBFMIN-NEXT: ret1145;1146; RV32ID-LABEL: fcvt_bf16_l:1147; RV32ID: # %bb.0:1148; RV32ID-NEXT: addi sp, sp, -161149; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1150; RV32ID-NEXT: call __floatdisf1151; RV32ID-NEXT: call __truncsfbf21152; RV32ID-NEXT: fmv.x.w a0, fa01153; RV32ID-NEXT: lui a1, 10485601154; RV32ID-NEXT: or a0, a0, a11155; RV32ID-NEXT: fmv.w.x fa0, a01156; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1157; RV32ID-NEXT: addi sp, sp, 161158; RV32ID-NEXT: ret1159;1160; CHECK64ZFBFMIN-LABEL: fcvt_bf16_l:1161; CHECK64ZFBFMIN: # %bb.0:1162; CHECK64ZFBFMIN-NEXT: fcvt.s.l fa5, a01163; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa51164; CHECK64ZFBFMIN-NEXT: ret1165;1166; RV64ID-LABEL: fcvt_bf16_l:1167; RV64ID: # %bb.0:1168; RV64ID-NEXT: addi sp, sp, -161169; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1170; RV64ID-NEXT: fcvt.s.l fa0, a01171; RV64ID-NEXT: call __truncsfbf21172; RV64ID-NEXT: fmv.x.w a0, fa01173; RV64ID-NEXT: lui a1, 10485601174; RV64ID-NEXT: or a0, a0, a11175; RV64ID-NEXT: fmv.w.x fa0, a01176; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1177; RV64ID-NEXT: addi sp, sp, 161178; RV64ID-NEXT: ret1179 %1 = sitofp i64 %a to bfloat1180 ret bfloat %11181}1182 1183define bfloat @fcvt_bf16_lu(i64 %a) nounwind {1184; CHECK32ZFBFMIN-LABEL: fcvt_bf16_lu:1185; CHECK32ZFBFMIN: # %bb.0:1186; CHECK32ZFBFMIN-NEXT: addi sp, sp, -161187; CHECK32ZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1188; CHECK32ZFBFMIN-NEXT: call __floatundibf1189; CHECK32ZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1190; CHECK32ZFBFMIN-NEXT: addi sp, sp, 161191; CHECK32ZFBFMIN-NEXT: ret1192;1193; RV32ID-LABEL: fcvt_bf16_lu:1194; RV32ID: # %bb.0:1195; RV32ID-NEXT: addi sp, sp, -161196; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1197; RV32ID-NEXT: call __floatundisf1198; RV32ID-NEXT: call __truncsfbf21199; RV32ID-NEXT: fmv.x.w a0, fa01200; RV32ID-NEXT: lui a1, 10485601201; RV32ID-NEXT: or a0, a0, a11202; RV32ID-NEXT: fmv.w.x fa0, a01203; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1204; RV32ID-NEXT: addi sp, sp, 161205; RV32ID-NEXT: ret1206;1207; CHECK64ZFBFMIN-LABEL: fcvt_bf16_lu:1208; CHECK64ZFBFMIN: # %bb.0:1209; CHECK64ZFBFMIN-NEXT: fcvt.s.lu fa5, a01210; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa51211; CHECK64ZFBFMIN-NEXT: ret1212;1213; RV64ID-LABEL: fcvt_bf16_lu:1214; RV64ID: # %bb.0:1215; RV64ID-NEXT: addi sp, sp, -161216; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1217; RV64ID-NEXT: fcvt.s.lu fa0, a01218; RV64ID-NEXT: call __truncsfbf21219; RV64ID-NEXT: fmv.x.w a0, fa01220; RV64ID-NEXT: lui a1, 10485601221; RV64ID-NEXT: or a0, a0, a11222; RV64ID-NEXT: fmv.w.x fa0, a01223; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1224; RV64ID-NEXT: addi sp, sp, 161225; RV64ID-NEXT: ret1226 %1 = uitofp i64 %a to bfloat1227 ret bfloat %11228}1229 1230define bfloat @fcvt_bf16_s(float %a) nounwind {1231; CHECK32ZFBFMIN-LABEL: fcvt_bf16_s:1232; CHECK32ZFBFMIN: # %bb.0:1233; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa01234; CHECK32ZFBFMIN-NEXT: ret1235;1236; RV32ID-LABEL: fcvt_bf16_s:1237; RV32ID: # %bb.0:1238; RV32ID-NEXT: addi sp, sp, -161239; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1240; RV32ID-NEXT: call __truncsfbf21241; RV32ID-NEXT: fmv.x.w a0, fa01242; RV32ID-NEXT: lui a1, 10485601243; RV32ID-NEXT: or a0, a0, a11244; RV32ID-NEXT: fmv.w.x fa0, a01245; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1246; RV32ID-NEXT: addi sp, sp, 161247; RV32ID-NEXT: ret1248;1249; CHECK64ZFBFMIN-LABEL: fcvt_bf16_s:1250; CHECK64ZFBFMIN: # %bb.0:1251; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa0, fa01252; CHECK64ZFBFMIN-NEXT: ret1253;1254; RV64ID-LABEL: fcvt_bf16_s:1255; RV64ID: # %bb.0:1256; RV64ID-NEXT: addi sp, sp, -161257; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1258; RV64ID-NEXT: call __truncsfbf21259; RV64ID-NEXT: fmv.x.w a0, fa01260; RV64ID-NEXT: lui a1, 10485601261; RV64ID-NEXT: or a0, a0, a11262; RV64ID-NEXT: fmv.w.x fa0, a01263; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1264; RV64ID-NEXT: addi sp, sp, 161265; RV64ID-NEXT: ret1266 %1 = fptrunc float %a to bfloat1267 ret bfloat %11268}1269 1270define float @fcvt_s_bf16(bfloat %a) nounwind {1271; CHECK32ZFBFMIN-LABEL: fcvt_s_bf16:1272; CHECK32ZFBFMIN: # %bb.0:1273; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa0, fa01274; CHECK32ZFBFMIN-NEXT: ret1275;1276; RV32ID-LABEL: fcvt_s_bf16:1277; RV32ID: # %bb.0:1278; RV32ID-NEXT: fmv.x.w a0, fa01279; RV32ID-NEXT: slli a0, a0, 161280; RV32ID-NEXT: fmv.w.x fa0, a01281; RV32ID-NEXT: ret1282;1283; CHECK64ZFBFMIN-LABEL: fcvt_s_bf16:1284; CHECK64ZFBFMIN: # %bb.0:1285; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa0, fa01286; CHECK64ZFBFMIN-NEXT: ret1287;1288; RV64ID-LABEL: fcvt_s_bf16:1289; RV64ID: # %bb.0:1290; RV64ID-NEXT: fmv.x.w a0, fa01291; RV64ID-NEXT: slli a0, a0, 161292; RV64ID-NEXT: fmv.w.x fa0, a01293; RV64ID-NEXT: ret1294 %1 = fpext bfloat %a to float1295 ret float %11296}1297 1298define bfloat @fcvt_bf16_d(double %a) nounwind {1299; RV32IZFBFMIN-LABEL: fcvt_bf16_d:1300; RV32IZFBFMIN: # %bb.0:1301; RV32IZFBFMIN-NEXT: addi sp, sp, -161302; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1303; RV32IZFBFMIN-NEXT: call __truncdfbf21304; RV32IZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1305; RV32IZFBFMIN-NEXT: addi sp, sp, 161306; RV32IZFBFMIN-NEXT: ret1307;1308; R32IDZFBFMIN-LABEL: fcvt_bf16_d:1309; R32IDZFBFMIN: # %bb.0:1310; R32IDZFBFMIN-NEXT: fcvt.s.d fa5, fa01311; R32IDZFBFMIN-NEXT: fcvt.bf16.s fa0, fa51312; R32IDZFBFMIN-NEXT: ret1313;1314; RV32ID-LABEL: fcvt_bf16_d:1315; RV32ID: # %bb.0:1316; RV32ID-NEXT: addi sp, sp, -161317; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1318; RV32ID-NEXT: call __truncdfbf21319; RV32ID-NEXT: fmv.x.w a0, fa01320; RV32ID-NEXT: lui a1, 10485601321; RV32ID-NEXT: or a0, a0, a11322; RV32ID-NEXT: fmv.w.x fa0, a01323; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1324; RV32ID-NEXT: addi sp, sp, 161325; RV32ID-NEXT: ret1326;1327; RV64IZFBFMIN-LABEL: fcvt_bf16_d:1328; RV64IZFBFMIN: # %bb.0:1329; RV64IZFBFMIN-NEXT: addi sp, sp, -161330; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1331; RV64IZFBFMIN-NEXT: call __truncdfbf21332; RV64IZFBFMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1333; RV64IZFBFMIN-NEXT: addi sp, sp, 161334; RV64IZFBFMIN-NEXT: ret1335;1336; RV64IDZFBFMIN-LABEL: fcvt_bf16_d:1337; RV64IDZFBFMIN: # %bb.0:1338; RV64IDZFBFMIN-NEXT: fcvt.s.d fa5, fa01339; RV64IDZFBFMIN-NEXT: fcvt.bf16.s fa0, fa51340; RV64IDZFBFMIN-NEXT: ret1341;1342; RV64ID-LABEL: fcvt_bf16_d:1343; RV64ID: # %bb.0:1344; RV64ID-NEXT: addi sp, sp, -161345; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1346; RV64ID-NEXT: call __truncdfbf21347; RV64ID-NEXT: fmv.x.w a0, fa01348; RV64ID-NEXT: lui a1, 10485601349; RV64ID-NEXT: or a0, a0, a11350; RV64ID-NEXT: fmv.w.x fa0, a01351; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1352; RV64ID-NEXT: addi sp, sp, 161353; RV64ID-NEXT: ret1354 %1 = fptrunc double %a to bfloat1355 ret bfloat %11356}1357 1358define double @fcvt_d_bf16(bfloat %a) nounwind {1359; RV32IZFBFMIN-LABEL: fcvt_d_bf16:1360; RV32IZFBFMIN: # %bb.0:1361; RV32IZFBFMIN-NEXT: addi sp, sp, -161362; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1363; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa0, fa01364; RV32IZFBFMIN-NEXT: call __extendsfdf21365; RV32IZFBFMIN-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1366; RV32IZFBFMIN-NEXT: addi sp, sp, 161367; RV32IZFBFMIN-NEXT: ret1368;1369; R32IDZFBFMIN-LABEL: fcvt_d_bf16:1370; R32IDZFBFMIN: # %bb.0:1371; R32IDZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0, dyn1372; R32IDZFBFMIN-NEXT: fcvt.d.s fa0, fa51373; R32IDZFBFMIN-NEXT: ret1374;1375; RV32ID-LABEL: fcvt_d_bf16:1376; RV32ID: # %bb.0:1377; RV32ID-NEXT: fmv.x.w a0, fa01378; RV32ID-NEXT: slli a0, a0, 161379; RV32ID-NEXT: fmv.w.x fa5, a01380; RV32ID-NEXT: fcvt.d.s fa0, fa51381; RV32ID-NEXT: ret1382;1383; RV64IZFBFMIN-LABEL: fcvt_d_bf16:1384; RV64IZFBFMIN: # %bb.0:1385; RV64IZFBFMIN-NEXT: addi sp, sp, -161386; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1387; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa0, fa01388; RV64IZFBFMIN-NEXT: call __extendsfdf21389; RV64IZFBFMIN-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1390; RV64IZFBFMIN-NEXT: addi sp, sp, 161391; RV64IZFBFMIN-NEXT: ret1392;1393; RV64IDZFBFMIN-LABEL: fcvt_d_bf16:1394; RV64IDZFBFMIN: # %bb.0:1395; RV64IDZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0, dyn1396; RV64IDZFBFMIN-NEXT: fcvt.d.s fa0, fa51397; RV64IDZFBFMIN-NEXT: ret1398;1399; RV64ID-LABEL: fcvt_d_bf16:1400; RV64ID: # %bb.0:1401; RV64ID-NEXT: fmv.x.w a0, fa01402; RV64ID-NEXT: slli a0, a0, 161403; RV64ID-NEXT: fmv.w.x fa5, a01404; RV64ID-NEXT: fcvt.d.s fa0, fa51405; RV64ID-NEXT: ret1406 %1 = fpext bfloat %a to double1407 ret double %11408}1409 1410define bfloat @bitcast_bf16_i16(i16 %a) nounwind {1411; CHECK32ZFBFMIN-LABEL: bitcast_bf16_i16:1412; CHECK32ZFBFMIN: # %bb.0:1413; CHECK32ZFBFMIN-NEXT: fmv.h.x fa0, a01414; CHECK32ZFBFMIN-NEXT: ret1415;1416; RV32ID-LABEL: bitcast_bf16_i16:1417; RV32ID: # %bb.0:1418; RV32ID-NEXT: lui a1, 10485601419; RV32ID-NEXT: or a0, a0, a11420; RV32ID-NEXT: fmv.w.x fa0, a01421; RV32ID-NEXT: ret1422;1423; CHECK64ZFBFMIN-LABEL: bitcast_bf16_i16:1424; CHECK64ZFBFMIN: # %bb.0:1425; CHECK64ZFBFMIN-NEXT: fmv.h.x fa0, a01426; CHECK64ZFBFMIN-NEXT: ret1427;1428; RV64ID-LABEL: bitcast_bf16_i16:1429; RV64ID: # %bb.0:1430; RV64ID-NEXT: lui a1, 10485601431; RV64ID-NEXT: or a0, a0, a11432; RV64ID-NEXT: fmv.w.x fa0, a01433; RV64ID-NEXT: ret1434 %1 = bitcast i16 %a to bfloat1435 ret bfloat %11436}1437 1438define i16 @bitcast_i16_bf16(bfloat %a) nounwind {1439; CHECK32ZFBFMIN-LABEL: bitcast_i16_bf16:1440; CHECK32ZFBFMIN: # %bb.0:1441; CHECK32ZFBFMIN-NEXT: fmv.x.h a0, fa01442; CHECK32ZFBFMIN-NEXT: ret1443;1444; RV32ID-LABEL: bitcast_i16_bf16:1445; RV32ID: # %bb.0:1446; RV32ID-NEXT: fmv.x.w a0, fa01447; RV32ID-NEXT: ret1448;1449; CHECK64ZFBFMIN-LABEL: bitcast_i16_bf16:1450; CHECK64ZFBFMIN: # %bb.0:1451; CHECK64ZFBFMIN-NEXT: fmv.x.h a0, fa01452; CHECK64ZFBFMIN-NEXT: ret1453;1454; RV64ID-LABEL: bitcast_i16_bf16:1455; RV64ID: # %bb.0:1456; RV64ID-NEXT: fmv.x.w a0, fa01457; RV64ID-NEXT: ret1458 %1 = bitcast bfloat %a to i161459 ret i16 %11460}1461 1462define signext i32 @fcvt_bf16_w_demanded_bits(i32 signext %0, ptr %1) nounwind {1463; CHECK32ZFBFMIN-LABEL: fcvt_bf16_w_demanded_bits:1464; CHECK32ZFBFMIN: # %bb.0:1465; CHECK32ZFBFMIN-NEXT: addi a0, a0, 11466; CHECK32ZFBFMIN-NEXT: fcvt.s.w fa5, a01467; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa5, fa51468; CHECK32ZFBFMIN-NEXT: fsh fa5, 0(a1)1469; CHECK32ZFBFMIN-NEXT: ret1470;1471; RV32ID-LABEL: fcvt_bf16_w_demanded_bits:1472; RV32ID: # %bb.0:1473; RV32ID-NEXT: addi sp, sp, -161474; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1475; RV32ID-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1476; RV32ID-NEXT: sw s1, 4(sp) # 4-byte Folded Spill1477; RV32ID-NEXT: mv s0, a11478; RV32ID-NEXT: addi s1, a0, 11479; RV32ID-NEXT: fcvt.s.w fa0, s11480; RV32ID-NEXT: call __truncsfbf21481; RV32ID-NEXT: fmv.x.w a0, fa01482; RV32ID-NEXT: sh a0, 0(s0)1483; RV32ID-NEXT: mv a0, s11484; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1485; RV32ID-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1486; RV32ID-NEXT: lw s1, 4(sp) # 4-byte Folded Reload1487; RV32ID-NEXT: addi sp, sp, 161488; RV32ID-NEXT: ret1489;1490; CHECK64ZFBFMIN-LABEL: fcvt_bf16_w_demanded_bits:1491; CHECK64ZFBFMIN: # %bb.0:1492; CHECK64ZFBFMIN-NEXT: addiw a0, a0, 11493; CHECK64ZFBFMIN-NEXT: fcvt.s.w fa5, a01494; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa5, fa51495; CHECK64ZFBFMIN-NEXT: fsh fa5, 0(a1)1496; CHECK64ZFBFMIN-NEXT: ret1497;1498; RV64ID-LABEL: fcvt_bf16_w_demanded_bits:1499; RV64ID: # %bb.0:1500; RV64ID-NEXT: addi sp, sp, -321501; RV64ID-NEXT: sd ra, 24(sp) # 8-byte Folded Spill1502; RV64ID-NEXT: sd s0, 16(sp) # 8-byte Folded Spill1503; RV64ID-NEXT: sd s1, 8(sp) # 8-byte Folded Spill1504; RV64ID-NEXT: mv s0, a11505; RV64ID-NEXT: addiw s1, a0, 11506; RV64ID-NEXT: fcvt.s.w fa0, s11507; RV64ID-NEXT: call __truncsfbf21508; RV64ID-NEXT: fmv.x.w a0, fa01509; RV64ID-NEXT: sh a0, 0(s0)1510; RV64ID-NEXT: mv a0, s11511; RV64ID-NEXT: ld ra, 24(sp) # 8-byte Folded Reload1512; RV64ID-NEXT: ld s0, 16(sp) # 8-byte Folded Reload1513; RV64ID-NEXT: ld s1, 8(sp) # 8-byte Folded Reload1514; RV64ID-NEXT: addi sp, sp, 321515; RV64ID-NEXT: ret1516 %3 = add i32 %0, 11517 %4 = sitofp i32 %3 to bfloat1518 store bfloat %4, ptr %1, align 21519 ret i32 %31520}1521 1522define signext i32 @fcvt_bf16_wu_demanded_bits(i32 signext %0, ptr %1) nounwind {1523; CHECK32ZFBFMIN-LABEL: fcvt_bf16_wu_demanded_bits:1524; CHECK32ZFBFMIN: # %bb.0:1525; CHECK32ZFBFMIN-NEXT: addi a0, a0, 11526; CHECK32ZFBFMIN-NEXT: fcvt.s.wu fa5, a01527; CHECK32ZFBFMIN-NEXT: fcvt.bf16.s fa5, fa51528; CHECK32ZFBFMIN-NEXT: fsh fa5, 0(a1)1529; CHECK32ZFBFMIN-NEXT: ret1530;1531; RV32ID-LABEL: fcvt_bf16_wu_demanded_bits:1532; RV32ID: # %bb.0:1533; RV32ID-NEXT: addi sp, sp, -161534; RV32ID-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1535; RV32ID-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1536; RV32ID-NEXT: sw s1, 4(sp) # 4-byte Folded Spill1537; RV32ID-NEXT: mv s0, a11538; RV32ID-NEXT: addi s1, a0, 11539; RV32ID-NEXT: fcvt.s.wu fa0, s11540; RV32ID-NEXT: call __truncsfbf21541; RV32ID-NEXT: fmv.x.w a0, fa01542; RV32ID-NEXT: sh a0, 0(s0)1543; RV32ID-NEXT: mv a0, s11544; RV32ID-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1545; RV32ID-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1546; RV32ID-NEXT: lw s1, 4(sp) # 4-byte Folded Reload1547; RV32ID-NEXT: addi sp, sp, 161548; RV32ID-NEXT: ret1549;1550; CHECK64ZFBFMIN-LABEL: fcvt_bf16_wu_demanded_bits:1551; CHECK64ZFBFMIN: # %bb.0:1552; CHECK64ZFBFMIN-NEXT: addiw a0, a0, 11553; CHECK64ZFBFMIN-NEXT: fcvt.s.wu fa5, a01554; CHECK64ZFBFMIN-NEXT: fcvt.bf16.s fa5, fa51555; CHECK64ZFBFMIN-NEXT: fsh fa5, 0(a1)1556; CHECK64ZFBFMIN-NEXT: ret1557;1558; RV64ID-LABEL: fcvt_bf16_wu_demanded_bits:1559; RV64ID: # %bb.0:1560; RV64ID-NEXT: addi sp, sp, -321561; RV64ID-NEXT: sd ra, 24(sp) # 8-byte Folded Spill1562; RV64ID-NEXT: sd s0, 16(sp) # 8-byte Folded Spill1563; RV64ID-NEXT: sd s1, 8(sp) # 8-byte Folded Spill1564; RV64ID-NEXT: mv s0, a11565; RV64ID-NEXT: addiw s1, a0, 11566; RV64ID-NEXT: fcvt.s.wu fa0, s11567; RV64ID-NEXT: call __truncsfbf21568; RV64ID-NEXT: fmv.x.w a0, fa01569; RV64ID-NEXT: sh a0, 0(s0)1570; RV64ID-NEXT: mv a0, s11571; RV64ID-NEXT: ld ra, 24(sp) # 8-byte Folded Reload1572; RV64ID-NEXT: ld s0, 16(sp) # 8-byte Folded Reload1573; RV64ID-NEXT: ld s1, 8(sp) # 8-byte Folded Reload1574; RV64ID-NEXT: addi sp, sp, 321575; RV64ID-NEXT: ret1576 %3 = add i32 %0, 11577 %4 = uitofp i32 %3 to bfloat1578 store bfloat %4, ptr %1, align 21579 ret i32 %31580}1581 1582define signext i8 @fcvt_w_s_i8(bfloat %a) nounwind {1583; CHECK32ZFBFMIN-LABEL: fcvt_w_s_i8:1584; CHECK32ZFBFMIN: # %bb.0:1585; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01586; CHECK32ZFBFMIN-NEXT: fcvt.w.s a0, fa5, rtz1587; CHECK32ZFBFMIN-NEXT: ret1588;1589; RV32ID-LABEL: fcvt_w_s_i8:1590; RV32ID: # %bb.0:1591; RV32ID-NEXT: fmv.x.w a0, fa01592; RV32ID-NEXT: slli a0, a0, 161593; RV32ID-NEXT: fmv.w.x fa5, a01594; RV32ID-NEXT: fcvt.w.s a0, fa5, rtz1595; RV32ID-NEXT: ret1596;1597; CHECK64ZFBFMIN-LABEL: fcvt_w_s_i8:1598; CHECK64ZFBFMIN: # %bb.0:1599; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01600; CHECK64ZFBFMIN-NEXT: fcvt.l.s a0, fa5, rtz1601; CHECK64ZFBFMIN-NEXT: ret1602;1603; RV64ID-LABEL: fcvt_w_s_i8:1604; RV64ID: # %bb.0:1605; RV64ID-NEXT: fmv.x.w a0, fa01606; RV64ID-NEXT: slli a0, a0, 161607; RV64ID-NEXT: fmv.w.x fa5, a01608; RV64ID-NEXT: fcvt.l.s a0, fa5, rtz1609; RV64ID-NEXT: ret1610 %1 = fptosi bfloat %a to i81611 ret i8 %11612}1613 1614define signext i8 @fcvt_w_s_sat_i8(bfloat %a) nounwind {1615; CHECK32ZFBFMIN-LABEL: fcvt_w_s_sat_i8:1616; CHECK32ZFBFMIN: # %bb.0: # %start1617; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01618; CHECK32ZFBFMIN-NEXT: lui a0, 7987201619; CHECK32ZFBFMIN-NEXT: lui a1, 2744001620; CHECK32ZFBFMIN-NEXT: fmv.w.x fa4, a01621; CHECK32ZFBFMIN-NEXT: feq.s a0, fa5, fa51622; CHECK32ZFBFMIN-NEXT: neg a0, a01623; CHECK32ZFBFMIN-NEXT: fmax.s fa5, fa5, fa41624; CHECK32ZFBFMIN-NEXT: fmv.w.x fa4, a11625; CHECK32ZFBFMIN-NEXT: fmin.s fa5, fa5, fa41626; CHECK32ZFBFMIN-NEXT: fcvt.w.s a1, fa5, rtz1627; CHECK32ZFBFMIN-NEXT: and a0, a0, a11628; CHECK32ZFBFMIN-NEXT: ret1629;1630; RV32ID-LABEL: fcvt_w_s_sat_i8:1631; RV32ID: # %bb.0: # %start1632; RV32ID-NEXT: fmv.x.w a0, fa01633; RV32ID-NEXT: lui a1, 7987201634; RV32ID-NEXT: fmv.w.x fa5, a11635; RV32ID-NEXT: lui a1, 2744001636; RV32ID-NEXT: slli a0, a0, 161637; RV32ID-NEXT: fmv.w.x fa4, a01638; RV32ID-NEXT: feq.s a0, fa4, fa41639; RV32ID-NEXT: fmax.s fa5, fa4, fa51640; RV32ID-NEXT: fmv.w.x fa4, a11641; RV32ID-NEXT: neg a0, a01642; RV32ID-NEXT: fmin.s fa5, fa5, fa41643; RV32ID-NEXT: fcvt.w.s a1, fa5, rtz1644; RV32ID-NEXT: and a0, a0, a11645; RV32ID-NEXT: ret1646;1647; CHECK64ZFBFMIN-LABEL: fcvt_w_s_sat_i8:1648; CHECK64ZFBFMIN: # %bb.0: # %start1649; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01650; CHECK64ZFBFMIN-NEXT: lui a0, 7987201651; CHECK64ZFBFMIN-NEXT: lui a1, 2744001652; CHECK64ZFBFMIN-NEXT: fmv.w.x fa4, a01653; CHECK64ZFBFMIN-NEXT: feq.s a0, fa5, fa51654; CHECK64ZFBFMIN-NEXT: neg a0, a01655; CHECK64ZFBFMIN-NEXT: fmax.s fa5, fa5, fa41656; CHECK64ZFBFMIN-NEXT: fmv.w.x fa4, a11657; CHECK64ZFBFMIN-NEXT: fmin.s fa5, fa5, fa41658; CHECK64ZFBFMIN-NEXT: fcvt.l.s a1, fa5, rtz1659; CHECK64ZFBFMIN-NEXT: and a0, a0, a11660; CHECK64ZFBFMIN-NEXT: ret1661;1662; RV64ID-LABEL: fcvt_w_s_sat_i8:1663; RV64ID: # %bb.0: # %start1664; RV64ID-NEXT: fmv.x.w a0, fa01665; RV64ID-NEXT: lui a1, 7987201666; RV64ID-NEXT: fmv.w.x fa5, a11667; RV64ID-NEXT: lui a1, 2744001668; RV64ID-NEXT: slli a0, a0, 161669; RV64ID-NEXT: fmv.w.x fa4, a01670; RV64ID-NEXT: feq.s a0, fa4, fa41671; RV64ID-NEXT: fmax.s fa5, fa4, fa51672; RV64ID-NEXT: fmv.w.x fa4, a11673; RV64ID-NEXT: neg a0, a01674; RV64ID-NEXT: fmin.s fa5, fa5, fa41675; RV64ID-NEXT: fcvt.l.s a1, fa5, rtz1676; RV64ID-NEXT: and a0, a0, a11677; RV64ID-NEXT: ret1678start:1679 %0 = tail call i8 @llvm.fptosi.sat.i8.bf16(bfloat %a)1680 ret i8 %01681}1682 1683define zeroext i8 @fcvt_wu_s_i8(bfloat %a) nounwind {1684; CHECK32ZFBFMIN-LABEL: fcvt_wu_s_i8:1685; CHECK32ZFBFMIN: # %bb.0:1686; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01687; CHECK32ZFBFMIN-NEXT: fcvt.w.s a0, fa5, rtz1688; CHECK32ZFBFMIN-NEXT: ret1689;1690; RV32ID-LABEL: fcvt_wu_s_i8:1691; RV32ID: # %bb.0:1692; RV32ID-NEXT: fmv.x.w a0, fa01693; RV32ID-NEXT: slli a0, a0, 161694; RV32ID-NEXT: fmv.w.x fa5, a01695; RV32ID-NEXT: fcvt.wu.s a0, fa5, rtz1696; RV32ID-NEXT: ret1697;1698; CHECK64ZFBFMIN-LABEL: fcvt_wu_s_i8:1699; CHECK64ZFBFMIN: # %bb.0:1700; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01701; CHECK64ZFBFMIN-NEXT: fcvt.lu.s a0, fa5, rtz1702; CHECK64ZFBFMIN-NEXT: ret1703;1704; RV64ID-LABEL: fcvt_wu_s_i8:1705; RV64ID: # %bb.0:1706; RV64ID-NEXT: fmv.x.w a0, fa01707; RV64ID-NEXT: slli a0, a0, 161708; RV64ID-NEXT: fmv.w.x fa5, a01709; RV64ID-NEXT: fcvt.lu.s a0, fa5, rtz1710; RV64ID-NEXT: ret1711 %1 = fptoui bfloat %a to i81712 ret i8 %11713}1714 1715define zeroext i8 @fcvt_wu_s_sat_i8(bfloat %a) nounwind {1716; CHECK32ZFBFMIN-LABEL: fcvt_wu_s_sat_i8:1717; CHECK32ZFBFMIN: # %bb.0: # %start1718; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01719; CHECK32ZFBFMIN-NEXT: fmv.w.x fa4, zero1720; CHECK32ZFBFMIN-NEXT: lui a0, 2764641721; CHECK32ZFBFMIN-NEXT: fmax.s fa5, fa5, fa41722; CHECK32ZFBFMIN-NEXT: fmv.w.x fa4, a01723; CHECK32ZFBFMIN-NEXT: fmin.s fa5, fa5, fa41724; CHECK32ZFBFMIN-NEXT: fcvt.wu.s a0, fa5, rtz1725; CHECK32ZFBFMIN-NEXT: ret1726;1727; RV32ID-LABEL: fcvt_wu_s_sat_i8:1728; RV32ID: # %bb.0: # %start1729; RV32ID-NEXT: fmv.x.w a0, fa01730; RV32ID-NEXT: fmv.w.x fa5, zero1731; RV32ID-NEXT: slli a0, a0, 161732; RV32ID-NEXT: fmv.w.x fa4, a01733; RV32ID-NEXT: lui a0, 2764641734; RV32ID-NEXT: fmax.s fa5, fa4, fa51735; RV32ID-NEXT: fmv.w.x fa4, a01736; RV32ID-NEXT: fmin.s fa5, fa5, fa41737; RV32ID-NEXT: fcvt.wu.s a0, fa5, rtz1738; RV32ID-NEXT: ret1739;1740; CHECK64ZFBFMIN-LABEL: fcvt_wu_s_sat_i8:1741; CHECK64ZFBFMIN: # %bb.0: # %start1742; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01743; CHECK64ZFBFMIN-NEXT: fmv.w.x fa4, zero1744; CHECK64ZFBFMIN-NEXT: lui a0, 2764641745; CHECK64ZFBFMIN-NEXT: fmax.s fa5, fa5, fa41746; CHECK64ZFBFMIN-NEXT: fmv.w.x fa4, a01747; CHECK64ZFBFMIN-NEXT: fmin.s fa5, fa5, fa41748; CHECK64ZFBFMIN-NEXT: fcvt.lu.s a0, fa5, rtz1749; CHECK64ZFBFMIN-NEXT: ret1750;1751; RV64ID-LABEL: fcvt_wu_s_sat_i8:1752; RV64ID: # %bb.0: # %start1753; RV64ID-NEXT: fmv.x.w a0, fa01754; RV64ID-NEXT: fmv.w.x fa5, zero1755; RV64ID-NEXT: slli a0, a0, 161756; RV64ID-NEXT: fmv.w.x fa4, a01757; RV64ID-NEXT: lui a0, 2764641758; RV64ID-NEXT: fmax.s fa5, fa4, fa51759; RV64ID-NEXT: fmv.w.x fa4, a01760; RV64ID-NEXT: fmin.s fa5, fa5, fa41761; RV64ID-NEXT: fcvt.lu.s a0, fa5, rtz1762; RV64ID-NEXT: ret1763start:1764 %0 = tail call i8 @llvm.fptoui.sat.i8.bf16(bfloat %a)1765 ret i8 %01766}1767 1768define zeroext i32 @fcvt_wu_bf16_sat_zext(bfloat %a) nounwind {1769; CHECK32ZFBFMIN-LABEL: fcvt_wu_bf16_sat_zext:1770; CHECK32ZFBFMIN: # %bb.0: # %start1771; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01772; CHECK32ZFBFMIN-NEXT: fcvt.wu.s a0, fa5, rtz1773; CHECK32ZFBFMIN-NEXT: feq.s a1, fa5, fa51774; CHECK32ZFBFMIN-NEXT: seqz a1, a11775; CHECK32ZFBFMIN-NEXT: addi a1, a1, -11776; CHECK32ZFBFMIN-NEXT: and a0, a1, a01777; CHECK32ZFBFMIN-NEXT: ret1778;1779; RV32ID-LABEL: fcvt_wu_bf16_sat_zext:1780; RV32ID: # %bb.0: # %start1781; RV32ID-NEXT: fmv.x.w a0, fa01782; RV32ID-NEXT: slli a0, a0, 161783; RV32ID-NEXT: fmv.w.x fa5, a01784; RV32ID-NEXT: fcvt.wu.s a0, fa5, rtz1785; RV32ID-NEXT: feq.s a1, fa5, fa51786; RV32ID-NEXT: seqz a1, a11787; RV32ID-NEXT: addi a1, a1, -11788; RV32ID-NEXT: and a0, a1, a01789; RV32ID-NEXT: ret1790;1791; CHECK64ZFBFMIN-LABEL: fcvt_wu_bf16_sat_zext:1792; CHECK64ZFBFMIN: # %bb.0: # %start1793; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01794; CHECK64ZFBFMIN-NEXT: fcvt.wu.s a0, fa5, rtz1795; CHECK64ZFBFMIN-NEXT: feq.s a1, fa5, fa51796; CHECK64ZFBFMIN-NEXT: seqz a1, a11797; CHECK64ZFBFMIN-NEXT: addi a1, a1, -11798; CHECK64ZFBFMIN-NEXT: and a0, a0, a11799; CHECK64ZFBFMIN-NEXT: slli a0, a0, 321800; CHECK64ZFBFMIN-NEXT: srli a0, a0, 321801; CHECK64ZFBFMIN-NEXT: ret1802;1803; RV64ID-LABEL: fcvt_wu_bf16_sat_zext:1804; RV64ID: # %bb.0: # %start1805; RV64ID-NEXT: fmv.x.w a0, fa01806; RV64ID-NEXT: slli a0, a0, 161807; RV64ID-NEXT: fmv.w.x fa5, a01808; RV64ID-NEXT: fcvt.wu.s a0, fa5, rtz1809; RV64ID-NEXT: feq.s a1, fa5, fa51810; RV64ID-NEXT: seqz a1, a11811; RV64ID-NEXT: addi a1, a1, -11812; RV64ID-NEXT: and a0, a0, a11813; RV64ID-NEXT: slli a0, a0, 321814; RV64ID-NEXT: srli a0, a0, 321815; RV64ID-NEXT: ret1816start:1817 %0 = tail call i32 @llvm.fptoui.sat.i32.bf16(bfloat %a)1818 ret i32 %01819}1820 1821define signext i32 @fcvt_w_bf16_sat_sext(bfloat %a) nounwind {1822; CHECK32ZFBFMIN-LABEL: fcvt_w_bf16_sat_sext:1823; CHECK32ZFBFMIN: # %bb.0: # %start1824; CHECK32ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01825; CHECK32ZFBFMIN-NEXT: fcvt.w.s a0, fa5, rtz1826; CHECK32ZFBFMIN-NEXT: feq.s a1, fa5, fa51827; CHECK32ZFBFMIN-NEXT: seqz a1, a11828; CHECK32ZFBFMIN-NEXT: addi a1, a1, -11829; CHECK32ZFBFMIN-NEXT: and a0, a1, a01830; CHECK32ZFBFMIN-NEXT: ret1831;1832; RV32ID-LABEL: fcvt_w_bf16_sat_sext:1833; RV32ID: # %bb.0: # %start1834; RV32ID-NEXT: fmv.x.w a0, fa01835; RV32ID-NEXT: slli a0, a0, 161836; RV32ID-NEXT: fmv.w.x fa5, a01837; RV32ID-NEXT: fcvt.w.s a0, fa5, rtz1838; RV32ID-NEXT: feq.s a1, fa5, fa51839; RV32ID-NEXT: seqz a1, a11840; RV32ID-NEXT: addi a1, a1, -11841; RV32ID-NEXT: and a0, a1, a01842; RV32ID-NEXT: ret1843;1844; CHECK64ZFBFMIN-LABEL: fcvt_w_bf16_sat_sext:1845; CHECK64ZFBFMIN: # %bb.0: # %start1846; CHECK64ZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa01847; CHECK64ZFBFMIN-NEXT: fcvt.w.s a0, fa5, rtz1848; CHECK64ZFBFMIN-NEXT: feq.s a1, fa5, fa51849; CHECK64ZFBFMIN-NEXT: seqz a1, a11850; CHECK64ZFBFMIN-NEXT: addi a1, a1, -11851; CHECK64ZFBFMIN-NEXT: and a0, a1, a01852; CHECK64ZFBFMIN-NEXT: ret1853;1854; RV64ID-LABEL: fcvt_w_bf16_sat_sext:1855; RV64ID: # %bb.0: # %start1856; RV64ID-NEXT: fmv.x.w a0, fa01857; RV64ID-NEXT: slli a0, a0, 161858; RV64ID-NEXT: fmv.w.x fa5, a01859; RV64ID-NEXT: fcvt.w.s a0, fa5, rtz1860; RV64ID-NEXT: feq.s a1, fa5, fa51861; RV64ID-NEXT: seqz a1, a11862; RV64ID-NEXT: addi a1, a1, -11863; RV64ID-NEXT: and a0, a1, a01864; RV64ID-NEXT: ret1865start:1866 %0 = tail call i32 @llvm.fptosi.sat.i32.bf16(bfloat %a)1867 ret i32 %01868}1869