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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+zbb -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefixes=RV32ZB4; RUN: llc -mtriple=riscv64 -mattr=+zbb -verify-machineinstrs < %s \5; RUN: | FileCheck %s -check-prefixes=RV64ZB6; RUN: llc -mtriple=riscv32 -mattr=+zbkb -verify-machineinstrs < %s \7; RUN: | FileCheck %s -check-prefixes=RV32ZB8; RUN: llc -mtriple=riscv64 -mattr=+zbkb -verify-machineinstrs < %s \9; RUN: | FileCheck %s -check-prefixes=RV64ZB10 11define i16 @test_bswap_srli_7_bswap_i16(i16 %a) nounwind {12; RV32ZB-LABEL: test_bswap_srli_7_bswap_i16:13; RV32ZB: # %bb.0:14; RV32ZB-NEXT: rev8 a0, a015; RV32ZB-NEXT: srli a0, a0, 2316; RV32ZB-NEXT: rev8 a0, a017; RV32ZB-NEXT: srli a0, a0, 1618; RV32ZB-NEXT: ret19;20; RV64ZB-LABEL: test_bswap_srli_7_bswap_i16:21; RV64ZB: # %bb.0:22; RV64ZB-NEXT: rev8 a0, a023; RV64ZB-NEXT: srli a0, a0, 5524; RV64ZB-NEXT: rev8 a0, a025; RV64ZB-NEXT: srli a0, a0, 4826; RV64ZB-NEXT: ret27 %1 = call i16 @llvm.bswap.i16(i16 %a)28 %2 = lshr i16 %1, 729 %3 = call i16 @llvm.bswap.i16(i16 %2)30 ret i16 %331}32 33define i16 @test_bswap_srli_8_bswap_i16(i16 %a) nounwind {34; RV32ZB-LABEL: test_bswap_srli_8_bswap_i16:35; RV32ZB: # %bb.0:36; RV32ZB-NEXT: slli a0, a0, 837; RV32ZB-NEXT: ret38;39; RV64ZB-LABEL: test_bswap_srli_8_bswap_i16:40; RV64ZB: # %bb.0:41; RV64ZB-NEXT: slli a0, a0, 842; RV64ZB-NEXT: ret43 %1 = call i16 @llvm.bswap.i16(i16 %a)44 %2 = lshr i16 %1, 845 %3 = call i16 @llvm.bswap.i16(i16 %2)46 ret i16 %347}48 49define i32 @test_bswap_srli_8_bswap_i32(i32 %a) nounwind {50; RV32ZB-LABEL: test_bswap_srli_8_bswap_i32:51; RV32ZB: # %bb.0:52; RV32ZB-NEXT: slli a0, a0, 853; RV32ZB-NEXT: ret54;55; RV64ZB-LABEL: test_bswap_srli_8_bswap_i32:56; RV64ZB: # %bb.0:57; RV64ZB-NEXT: slliw a0, a0, 858; RV64ZB-NEXT: ret59 %1 = call i32 @llvm.bswap.i32(i32 %a)60 %2 = lshr i32 %1, 861 %3 = call i32 @llvm.bswap.i32(i32 %2)62 ret i32 %363}64 65define i32 @test_bswap_srli_16_bswap_i32(i32 %a) nounwind {66; RV32ZB-LABEL: test_bswap_srli_16_bswap_i32:67; RV32ZB: # %bb.0:68; RV32ZB-NEXT: slli a0, a0, 1669; RV32ZB-NEXT: ret70;71; RV64ZB-LABEL: test_bswap_srli_16_bswap_i32:72; RV64ZB: # %bb.0:73; RV64ZB-NEXT: slliw a0, a0, 1674; RV64ZB-NEXT: ret75 %1 = call i32 @llvm.bswap.i32(i32 %a)76 %2 = lshr i32 %1, 1677 %3 = call i32 @llvm.bswap.i32(i32 %2)78 ret i32 %379}80 81define i32 @test_bswap_srli_24_bswap_i32(i32 %a) nounwind {82; RV32ZB-LABEL: test_bswap_srli_24_bswap_i32:83; RV32ZB: # %bb.0:84; RV32ZB-NEXT: slli a0, a0, 2485; RV32ZB-NEXT: ret86;87; RV64ZB-LABEL: test_bswap_srli_24_bswap_i32:88; RV64ZB: # %bb.0:89; RV64ZB-NEXT: slliw a0, a0, 2490; RV64ZB-NEXT: ret91 %1 = call i32 @llvm.bswap.i32(i32 %a)92 %2 = lshr i32 %1, 2493 %3 = call i32 @llvm.bswap.i32(i32 %2)94 ret i32 %395}96 97define i64 @test_bswap_srli_48_bswap_i64(i64 %a) nounwind {98; RV32ZB-LABEL: test_bswap_srli_48_bswap_i64:99; RV32ZB: # %bb.0:100; RV32ZB-NEXT: slli a1, a0, 16101; RV32ZB-NEXT: li a0, 0102; RV32ZB-NEXT: ret103;104; RV64ZB-LABEL: test_bswap_srli_48_bswap_i64:105; RV64ZB: # %bb.0:106; RV64ZB-NEXT: slli a0, a0, 48107; RV64ZB-NEXT: ret108 %1 = call i64 @llvm.bswap.i64(i64 %a)109 %2 = lshr i64 %1, 48110 %3 = call i64 @llvm.bswap.i64(i64 %2)111 ret i64 %3112}113 114define i16 @test_bswap_shli_7_bswap_i16(i16 %a) nounwind {115; RV32ZB-LABEL: test_bswap_shli_7_bswap_i16:116; RV32ZB: # %bb.0:117; RV32ZB-NEXT: rev8 a0, a0118; RV32ZB-NEXT: srli a0, a0, 16119; RV32ZB-NEXT: slli a0, a0, 7120; RV32ZB-NEXT: rev8 a0, a0121; RV32ZB-NEXT: srli a0, a0, 16122; RV32ZB-NEXT: ret123;124; RV64ZB-LABEL: test_bswap_shli_7_bswap_i16:125; RV64ZB: # %bb.0:126; RV64ZB-NEXT: rev8 a0, a0127; RV64ZB-NEXT: srli a0, a0, 48128; RV64ZB-NEXT: slli a0, a0, 7129; RV64ZB-NEXT: rev8 a0, a0130; RV64ZB-NEXT: srli a0, a0, 48131; RV64ZB-NEXT: ret132 %1 = call i16 @llvm.bswap.i16(i16 %a)133 %2 = shl i16 %1, 7134 %3 = call i16 @llvm.bswap.i16(i16 %2)135 ret i16 %3136}137 138define i16 @test_bswap_shli_8_bswap_i16(i16 %a) nounwind {139; RV32ZB-LABEL: test_bswap_shli_8_bswap_i16:140; RV32ZB: # %bb.0:141; RV32ZB-NEXT: slli a0, a0, 16142; RV32ZB-NEXT: srli a0, a0, 24143; RV32ZB-NEXT: ret144;145; RV64ZB-LABEL: test_bswap_shli_8_bswap_i16:146; RV64ZB: # %bb.0:147; RV64ZB-NEXT: slli a0, a0, 48148; RV64ZB-NEXT: srli a0, a0, 56149; RV64ZB-NEXT: ret150 %1 = call i16 @llvm.bswap.i16(i16 %a)151 %2 = shl i16 %1, 8152 %3 = call i16 @llvm.bswap.i16(i16 %2)153 ret i16 %3154}155 156define i32 @test_bswap_shli_8_bswap_i32(i32 %a) nounwind {157; RV32ZB-LABEL: test_bswap_shli_8_bswap_i32:158; RV32ZB: # %bb.0:159; RV32ZB-NEXT: srli a0, a0, 8160; RV32ZB-NEXT: ret161;162; RV64ZB-LABEL: test_bswap_shli_8_bswap_i32:163; RV64ZB: # %bb.0:164; RV64ZB-NEXT: srliw a0, a0, 8165; RV64ZB-NEXT: ret166 %1 = call i32 @llvm.bswap.i32(i32 %a)167 %2 = shl i32 %1, 8168 %3 = call i32 @llvm.bswap.i32(i32 %2)169 ret i32 %3170}171 172define i32 @test_bswap_shli_16_bswap_i32(i32 %a) nounwind {173; RV32ZB-LABEL: test_bswap_shli_16_bswap_i32:174; RV32ZB: # %bb.0:175; RV32ZB-NEXT: srli a0, a0, 16176; RV32ZB-NEXT: ret177;178; RV64ZB-LABEL: test_bswap_shli_16_bswap_i32:179; RV64ZB: # %bb.0:180; RV64ZB-NEXT: srliw a0, a0, 16181; RV64ZB-NEXT: ret182 %1 = call i32 @llvm.bswap.i32(i32 %a)183 %2 = shl i32 %1, 16184 %3 = call i32 @llvm.bswap.i32(i32 %2)185 ret i32 %3186}187 188define i32 @test_bswap_shli_24_bswap_i32(i32 %a) nounwind {189; RV32ZB-LABEL: test_bswap_shli_24_bswap_i32:190; RV32ZB: # %bb.0:191; RV32ZB-NEXT: srli a0, a0, 24192; RV32ZB-NEXT: ret193;194; RV64ZB-LABEL: test_bswap_shli_24_bswap_i32:195; RV64ZB: # %bb.0:196; RV64ZB-NEXT: srliw a0, a0, 24197; RV64ZB-NEXT: ret198 %1 = call i32 @llvm.bswap.i32(i32 %a)199 %2 = shl i32 %1, 24200 %3 = call i32 @llvm.bswap.i32(i32 %2)201 ret i32 %3202}203 204define i64 @test_bswap_shli_48_bswap_i64(i64 %a) nounwind {205; RV32ZB-LABEL: test_bswap_shli_48_bswap_i64:206; RV32ZB: # %bb.0:207; RV32ZB-NEXT: srli a0, a1, 16208; RV32ZB-NEXT: li a1, 0209; RV32ZB-NEXT: ret210;211; RV64ZB-LABEL: test_bswap_shli_48_bswap_i64:212; RV64ZB: # %bb.0:213; RV64ZB-NEXT: srli a0, a0, 48214; RV64ZB-NEXT: ret215 %1 = call i64 @llvm.bswap.i64(i64 %a)216 %2 = shl i64 %1, 48217 %3 = call i64 @llvm.bswap.i64(i64 %2)218 ret i64 %3219}220