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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32I-FPELIM %s4; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi ilp32f \5; RUN: -verify-machineinstrs < %s \6; RUN: | FileCheck -check-prefix=RV32I-FPELIM %s7; RUN: llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all < %s \8; RUN: | FileCheck -check-prefix=RV32I-WITHFP %s9; RUN: llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all \10; RUN: -mattr=+f -target-abi ilp32f < %s \11; RUN: | FileCheck -check-prefix=RV32I-WITHFP %s12 13; This file contains tests that should have identical output for the ilp32,14; and ilp32f. As well as calling convention details, we check that15; ra and fp are consistently stored to fp-4 and fp-8.16 17; Check that on RV32 ilp32[f], double is passed in a pair of registers. Unlike18; the convention for varargs, this need not be an aligned pair.19 20define i32 @callee_double_in_regs(i32 %a, double %b) nounwind {21; RV32I-FPELIM-LABEL: callee_double_in_regs:22; RV32I-FPELIM: # %bb.0:23; RV32I-FPELIM-NEXT: addi sp, sp, -1624; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill25; RV32I-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill26; RV32I-FPELIM-NEXT: mv s0, a027; RV32I-FPELIM-NEXT: mv a0, a128; RV32I-FPELIM-NEXT: mv a1, a229; RV32I-FPELIM-NEXT: call __fixdfsi30; RV32I-FPELIM-NEXT: add a0, s0, a031; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload32; RV32I-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload33; RV32I-FPELIM-NEXT: addi sp, sp, 1634; RV32I-FPELIM-NEXT: ret35;36; RV32I-WITHFP-LABEL: callee_double_in_regs:37; RV32I-WITHFP: # %bb.0:38; RV32I-WITHFP-NEXT: addi sp, sp, -1639; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill40; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill41; RV32I-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill42; RV32I-WITHFP-NEXT: addi s0, sp, 1643; RV32I-WITHFP-NEXT: mv s1, a044; RV32I-WITHFP-NEXT: mv a0, a145; RV32I-WITHFP-NEXT: mv a1, a246; RV32I-WITHFP-NEXT: call __fixdfsi47; RV32I-WITHFP-NEXT: add a0, s1, a048; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload49; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload50; RV32I-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload51; RV32I-WITHFP-NEXT: addi sp, sp, 1652; RV32I-WITHFP-NEXT: ret53 %b_fptosi = fptosi double %b to i3254 %1 = add i32 %a, %b_fptosi55 ret i32 %156}57 58define i32 @caller_double_in_regs() nounwind {59; RV32I-FPELIM-LABEL: caller_double_in_regs:60; RV32I-FPELIM: # %bb.0:61; RV32I-FPELIM-NEXT: addi sp, sp, -1662; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill63; RV32I-FPELIM-NEXT: li a0, 164; RV32I-FPELIM-NEXT: lui a2, 26214465; RV32I-FPELIM-NEXT: li a1, 066; RV32I-FPELIM-NEXT: call callee_double_in_regs67; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload68; RV32I-FPELIM-NEXT: addi sp, sp, 1669; RV32I-FPELIM-NEXT: ret70;71; RV32I-WITHFP-LABEL: caller_double_in_regs:72; RV32I-WITHFP: # %bb.0:73; RV32I-WITHFP-NEXT: addi sp, sp, -1674; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill75; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill76; RV32I-WITHFP-NEXT: addi s0, sp, 1677; RV32I-WITHFP-NEXT: li a0, 178; RV32I-WITHFP-NEXT: lui a2, 26214479; RV32I-WITHFP-NEXT: li a1, 080; RV32I-WITHFP-NEXT: call callee_double_in_regs81; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload82; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload83; RV32I-WITHFP-NEXT: addi sp, sp, 1684; RV32I-WITHFP-NEXT: ret85 %1 = call i32 @callee_double_in_regs(i32 1, double 2.0)86 ret i32 %187}88 89; Check 2x*xlen values are aligned appropriately when passed on the stack90; Must keep define on a single line due to an update_llc_test_checks.py limitation91define i32 @callee_aligned_stack(i32 %a, i32 %b, fp128 %c, i32 %d, i32 %e, i64 %f, i32 %g, i32 %h, double %i, i32 %j, [2 x i32] %k) nounwind {92; The double should be 8-byte aligned on the stack, but the two-element array93; should only be 4-byte aligned94; RV32I-FPELIM-LABEL: callee_aligned_stack:95; RV32I-FPELIM: # %bb.0:96; RV32I-FPELIM-NEXT: lw a0, 0(a2)97; RV32I-FPELIM-NEXT: lw a1, 8(sp)98; RV32I-FPELIM-NEXT: lw a2, 0(sp)99; RV32I-FPELIM-NEXT: lw a3, 20(sp)100; RV32I-FPELIM-NEXT: lw a4, 16(sp)101; RV32I-FPELIM-NEXT: add a0, a0, a7102; RV32I-FPELIM-NEXT: add a1, a2, a1103; RV32I-FPELIM-NEXT: add a0, a0, a1104; RV32I-FPELIM-NEXT: add a3, a4, a3105; RV32I-FPELIM-NEXT: add a0, a0, a3106; RV32I-FPELIM-NEXT: ret107;108; RV32I-WITHFP-LABEL: callee_aligned_stack:109; RV32I-WITHFP: # %bb.0:110; RV32I-WITHFP-NEXT: addi sp, sp, -16111; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill112; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill113; RV32I-WITHFP-NEXT: addi s0, sp, 16114; RV32I-WITHFP-NEXT: lw a0, 0(a2)115; RV32I-WITHFP-NEXT: lw a1, 8(s0)116; RV32I-WITHFP-NEXT: lw a2, 0(s0)117; RV32I-WITHFP-NEXT: lw a3, 20(s0)118; RV32I-WITHFP-NEXT: lw a4, 16(s0)119; RV32I-WITHFP-NEXT: add a0, a0, a7120; RV32I-WITHFP-NEXT: add a1, a2, a1121; RV32I-WITHFP-NEXT: add a0, a0, a1122; RV32I-WITHFP-NEXT: add a3, a4, a3123; RV32I-WITHFP-NEXT: add a0, a0, a3124; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload125; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload126; RV32I-WITHFP-NEXT: addi sp, sp, 16127; RV32I-WITHFP-NEXT: ret128 %1 = bitcast fp128 %c to i128129 %2 = trunc i128 %1 to i32130 %3 = add i32 %2, %g131 %4 = add i32 %3, %h132 %5 = bitcast double %i to i64133 %6 = trunc i64 %5 to i32134 %7 = add i32 %4, %6135 %8 = add i32 %7, %j136 %9 = extractvalue [2 x i32] %k, 0137 %10 = add i32 %8, %9138 ret i32 %10139}140 141define void @caller_aligned_stack() nounwind {142; The double should be 8-byte aligned on the stack, but the two-element array143; should only be 4-byte aligned144; RV32I-FPELIM-LABEL: caller_aligned_stack:145; RV32I-FPELIM: # %bb.0:146; RV32I-FPELIM-NEXT: addi sp, sp, -64147; RV32I-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill148; RV32I-FPELIM-NEXT: sw s0, 56(sp) # 4-byte Folded Spill149; RV32I-FPELIM-NEXT: li a5, 18150; RV32I-FPELIM-NEXT: li a6, 17151; RV32I-FPELIM-NEXT: li a7, 16152; RV32I-FPELIM-NEXT: lui t0, 262236153; RV32I-FPELIM-NEXT: lui t1, 377487154; RV32I-FPELIM-NEXT: li t2, 15155; RV32I-FPELIM-NEXT: lui t3, 262153156; RV32I-FPELIM-NEXT: lui t4, 545260157; RV32I-FPELIM-NEXT: lui t5, 964690158; RV32I-FPELIM-NEXT: lui t6, 335544159; RV32I-FPELIM-NEXT: lui s0, 688509160; RV32I-FPELIM-NEXT: li a0, 1161; RV32I-FPELIM-NEXT: li a1, 11162; RV32I-FPELIM-NEXT: addi a2, sp, 32163; RV32I-FPELIM-NEXT: li a3, 12164; RV32I-FPELIM-NEXT: li a4, 13165; RV32I-FPELIM-NEXT: sw a6, 20(sp)166; RV32I-FPELIM-NEXT: sw a5, 24(sp)167; RV32I-FPELIM-NEXT: li a6, 4168; RV32I-FPELIM-NEXT: addi a5, t0, 655169; RV32I-FPELIM-NEXT: addi t0, t1, 1475170; RV32I-FPELIM-NEXT: sw t2, 0(sp)171; RV32I-FPELIM-NEXT: sw t0, 8(sp)172; RV32I-FPELIM-NEXT: sw a5, 12(sp)173; RV32I-FPELIM-NEXT: sw a7, 16(sp)174; RV32I-FPELIM-NEXT: li a7, 14175; RV32I-FPELIM-NEXT: addi t0, t3, 491176; RV32I-FPELIM-NEXT: addi t1, t4, -1967177; RV32I-FPELIM-NEXT: addi t2, t5, -328178; RV32I-FPELIM-NEXT: addi t3, t6, 1311179; RV32I-FPELIM-NEXT: addi a5, s0, -2048180; RV32I-FPELIM-NEXT: sw t3, 32(sp)181; RV32I-FPELIM-NEXT: sw t2, 36(sp)182; RV32I-FPELIM-NEXT: sw t1, 40(sp)183; RV32I-FPELIM-NEXT: sw t0, 44(sp)184; RV32I-FPELIM-NEXT: call callee_aligned_stack185; RV32I-FPELIM-NEXT: lw ra, 60(sp) # 4-byte Folded Reload186; RV32I-FPELIM-NEXT: lw s0, 56(sp) # 4-byte Folded Reload187; RV32I-FPELIM-NEXT: addi sp, sp, 64188; RV32I-FPELIM-NEXT: ret189;190; RV32I-WITHFP-LABEL: caller_aligned_stack:191; RV32I-WITHFP: # %bb.0:192; RV32I-WITHFP-NEXT: addi sp, sp, -64193; RV32I-WITHFP-NEXT: sw ra, 60(sp) # 4-byte Folded Spill194; RV32I-WITHFP-NEXT: sw s0, 56(sp) # 4-byte Folded Spill195; RV32I-WITHFP-NEXT: sw s1, 52(sp) # 4-byte Folded Spill196; RV32I-WITHFP-NEXT: addi s0, sp, 64197; RV32I-WITHFP-NEXT: li a5, 18198; RV32I-WITHFP-NEXT: li a6, 17199; RV32I-WITHFP-NEXT: li a7, 16200; RV32I-WITHFP-NEXT: lui t0, 262236201; RV32I-WITHFP-NEXT: lui t1, 377487202; RV32I-WITHFP-NEXT: li t2, 15203; RV32I-WITHFP-NEXT: lui t3, 262153204; RV32I-WITHFP-NEXT: lui t4, 545260205; RV32I-WITHFP-NEXT: lui t5, 964690206; RV32I-WITHFP-NEXT: lui t6, 335544207; RV32I-WITHFP-NEXT: lui s1, 688509208; RV32I-WITHFP-NEXT: li a0, 1209; RV32I-WITHFP-NEXT: li a1, 11210; RV32I-WITHFP-NEXT: addi a2, s0, -32211; RV32I-WITHFP-NEXT: li a3, 12212; RV32I-WITHFP-NEXT: li a4, 13213; RV32I-WITHFP-NEXT: sw a6, 20(sp)214; RV32I-WITHFP-NEXT: sw a5, 24(sp)215; RV32I-WITHFP-NEXT: li a6, 4216; RV32I-WITHFP-NEXT: addi a5, t0, 655217; RV32I-WITHFP-NEXT: addi t0, t1, 1475218; RV32I-WITHFP-NEXT: sw t2, 0(sp)219; RV32I-WITHFP-NEXT: sw t0, 8(sp)220; RV32I-WITHFP-NEXT: sw a5, 12(sp)221; RV32I-WITHFP-NEXT: sw a7, 16(sp)222; RV32I-WITHFP-NEXT: li a7, 14223; RV32I-WITHFP-NEXT: addi t0, t3, 491224; RV32I-WITHFP-NEXT: addi t1, t4, -1967225; RV32I-WITHFP-NEXT: addi t2, t5, -328226; RV32I-WITHFP-NEXT: addi t3, t6, 1311227; RV32I-WITHFP-NEXT: addi a5, s1, -2048228; RV32I-WITHFP-NEXT: sw t3, -32(s0)229; RV32I-WITHFP-NEXT: sw t2, -28(s0)230; RV32I-WITHFP-NEXT: sw t1, -24(s0)231; RV32I-WITHFP-NEXT: sw t0, -20(s0)232; RV32I-WITHFP-NEXT: call callee_aligned_stack233; RV32I-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload234; RV32I-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload235; RV32I-WITHFP-NEXT: lw s1, 52(sp) # 4-byte Folded Reload236; RV32I-WITHFP-NEXT: addi sp, sp, 64237; RV32I-WITHFP-NEXT: ret238 %1 = call i32 @callee_aligned_stack(i32 1, i32 11,239 fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13,240 i64 20000000000, i32 14, i32 15, double 2.720000e+00, i32 16,241 [2 x i32] [i32 17, i32 18])242 ret void243}244 245define double @callee_small_scalar_ret() nounwind {246; RV32I-FPELIM-LABEL: callee_small_scalar_ret:247; RV32I-FPELIM: # %bb.0:248; RV32I-FPELIM-NEXT: lui a1, 261888249; RV32I-FPELIM-NEXT: li a0, 0250; RV32I-FPELIM-NEXT: ret251;252; RV32I-WITHFP-LABEL: callee_small_scalar_ret:253; RV32I-WITHFP: # %bb.0:254; RV32I-WITHFP-NEXT: addi sp, sp, -16255; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill256; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill257; RV32I-WITHFP-NEXT: addi s0, sp, 16258; RV32I-WITHFP-NEXT: lui a1, 261888259; RV32I-WITHFP-NEXT: li a0, 0260; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload261; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload262; RV32I-WITHFP-NEXT: addi sp, sp, 16263; RV32I-WITHFP-NEXT: ret264 ret double 1.0265}266 267define i64 @caller_small_scalar_ret() nounwind {268; RV32I-FPELIM-LABEL: caller_small_scalar_ret:269; RV32I-FPELIM: # %bb.0:270; RV32I-FPELIM-NEXT: addi sp, sp, -16271; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill272; RV32I-FPELIM-NEXT: call callee_small_scalar_ret273; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload274; RV32I-FPELIM-NEXT: addi sp, sp, 16275; RV32I-FPELIM-NEXT: ret276;277; RV32I-WITHFP-LABEL: caller_small_scalar_ret:278; RV32I-WITHFP: # %bb.0:279; RV32I-WITHFP-NEXT: addi sp, sp, -16280; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill281; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill282; RV32I-WITHFP-NEXT: addi s0, sp, 16283; RV32I-WITHFP-NEXT: call callee_small_scalar_ret284; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload285; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload286; RV32I-WITHFP-NEXT: addi sp, sp, 16287; RV32I-WITHFP-NEXT: ret288 %1 = call double @callee_small_scalar_ret()289 %2 = bitcast double %1 to i64290 ret i64 %2291}292