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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32I-FPELIM %s4; RUN: llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all < %s \5; RUN: | FileCheck -check-prefix=RV32I-WITHFP %s6 7; As well as calling convention details, we check that ra and fp are8; consistently stored to fp-4 and fp-8.9 10; Any tests that would have identical output for some combination of the ilp32*11; ABIs belong in calling-conv-*-common.ll. This file contains tests that will12; have different output across those ABIs. i.e. where some arguments would be13; passed according to the floating point ABI.14 15define i32 @callee_float_in_regs(i32 %a, float %b) nounwind {16; RV32I-FPELIM-LABEL: callee_float_in_regs:17; RV32I-FPELIM: # %bb.0:18; RV32I-FPELIM-NEXT: addi sp, sp, -1619; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill20; RV32I-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill21; RV32I-FPELIM-NEXT: mv s0, a022; RV32I-FPELIM-NEXT: mv a0, a123; RV32I-FPELIM-NEXT: call __fixsfsi24; RV32I-FPELIM-NEXT: add a0, s0, a025; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload26; RV32I-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload27; RV32I-FPELIM-NEXT: addi sp, sp, 1628; RV32I-FPELIM-NEXT: ret29;30; RV32I-WITHFP-LABEL: callee_float_in_regs:31; RV32I-WITHFP: # %bb.0:32; RV32I-WITHFP-NEXT: addi sp, sp, -1633; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill34; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill35; RV32I-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill36; RV32I-WITHFP-NEXT: addi s0, sp, 1637; RV32I-WITHFP-NEXT: mv s1, a038; RV32I-WITHFP-NEXT: mv a0, a139; RV32I-WITHFP-NEXT: call __fixsfsi40; RV32I-WITHFP-NEXT: add a0, s1, a041; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload42; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload43; RV32I-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload44; RV32I-WITHFP-NEXT: addi sp, sp, 1645; RV32I-WITHFP-NEXT: ret46 %b_fptosi = fptosi float %b to i3247 %1 = add i32 %a, %b_fptosi48 ret i32 %149}50 51define i32 @caller_float_in_regs() nounwind {52; RV32I-FPELIM-LABEL: caller_float_in_regs:53; RV32I-FPELIM: # %bb.0:54; RV32I-FPELIM-NEXT: addi sp, sp, -1655; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill56; RV32I-FPELIM-NEXT: li a0, 157; RV32I-FPELIM-NEXT: lui a1, 26214458; RV32I-FPELIM-NEXT: call callee_float_in_regs59; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload60; RV32I-FPELIM-NEXT: addi sp, sp, 1661; RV32I-FPELIM-NEXT: ret62;63; RV32I-WITHFP-LABEL: caller_float_in_regs:64; RV32I-WITHFP: # %bb.0:65; RV32I-WITHFP-NEXT: addi sp, sp, -1666; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill67; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill68; RV32I-WITHFP-NEXT: addi s0, sp, 1669; RV32I-WITHFP-NEXT: li a0, 170; RV32I-WITHFP-NEXT: lui a1, 26214471; RV32I-WITHFP-NEXT: call callee_float_in_regs72; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload73; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload74; RV32I-WITHFP-NEXT: addi sp, sp, 1675; RV32I-WITHFP-NEXT: ret76 %1 = call i32 @callee_float_in_regs(i32 1, float 2.0)77 ret i32 %178}79 80define i32 @callee_float_on_stack(i64 %a, i64 %b, i64 %c, i64 %d, float %e) nounwind {81; RV32I-FPELIM-LABEL: callee_float_on_stack:82; RV32I-FPELIM: # %bb.0:83; RV32I-FPELIM-NEXT: lw a0, 0(sp)84; RV32I-FPELIM-NEXT: add a0, a6, a085; RV32I-FPELIM-NEXT: ret86;87; RV32I-WITHFP-LABEL: callee_float_on_stack:88; RV32I-WITHFP: # %bb.0:89; RV32I-WITHFP-NEXT: addi sp, sp, -1690; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill91; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill92; RV32I-WITHFP-NEXT: addi s0, sp, 1693; RV32I-WITHFP-NEXT: lw a0, 0(s0)94; RV32I-WITHFP-NEXT: add a0, a6, a095; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload96; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload97; RV32I-WITHFP-NEXT: addi sp, sp, 1698; RV32I-WITHFP-NEXT: ret99 %1 = trunc i64 %d to i32100 %2 = bitcast float %e to i32101 %3 = add i32 %1, %2102 ret i32 %3103}104 105define i32 @caller_float_on_stack() nounwind {106; RV32I-FPELIM-LABEL: caller_float_on_stack:107; RV32I-FPELIM: # %bb.0:108; RV32I-FPELIM-NEXT: addi sp, sp, -16109; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill110; RV32I-FPELIM-NEXT: lui a1, 264704111; RV32I-FPELIM-NEXT: li a0, 1112; RV32I-FPELIM-NEXT: li a2, 2113; RV32I-FPELIM-NEXT: li a4, 3114; RV32I-FPELIM-NEXT: li a6, 4115; RV32I-FPELIM-NEXT: sw a1, 0(sp)116; RV32I-FPELIM-NEXT: li a1, 0117; RV32I-FPELIM-NEXT: li a3, 0118; RV32I-FPELIM-NEXT: li a5, 0119; RV32I-FPELIM-NEXT: li a7, 0120; RV32I-FPELIM-NEXT: call callee_float_on_stack121; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload122; RV32I-FPELIM-NEXT: addi sp, sp, 16123; RV32I-FPELIM-NEXT: ret124;125; RV32I-WITHFP-LABEL: caller_float_on_stack:126; RV32I-WITHFP: # %bb.0:127; RV32I-WITHFP-NEXT: addi sp, sp, -16128; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill129; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill130; RV32I-WITHFP-NEXT: addi s0, sp, 16131; RV32I-WITHFP-NEXT: lui a1, 264704132; RV32I-WITHFP-NEXT: li a0, 1133; RV32I-WITHFP-NEXT: li a2, 2134; RV32I-WITHFP-NEXT: li a4, 3135; RV32I-WITHFP-NEXT: li a6, 4136; RV32I-WITHFP-NEXT: sw a1, 0(sp)137; RV32I-WITHFP-NEXT: li a1, 0138; RV32I-WITHFP-NEXT: li a3, 0139; RV32I-WITHFP-NEXT: li a5, 0140; RV32I-WITHFP-NEXT: li a7, 0141; RV32I-WITHFP-NEXT: call callee_float_on_stack142; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload143; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload144; RV32I-WITHFP-NEXT: addi sp, sp, 16145; RV32I-WITHFP-NEXT: ret146 %1 = call i32 @callee_float_on_stack(i64 1, i64 2, i64 3, i64 4, float 5.0)147 ret i32 %1148}149 150define float @callee_tiny_scalar_ret() nounwind {151; RV32I-FPELIM-LABEL: callee_tiny_scalar_ret:152; RV32I-FPELIM: # %bb.0:153; RV32I-FPELIM-NEXT: lui a0, 260096154; RV32I-FPELIM-NEXT: ret155;156; RV32I-WITHFP-LABEL: callee_tiny_scalar_ret:157; RV32I-WITHFP: # %bb.0:158; RV32I-WITHFP-NEXT: addi sp, sp, -16159; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill160; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill161; RV32I-WITHFP-NEXT: addi s0, sp, 16162; RV32I-WITHFP-NEXT: lui a0, 260096163; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload164; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload165; RV32I-WITHFP-NEXT: addi sp, sp, 16166; RV32I-WITHFP-NEXT: ret167 ret float 1.0168}169 170define i32 @caller_tiny_scalar_ret() nounwind {171; RV32I-FPELIM-LABEL: caller_tiny_scalar_ret:172; RV32I-FPELIM: # %bb.0:173; RV32I-FPELIM-NEXT: addi sp, sp, -16174; RV32I-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill175; RV32I-FPELIM-NEXT: call callee_tiny_scalar_ret176; RV32I-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload177; RV32I-FPELIM-NEXT: addi sp, sp, 16178; RV32I-FPELIM-NEXT: ret179;180; RV32I-WITHFP-LABEL: caller_tiny_scalar_ret:181; RV32I-WITHFP: # %bb.0:182; RV32I-WITHFP-NEXT: addi sp, sp, -16183; RV32I-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill184; RV32I-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill185; RV32I-WITHFP-NEXT: addi s0, sp, 16186; RV32I-WITHFP-NEXT: call callee_tiny_scalar_ret187; RV32I-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload188; RV32I-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload189; RV32I-WITHFP-NEXT: addi sp, sp, 16190; RV32I-WITHFP-NEXT: ret191 %1 = call float @callee_tiny_scalar_ret()192 %2 = bitcast float %1 to i32193 ret i32 %2194}195