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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV64I-FPELIM %s4; RUN: llc -mtriple=riscv64 -verify-machineinstrs -frame-pointer=all < %s \5; RUN: | FileCheck -check-prefix=RV64I-WITHFP %s6 7; As well as calling convention details, we check that ra and fp are8; consistently stored to fp-8 and fp-16.9 10; Any tests that would have identical output for some combination of the lp64*11; ABIs belong in calling-conv-*-common.ll. This file contains tests that will12; have different output across those ABIs. i.e. where some arguments would be13; passed according to the floating point ABI.14 15; TODO: softened float values can be passed anyext.16 17define i64 @callee_float_in_regs(i64 %a, float %b) nounwind {18; RV64I-FPELIM-LABEL: callee_float_in_regs:19; RV64I-FPELIM: # %bb.0:20; RV64I-FPELIM-NEXT: addi sp, sp, -1621; RV64I-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill22; RV64I-FPELIM-NEXT: sd s0, 0(sp) # 8-byte Folded Spill23; RV64I-FPELIM-NEXT: mv s0, a024; RV64I-FPELIM-NEXT: mv a0, a125; RV64I-FPELIM-NEXT: call __fixsfdi26; RV64I-FPELIM-NEXT: add a0, s0, a027; RV64I-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload28; RV64I-FPELIM-NEXT: ld s0, 0(sp) # 8-byte Folded Reload29; RV64I-FPELIM-NEXT: addi sp, sp, 1630; RV64I-FPELIM-NEXT: ret31;32; RV64I-WITHFP-LABEL: callee_float_in_regs:33; RV64I-WITHFP: # %bb.0:34; RV64I-WITHFP-NEXT: addi sp, sp, -3235; RV64I-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill36; RV64I-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill37; RV64I-WITHFP-NEXT: sd s1, 8(sp) # 8-byte Folded Spill38; RV64I-WITHFP-NEXT: addi s0, sp, 3239; RV64I-WITHFP-NEXT: mv s1, a040; RV64I-WITHFP-NEXT: mv a0, a141; RV64I-WITHFP-NEXT: call __fixsfdi42; RV64I-WITHFP-NEXT: add a0, s1, a043; RV64I-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload44; RV64I-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload45; RV64I-WITHFP-NEXT: ld s1, 8(sp) # 8-byte Folded Reload46; RV64I-WITHFP-NEXT: addi sp, sp, 3247; RV64I-WITHFP-NEXT: ret48 %b_fptosi = fptosi float %b to i6449 %1 = add i64 %a, %b_fptosi50 ret i64 %151}52 53define i64 @caller_float_in_regs() nounwind {54; RV64I-FPELIM-LABEL: caller_float_in_regs:55; RV64I-FPELIM: # %bb.0:56; RV64I-FPELIM-NEXT: addi sp, sp, -1657; RV64I-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill58; RV64I-FPELIM-NEXT: li a0, 159; RV64I-FPELIM-NEXT: lui a1, 26214460; RV64I-FPELIM-NEXT: call callee_float_in_regs61; RV64I-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload62; RV64I-FPELIM-NEXT: addi sp, sp, 1663; RV64I-FPELIM-NEXT: ret64;65; RV64I-WITHFP-LABEL: caller_float_in_regs:66; RV64I-WITHFP: # %bb.0:67; RV64I-WITHFP-NEXT: addi sp, sp, -1668; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill69; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill70; RV64I-WITHFP-NEXT: addi s0, sp, 1671; RV64I-WITHFP-NEXT: li a0, 172; RV64I-WITHFP-NEXT: lui a1, 26214473; RV64I-WITHFP-NEXT: call callee_float_in_regs74; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload75; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload76; RV64I-WITHFP-NEXT: addi sp, sp, 1677; RV64I-WITHFP-NEXT: ret78 %1 = call i64 @callee_float_in_regs(i64 1, float 2.0)79 ret i64 %180}81 82define i64 @callee_float_on_stack(i128 %a, i128 %b, i128 %c, i128 %d, float %e) nounwind {83; RV64I-FPELIM-LABEL: callee_float_on_stack:84; RV64I-FPELIM: # %bb.0:85; RV64I-FPELIM-NEXT: lw a0, 0(sp)86; RV64I-FPELIM-NEXT: ret87;88; RV64I-WITHFP-LABEL: callee_float_on_stack:89; RV64I-WITHFP: # %bb.0:90; RV64I-WITHFP-NEXT: addi sp, sp, -1691; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill92; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill93; RV64I-WITHFP-NEXT: addi s0, sp, 1694; RV64I-WITHFP-NEXT: lw a0, 0(s0)95; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload96; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload97; RV64I-WITHFP-NEXT: addi sp, sp, 1698; RV64I-WITHFP-NEXT: ret99 %1 = trunc i128 %d to i64100 %2 = bitcast float %e to i32101 %3 = sext i32 %2 to i64102 %4 = add i64 %1, %3103 ret i64 %3104}105 106define i64 @caller_float_on_stack() nounwind {107; RV64I-FPELIM-LABEL: caller_float_on_stack:108; RV64I-FPELIM: # %bb.0:109; RV64I-FPELIM-NEXT: addi sp, sp, -16110; RV64I-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill111; RV64I-FPELIM-NEXT: lui a1, 264704112; RV64I-FPELIM-NEXT: li a0, 1113; RV64I-FPELIM-NEXT: li a2, 2114; RV64I-FPELIM-NEXT: li a4, 3115; RV64I-FPELIM-NEXT: li a6, 4116; RV64I-FPELIM-NEXT: sd a1, 0(sp)117; RV64I-FPELIM-NEXT: li a1, 0118; RV64I-FPELIM-NEXT: li a3, 0119; RV64I-FPELIM-NEXT: li a5, 0120; RV64I-FPELIM-NEXT: li a7, 0121; RV64I-FPELIM-NEXT: call callee_float_on_stack122; RV64I-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload123; RV64I-FPELIM-NEXT: addi sp, sp, 16124; RV64I-FPELIM-NEXT: ret125;126; RV64I-WITHFP-LABEL: caller_float_on_stack:127; RV64I-WITHFP: # %bb.0:128; RV64I-WITHFP-NEXT: addi sp, sp, -32129; RV64I-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill130; RV64I-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill131; RV64I-WITHFP-NEXT: addi s0, sp, 32132; RV64I-WITHFP-NEXT: lui a1, 264704133; RV64I-WITHFP-NEXT: li a0, 1134; RV64I-WITHFP-NEXT: li a2, 2135; RV64I-WITHFP-NEXT: li a4, 3136; RV64I-WITHFP-NEXT: li a6, 4137; RV64I-WITHFP-NEXT: sd a1, 0(sp)138; RV64I-WITHFP-NEXT: li a1, 0139; RV64I-WITHFP-NEXT: li a3, 0140; RV64I-WITHFP-NEXT: li a5, 0141; RV64I-WITHFP-NEXT: li a7, 0142; RV64I-WITHFP-NEXT: call callee_float_on_stack143; RV64I-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload144; RV64I-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload145; RV64I-WITHFP-NEXT: addi sp, sp, 32146; RV64I-WITHFP-NEXT: ret147 %1 = call i64 @callee_float_on_stack(i128 1, i128 2, i128 3, i128 4, float 5.0)148 ret i64 %1149}150 151define float @callee_tiny_scalar_ret() nounwind {152; RV64I-FPELIM-LABEL: callee_tiny_scalar_ret:153; RV64I-FPELIM: # %bb.0:154; RV64I-FPELIM-NEXT: lui a0, 260096155; RV64I-FPELIM-NEXT: ret156;157; RV64I-WITHFP-LABEL: callee_tiny_scalar_ret:158; RV64I-WITHFP: # %bb.0:159; RV64I-WITHFP-NEXT: addi sp, sp, -16160; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill161; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill162; RV64I-WITHFP-NEXT: addi s0, sp, 16163; RV64I-WITHFP-NEXT: lui a0, 260096164; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload165; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload166; RV64I-WITHFP-NEXT: addi sp, sp, 16167; RV64I-WITHFP-NEXT: ret168 ret float 1.0169}170 171; The sign extension of the float return is necessary, as softened floats are172; passed anyext.173 174define i64 @caller_tiny_scalar_ret() nounwind {175; RV64I-FPELIM-LABEL: caller_tiny_scalar_ret:176; RV64I-FPELIM: # %bb.0:177; RV64I-FPELIM-NEXT: addi sp, sp, -16178; RV64I-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill179; RV64I-FPELIM-NEXT: call callee_tiny_scalar_ret180; RV64I-FPELIM-NEXT: sext.w a0, a0181; RV64I-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload182; RV64I-FPELIM-NEXT: addi sp, sp, 16183; RV64I-FPELIM-NEXT: ret184;185; RV64I-WITHFP-LABEL: caller_tiny_scalar_ret:186; RV64I-WITHFP: # %bb.0:187; RV64I-WITHFP-NEXT: addi sp, sp, -16188; RV64I-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill189; RV64I-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill190; RV64I-WITHFP-NEXT: addi s0, sp, 16191; RV64I-WITHFP-NEXT: call callee_tiny_scalar_ret192; RV64I-WITHFP-NEXT: sext.w a0, a0193; RV64I-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload194; RV64I-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload195; RV64I-WITHFP-NEXT: addi sp, sp, 16196; RV64I-WITHFP-NEXT: ret197 %1 = call float @callee_tiny_scalar_ret()198 %2 = bitcast float %1 to i32199 %3 = sext i32 %2 to i64200 ret i64 %3201}202