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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi ilp32e -verify-machineinstrs < %s \3; RUN: | FileCheck %s -check-prefix=RV32IF-ILP32E4 5; Exercises the ILP32E calling convention code in the case that f32 is a legal6; type. As well as testing that lowering is correct, these tests also aim to7; check that floating point load/store or integer load/store is chosen8; optimally when floats are passed on the stack.9 10define float @onstack_f32_noop(i64 %a, i64 %b, i64 %c, i64 %d, float %e, float %f) nounwind {11; RV32IF-ILP32E-LABEL: onstack_f32_noop:12; RV32IF-ILP32E: # %bb.0:13; RV32IF-ILP32E-NEXT: lw a0, 12(sp)14; RV32IF-ILP32E-NEXT: ret15 ret float %f16}17 18define float @onstack_f32_fadd(i64 %a, i64 %b, i64 %c, i64 %d, float %e, float %f) nounwind {19; RV32IF-ILP32E-LABEL: onstack_f32_fadd:20; RV32IF-ILP32E: # %bb.0:21; RV32IF-ILP32E-NEXT: flw fa5, 12(sp)22; RV32IF-ILP32E-NEXT: flw fa4, 8(sp)23; RV32IF-ILP32E-NEXT: fadd.s fa5, fa4, fa524; RV32IF-ILP32E-NEXT: fmv.x.w a0, fa525; RV32IF-ILP32E-NEXT: ret26 %1 = fadd float %e, %f27 ret float %128}29 30define float @caller_onstack_f32_noop(float %a) nounwind {31; RV32IF-ILP32E-LABEL: caller_onstack_f32_noop:32; RV32IF-ILP32E: # %bb.0:33; RV32IF-ILP32E-NEXT: addi sp, sp, -2034; RV32IF-ILP32E-NEXT: sw ra, 16(sp) # 4-byte Folded Spill35; RV32IF-ILP32E-NEXT: mv a1, a036; RV32IF-ILP32E-NEXT: lui a3, 26470437; RV32IF-ILP32E-NEXT: li a5, 438; RV32IF-ILP32E-NEXT: li a0, 139; RV32IF-ILP32E-NEXT: li a2, 240; RV32IF-ILP32E-NEXT: li a4, 341; RV32IF-ILP32E-NEXT: sw a5, 0(sp)42; RV32IF-ILP32E-NEXT: sw zero, 4(sp)43; RV32IF-ILP32E-NEXT: sw a3, 8(sp)44; RV32IF-ILP32E-NEXT: sw a1, 12(sp)45; RV32IF-ILP32E-NEXT: li a1, 046; RV32IF-ILP32E-NEXT: li a3, 047; RV32IF-ILP32E-NEXT: li a5, 048; RV32IF-ILP32E-NEXT: call onstack_f32_noop49; RV32IF-ILP32E-NEXT: lw ra, 16(sp) # 4-byte Folded Reload50; RV32IF-ILP32E-NEXT: addi sp, sp, 2051; RV32IF-ILP32E-NEXT: ret52 %1 = call float @onstack_f32_noop(i64 1, i64 2, i64 3, i64 4, float 5.0, float %a)53 ret float %154}55 56define float @caller_onstack_f32_fadd(float %a, float %b) nounwind {57; RV32IF-ILP32E-LABEL: caller_onstack_f32_fadd:58; RV32IF-ILP32E: # %bb.0:59; RV32IF-ILP32E-NEXT: addi sp, sp, -2060; RV32IF-ILP32E-NEXT: sw ra, 16(sp) # 4-byte Folded Spill61; RV32IF-ILP32E-NEXT: fmv.w.x fa5, a162; RV32IF-ILP32E-NEXT: fmv.w.x fa4, a063; RV32IF-ILP32E-NEXT: fadd.s fa3, fa4, fa564; RV32IF-ILP32E-NEXT: fsub.s fa5, fa5, fa465; RV32IF-ILP32E-NEXT: li a1, 466; RV32IF-ILP32E-NEXT: li a0, 167; RV32IF-ILP32E-NEXT: li a2, 268; RV32IF-ILP32E-NEXT: li a4, 369; RV32IF-ILP32E-NEXT: sw a1, 0(sp)70; RV32IF-ILP32E-NEXT: sw zero, 4(sp)71; RV32IF-ILP32E-NEXT: fsw fa3, 8(sp)72; RV32IF-ILP32E-NEXT: fsw fa5, 12(sp)73; RV32IF-ILP32E-NEXT: li a1, 074; RV32IF-ILP32E-NEXT: li a3, 075; RV32IF-ILP32E-NEXT: li a5, 076; RV32IF-ILP32E-NEXT: call onstack_f32_noop77; RV32IF-ILP32E-NEXT: lw ra, 16(sp) # 4-byte Folded Reload78; RV32IF-ILP32E-NEXT: addi sp, sp, 2079; RV32IF-ILP32E-NEXT: ret80 %1 = fadd float %a, %b81 %2 = fsub float %b, %a82 %3 = call float @onstack_f32_noop(i64 1, i64 2, i64 3, i64 4, float %1, float %2)83 ret float %384}85