593 lines · plain
1; This test is designed to run 4 times, once with function attribute +c,2; once with function attribute -c for eq/ne in icmp3; The optimization should appear only with +c, otherwise default isel should be4; choosen.5;6; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=+c,+f,+d -filetype=obj \7; RUN: -disable-block-placement < %s \8; RUN: | llvm-objdump -d --triple=riscv32 --mattr=+c,+f,+d -M no-aliases - \9; RUN: | FileCheck -check-prefix=RV32IFDC %s10;11; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=+zca,+f,+d -filetype=obj \12; RUN: -disable-block-placement < %s \13; RUN: | llvm-objdump -d --triple=riscv32 --mattr=+zca,+f,+d -M no-aliases - \14; RUN: | FileCheck -check-prefix=RV32IFDC %s15;16; RUN: llc -mtriple=riscv32 -target-abi ilp32d -mattr=-c,+f,+d -filetype=obj \17; RUN: -disable-block-placement < %s \18; RUN: | llvm-objdump -d --triple=riscv32 --mattr=-c,+f,+d -M no-aliases - \19; RUN: | FileCheck -check-prefix=RV32IFD %s20 21 22; constant is small and fit in 6 bit (compress imm)23; RV32IFDC-LABEL: <f_small_pos_eq>:24; RV32IFDC: c.li [[REG:.*]], 0x1425; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]26; --- no compress extension27; RV32IFD-LABEL: <f_small_pos_eq>:28; RV32IFD: addi [[REG:.*]], zero, 0x1429; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]30define i32 @f_small_pos_eq(i32 %in0) minsize {31 %cmp = icmp eq i32 %in0, 2032 br i1 %cmp, label %if.then, label %if.else33if.then:34 %call = shl i32 %in0, 135 br label %if.end36if.else:37 %call2 = add i32 %in0, 4238 br label %if.end39 40if.end:41 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]42 ret i32 %toRet43}44 45; constant is small and fit in 6 bit (compress imm)46; RV32IFDC-LABEL: <f_small_pos_ne>:47; RV32IFDC: c.li [[REG:.*]], 0x1448; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]49; --- no compress extension50; RV32IFD-LABEL: <f_small_pos_ne>:51; RV32IFD: addi [[REG:.*]], zero, 0x1452; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]53define i32 @f_small_pos_ne(i32 %in0) minsize {54 %cmp = icmp ne i32 %in0, 2055 br i1 %cmp, label %if.then, label %if.else56if.then:57 %call = shl i32 %in0, 158 br label %if.end59if.else:60 %call2 = add i32 %in0, 4261 br label %if.end62 63if.end:64 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]65 ret i32 %toRet66}67 68; constant is small and fit in 6 bit (compress imm)69; RV32IFDC-LABEL: <f_small_neg_eq>:70; RV32IFDC: c.li [[REG:.*]], -0x1471; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]72; --- no compress extension73; RV32IFD-LABEL: <f_small_neg_eq>:74; RV32IFD: addi [[REG:.*]], zero, -0x1475; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]76define i32 @f_small_neg_eq(i32 %in0) minsize {77 %cmp = icmp eq i32 %in0, -2078 br i1 %cmp, label %if.then, label %if.else79if.then:80 %call = shl i32 %in0, 181 br label %if.end82if.else:83 %call2 = add i32 %in0, 4284 br label %if.end85 86if.end:87 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]88 ret i32 %toRet89}90 91; constant is small and fit in 6 bit (compress imm)92; RV32IFDC-LABEL: <f_small_neg_ne>:93; RV32IFDC: c.li [[REG:.*]], -0x1494; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]95; --- no compress extension96; RV32IFD-LABEL: <f_small_neg_ne>:97; RV32IFD: addi [[REG:.*]], zero, -0x1498; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]99define i32 @f_small_neg_ne(i32 %in0) minsize {100 %cmp = icmp ne i32 %in0, -20101 br i1 %cmp, label %if.then, label %if.else102if.then:103 %call = shl i32 %in0, 1104 br label %if.end105if.else:106 %call2 = add i32 %in0, 42107 br label %if.end108 109if.end:110 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]111 ret i32 %toRet112}113 114; constant is small and fit in 6 bit (compress imm)115; RV32IFDC-LABEL: <f_small_edge_pos_eq>:116; RV32IFDC: c.li [[REG:.*]], 0x1f117; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]118; --- no compress extension119; RV32IFD-LABEL: <f_small_edge_pos_eq>:120; RV32IFD: addi [[REG:.*]], zero, 0x1f121; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]122define i32 @f_small_edge_pos_eq(i32 %in0) minsize {123 %cmp = icmp eq i32 %in0, 31124 br i1 %cmp, label %if.then, label %if.else125if.then:126 %call = shl i32 %in0, 1127 br label %if.end128if.else:129 %call2 = add i32 %in0, 42130 br label %if.end131 132if.end:133 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]134 ret i32 %toRet135}136 137; constant is small and fit in 6 bit (compress imm)138; RV32IFDC-LABEL: <f_small_edge_pos_ne>:139; RV32IFDC: c.li [[REG:.*]], 0x1f140; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]141; --- no compress extension142; RV32IFD-LABEL: <f_small_edge_pos_ne>:143; RV32IFD: addi [[REG:.*]], zero, 0x1f144; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]145define i32 @f_small_edge_pos_ne(i32 %in0) minsize {146 %cmp = icmp ne i32 %in0, 31147 br i1 %cmp, label %if.then, label %if.else148if.then:149 %call = shl i32 %in0, 1150 br label %if.end151if.else:152 %call2 = add i32 %in0, 42153 br label %if.end154 155if.end:156 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]157 ret i32 %toRet158}159 160; constant is small and fit in 6 bit (compress imm)161; RV32IFDC-LABEL: <f_small_edge_neg_eq>:162; RV32IFDC: c.li [[REG:.*]], -0x20163; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]164; --- no compress extension165; RV32IFD-LABEL: <f_small_edge_neg_eq>:166; RV32IFD: addi [[REG:.*]], zero, -0x20167; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]168define i32 @f_small_edge_neg_eq(i32 %in0) minsize {169 %cmp = icmp eq i32 %in0, -32170 br i1 %cmp, label %if.then, label %if.else171if.then:172 %call = shl i32 %in0, 1173 br label %if.end174if.else:175 %call2 = add i32 %in0, 42176 br label %if.end177 178if.end:179 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]180 ret i32 %toRet181}182 183; constant is small and fit in 6 bit (compress imm)184; RV32IFDC-LABEL: <f_small_edge_neg_ne>:185; RV32IFDC: c.li [[REG:.*]], -0x20186; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]187; --- no compress extension188; RV32IFD-LABEL: <f_small_edge_neg_ne>:189; RV32IFD: addi [[REG:.*]], zero, -0x20190; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]191define i32 @f_small_edge_neg_ne(i32 %in0) minsize {192 %cmp = icmp ne i32 %in0, -32193 br i1 %cmp, label %if.then, label %if.else194if.then:195 %call = shl i32 %in0, 1196 br label %if.end197if.else:198 %call2 = add i32 %in0, 42199 br label %if.end200 201if.end:202 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]203 ret i32 %toRet204}205 206; constant is medium and not fit in 6 bit (compress imm),207; but fit in 12 bit (imm)208; RV32IFDC-LABEL: <f_medium_ledge_pos_eq>:209; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x20210; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]211; --- no compress extension212; RV32IFD-LABEL: <f_medium_ledge_pos_eq>:213; RV32IFD: addi [[REG:.*]], zero, 0x20214; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]215define i32 @f_medium_ledge_pos_eq(i32 %in0) minsize {216 %cmp = icmp eq i32 %in0, 32217 br i1 %cmp, label %if.then, label %if.else218if.then:219 %call = shl i32 %in0, 1220 br label %if.end221if.else:222 %call2 = add i32 %in0, 42223 br label %if.end224 225if.end:226 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]227 ret i32 %toRet228}229 230; constant is medium and not fit in 6 bit (compress imm),231; but fit in 12 bit (imm)232; RV32IFDC-LABEL: <f_medium_ledge_pos_ne>:233; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x20234; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]235; --- no compress extension236; RV32IFD-LABEL: <f_medium_ledge_pos_ne>:237; RV32IFD: addi [[REG:.*]], zero, 0x20238; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]239define i32 @f_medium_ledge_pos_ne(i32 %in0) minsize {240 %cmp = icmp ne i32 %in0, 32241 br i1 %cmp, label %if.then, label %if.else242if.then:243 %call = shl i32 %in0, 1244 br label %if.end245if.else:246 %call2 = add i32 %in0, 42247 br label %if.end248 249if.end:250 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]251 ret i32 %toRet252}253 254; constant is medium and not fit in 6 bit (compress imm),255; but fit in 12 bit (imm)256; RV32IFDC-LABEL: <f_medium_ledge_neg_eq>:257; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x21258; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]259; --- no compress extension260; RV32IFD-LABEL: <f_medium_ledge_neg_eq>:261; RV32IFD: addi [[REG:.*]], zero, -0x21262; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]263define i32 @f_medium_ledge_neg_eq(i32 %in0) minsize {264 %cmp = icmp eq i32 %in0, -33265 br i1 %cmp, label %if.then, label %if.else266if.then:267 %call = shl i32 %in0, 1268 br label %if.end269if.else:270 %call2 = add i32 %in0, 42271 br label %if.end272 273if.end:274 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]275 ret i32 %toRet276}277 278; constant is medium and not fit in 6 bit (compress imm),279; but fit in 12 bit (imm)280; RV32IFDC-LABEL: <f_medium_ledge_neg_ne>:281; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x21282; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]283; --- no compress extension284; RV32IFD-LABEL: <f_medium_ledge_neg_ne>:285; RV32IFD: addi [[REG:.*]], zero, -0x21286; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]287define i32 @f_medium_ledge_neg_ne(i32 %in0) minsize {288 %cmp = icmp ne i32 %in0, -33289 br i1 %cmp, label %if.then, label %if.else290if.then:291 %call = shl i32 %in0, 1292 br label %if.end293if.else:294 %call2 = add i32 %in0, 42295 br label %if.end296 297if.end:298 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]299 ret i32 %toRet300}301 302; constant is medium and not fit in 6 bit (compress imm),303; but fit in 12 bit (imm)304; RV32IFDC-LABEL: <f_medium_pos_eq>:305; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x3f306; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]307; --- no compress extension308; RV32IFD-LABEL: <f_medium_pos_eq>:309; RV32IFD: addi [[REG:.*]], zero, 0x3f310; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]311define i32 @f_medium_pos_eq(i32 %in0) minsize {312 %cmp = icmp eq i32 %in0, 63313 br i1 %cmp, label %if.then, label %if.else314if.then:315 %call = shl i32 %in0, 1316 br label %if.end317if.else:318 %call2 = add i32 %in0, 42319 br label %if.end320 321if.end:322 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]323 ret i32 %toRet324}325 326; constant is medium and not fit in 6 bit (compress imm),327; but fit in 12 bit (imm)328; RV32IFDC-LABEL: <f_medium_pos_ne>:329; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x3f330; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]331; --- no compress extension332; RV32IFD-LABEL: <f_medium_pos_ne>:333; RV32IFD: addi [[REG:.*]], zero, 0x3f334; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]335define i32 @f_medium_pos_ne(i32 %in0) minsize {336 %cmp = icmp ne i32 %in0, 63337 br i1 %cmp, label %if.then, label %if.else338if.then:339 %call = shl i32 %in0, 1340 br label %if.end341if.else:342 %call2 = add i32 %in0, 42343 br label %if.end344 345if.end:346 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]347 ret i32 %toRet348}349 350; constant is medium and not fit in 6 bit (compress imm),351; but fit in 12 bit (imm)352; RV32IFDC-LABEL: <f_medium_neg_eq>:353; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x3f354; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]355; --- no compress extension356; RV32IFD-LABEL: <f_medium_neg_eq>:357; RV32IFD: addi [[REG:.*]], zero, -0x3f358; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]359define i32 @f_medium_neg_eq(i32 %in0) minsize {360 %cmp = icmp eq i32 %in0, -63361 br i1 %cmp, label %if.then, label %if.else362if.then:363 %call = shl i32 %in0, 1364 br label %if.end365if.else:366 %call2 = add i32 %in0, 42367 br label %if.end368 369if.end:370 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]371 ret i32 %toRet372}373 374; constant is medium and not fit in 6 bit (compress imm),375; but fit in 12 bit (imm)376; RV32IFDC-LABEL: <f_medium_neg_ne>:377; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x3f378; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]379; --- no compress extension380; RV32IFD-LABEL: <f_medium_neg_ne>:381; RV32IFD: addi [[REG:.*]], zero, -0x3f382; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]383define i32 @f_medium_neg_ne(i32 %in0) minsize {384 %cmp = icmp ne i32 %in0, -63385 br i1 %cmp, label %if.then, label %if.else386if.then:387 %call = shl i32 %in0, 1388 br label %if.end389if.else:390 %call2 = add i32 %in0, 42391 br label %if.end392 393if.end:394 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]395 ret i32 %toRet396}397 398; constant is medium and not fit in 6 bit (compress imm),399; but fit in 12 bit (imm)400; RV32IFDC-LABEL: <f_medium_bedge_pos_eq>:401; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x7ff402; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]403; --- no compress extension404; RV32IFD-LABEL: <f_medium_bedge_pos_eq>:405; RV32IFD: addi [[REG:.*]], zero, 0x7ff406; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]407define i32 @f_medium_bedge_pos_eq(i32 %in0) minsize {408 %cmp = icmp eq i32 %in0, 2047409 br i1 %cmp, label %if.then, label %if.else410if.then:411 %call = shl i32 %in0, 1412 br label %if.end413if.else:414 %call2 = add i32 %in0, 42415 br label %if.end416 417if.end:418 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]419 ret i32 %toRet420}421 422; constant is medium and not fit in 6 bit (compress imm),423; but fit in 12 bit (imm)424; RV32IFDC-LABEL: <f_medium_bedge_pos_ne>:425; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], -0x7ff426; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]427; --- no compress extension428; RV32IFD-LABEL: <f_medium_bedge_pos_ne>:429; RV32IFD: addi [[REG:.*]], zero, 0x7ff430; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]431define i32 @f_medium_bedge_pos_ne(i32 %in0) minsize {432 %cmp = icmp ne i32 %in0, 2047433 br i1 %cmp, label %if.then, label %if.else434if.then:435 %call = shl i32 %in0, 1436 br label %if.end437if.else:438 %call2 = add i32 %in0, 42439 br label %if.end440 441if.end:442 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]443 ret i32 %toRet444}445 446; constant is medium and not fit in 6 bit (compress imm),447; but fit in 12 bit (imm), negative value fit in 12 bit too.448; RV32IFDC-LABEL: <f_medium_bedge_neg_eq>:449; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x7ff450; RV32IFDC: c.bnez [[MAYZEROREG]], [[PLACE:.*]]451; --- no compress extension452; RV32IFD-LABEL: <f_medium_bedge_neg_eq>:453; RV32IFD: addi [[REG:.*]], zero, -0x7ff454; RV32IFD: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]455define i32 @f_medium_bedge_neg_eq(i32 %in0) minsize {456 %cmp = icmp eq i32 %in0, -2047457 br i1 %cmp, label %if.then, label %if.else458if.then:459 %call = shl i32 %in0, 1460 br label %if.end461if.else:462 %call2 = add i32 %in0, 42463 br label %if.end464 465if.end:466 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]467 ret i32 %toRet468}469 470; constant is medium and not fit in 6 bit (compress imm),471; but fit in 12 bit (imm), negative value fit in 12 bit too.472; RV32IFDC-LABEL: <f_medium_bedge_neg_ne>:473; RV32IFDC: addi [[MAYZEROREG:.*]], [[REG:.*]], 0x7ff474; RV32IFDC: c.beqz [[MAYZEROREG]], [[PLACE:.*]]475; --- no compress extension476; RV32IFD-LABEL: <f_medium_bedge_neg_ne>:477; RV32IFD: addi [[REG:.*]], zero, -0x7ff478; RV32IFD: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]479define i32 @f_medium_bedge_neg_ne(i32 %in0) minsize {480 %cmp = icmp ne i32 %in0, -2047481 br i1 %cmp, label %if.then, label %if.else482if.then:483 %call = shl i32 %in0, 1484 br label %if.end485if.else:486 %call2 = add i32 %in0, 42487 br label %if.end488 489if.end:490 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]491 ret i32 %toRet492}493 494; constant is big and do not fit in 12 bit (imm), fit in i32495; RV32IFDC-LABEL: <f_big_ledge_pos_eq>:496; RV32IFDC: c.li [[REG:.*]], 0x1497; RV32IFDC: c.slli [[REG]], 0xb498; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]499; --- no compress extension500; RV32IFD-LABEL: <f_big_ledge_pos_eq>:501; RV32IFD: addi [[REG1:.*]], zero, 0x1502; RV32IFD: slli [[REG2:.*]], [[REG1]], 0xb503; RV32IFD: bne [[ANOTHER:.*]], [[REG2]], [[PLACE:.*]]504define i32 @f_big_ledge_pos_eq(i32 %in0) minsize {505 %cmp = icmp eq i32 %in0, 2048506 br i1 %cmp, label %if.then, label %if.else507if.then:508 %call = shl i32 %in0, 1509 br label %if.end510if.else:511 %call2 = add i32 %in0, 42512 br label %if.end513 514if.end:515 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]516 ret i32 %toRet517}518 519; constant is big and do not fit in 12 bit (imm), fit in i32520; RV32IFDC-LABEL: <f_big_ledge_pos_ne>:521; RV32IFDC: c.li [[REG:.*]], 0x1522; RV32IFDC: c.slli [[REG]], 0xb523; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]524; --- no compress extension525; RV32IFD-LABEL: <f_big_ledge_pos_ne>:526; RV32IFD: addi [[REG1:.*]], zero, 0x1527; RV32IFD: slli [[REG2:.*]], [[REG1]], 0xb528; RV32IFD: beq [[ANOTHER:.*]], [[REG2]], [[PLACE:.*]]529define i32 @f_big_ledge_pos_ne(i32 %in0) minsize {530 %cmp = icmp ne i32 %in0, 2048531 br i1 %cmp, label %if.then, label %if.else532if.then:533 %call = shl i32 %in0, 1534 br label %if.end535if.else:536 %call2 = add i32 %in0, 42537 br label %if.end538 539if.end:540 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]541 ret i32 %toRet542}543 544; constant is big and do not fit in 12 bit (imm), fit in i32545; RV32IFDC-LABEL: <f_big_ledge_neg_eq>:546; RV32IFDC: c.lui [[REG1:.*]], 0xfffff547; RV32IFDC: addi [[REG2:.*]], [[REG1]], 0x7ff548; RV32IFDC: bne [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]549; --- no compress extension550; RV32IFD-LABEL: <f_big_ledge_neg_eq>:551; RV32IFD: lui [[REG1:.*]], 0xfffff552; RV32IFD: addi [[REG2:.*]], [[REG1]], 0x7ff553; RV32IFD: bne [[ANOTHER:.*]], [[REG2]], [[PLACE:.*]]554define i32 @f_big_ledge_neg_eq(i32 %in0) minsize {555 %cmp = icmp eq i32 %in0, -2049556 br i1 %cmp, label %if.then, label %if.else557if.then:558 %call = shl i32 %in0, 1559 br label %if.end560if.else:561 %call2 = add i32 %in0, 42562 br label %if.end563 564if.end:565 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]566 ret i32 %toRet567}568 569; constant is big and do not fit in 12 bit (imm), fit in i32570; RV32IFDC-LABEL: <f_big_ledge_neg_ne>:571; RV32IFDC: c.lui [[REG1:.*]], 0xfffff572; RV32IFDC: addi [[REG2:.*]], [[REG1]], 0x7ff573; RV32IFDC: beq [[ANOTHER:.*]], [[REG]], [[PLACE:.*]]574; --- no compress extension575; RV32IFD-LABEL: <f_big_ledge_neg_ne>:576; RV32IFD: lui [[REG1:.*]], 0xfffff577; RV32IFD: addi [[REG2:.*]], [[REG1]], 0x7ff578; RV32IFD: beq [[ANOTHER:.*]], [[REG2]], [[PLACE:.*]]579define i32 @f_big_ledge_neg_ne(i32 %in0) minsize {580 %cmp = icmp ne i32 %in0, -2049581 br i1 %cmp, label %if.then, label %if.else582if.then:583 %call = shl i32 %in0, 1584 br label %if.end585if.else:586 %call2 = add i32 %in0, 42587 br label %if.end588 589if.end:590 %toRet = phi i32 [ %call, %if.then ], [ %call2, %if.else ]591 ret i32 %toRet592}593