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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32I %s4; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefix=RV32IM %s6; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \7; RUN: | FileCheck -check-prefix=RV64I %s8; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s \9; RUN: | FileCheck -check-prefix=RV64IM %s10 11define i32 @udiv(i32 %a, i32 %b) nounwind {12; RV32I-LABEL: udiv:13; RV32I: # %bb.0:14; RV32I-NEXT: tail __udivsi315;16; RV32IM-LABEL: udiv:17; RV32IM: # %bb.0:18; RV32IM-NEXT: divu a0, a0, a119; RV32IM-NEXT: ret20;21; RV64I-LABEL: udiv:22; RV64I: # %bb.0:23; RV64I-NEXT: addi sp, sp, -1624; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill25; RV64I-NEXT: slli a0, a0, 3226; RV64I-NEXT: slli a1, a1, 3227; RV64I-NEXT: srli a0, a0, 3228; RV64I-NEXT: srli a1, a1, 3229; RV64I-NEXT: call __udivdi330; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload31; RV64I-NEXT: addi sp, sp, 1632; RV64I-NEXT: ret33;34; RV64IM-LABEL: udiv:35; RV64IM: # %bb.0:36; RV64IM-NEXT: divuw a0, a0, a137; RV64IM-NEXT: ret38 %1 = udiv i32 %a, %b39 ret i32 %140}41 42define i32 @udiv_constant(i32 %a) nounwind {43; RV32I-LABEL: udiv_constant:44; RV32I: # %bb.0:45; RV32I-NEXT: li a1, 546; RV32I-NEXT: tail __udivsi347;48; RV32IM-LABEL: udiv_constant:49; RV32IM: # %bb.0:50; RV32IM-NEXT: lui a1, 83886151; RV32IM-NEXT: addi a1, a1, -81952; RV32IM-NEXT: mulhu a0, a0, a153; RV32IM-NEXT: srli a0, a0, 254; RV32IM-NEXT: ret55;56; RV64I-LABEL: udiv_constant:57; RV64I: # %bb.0:58; RV64I-NEXT: addi sp, sp, -1659; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill60; RV64I-NEXT: slli a0, a0, 3261; RV64I-NEXT: srli a0, a0, 3262; RV64I-NEXT: li a1, 563; RV64I-NEXT: call __udivdi364; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload65; RV64I-NEXT: addi sp, sp, 1666; RV64I-NEXT: ret67;68; RV64IM-LABEL: udiv_constant:69; RV64IM: # %bb.0:70; RV64IM-NEXT: slli a0, a0, 3271; RV64IM-NEXT: lui a1, 83886172; RV64IM-NEXT: addi a1, a1, -81973; RV64IM-NEXT: slli a1, a1, 3274; RV64IM-NEXT: mulhu a0, a0, a175; RV64IM-NEXT: srli a0, a0, 3476; RV64IM-NEXT: ret77 %1 = udiv i32 %a, 578 ret i32 %179}80 81define i32 @udiv_pow2(i32 %a) nounwind {82; RV32I-LABEL: udiv_pow2:83; RV32I: # %bb.0:84; RV32I-NEXT: srli a0, a0, 385; RV32I-NEXT: ret86;87; RV32IM-LABEL: udiv_pow2:88; RV32IM: # %bb.0:89; RV32IM-NEXT: srli a0, a0, 390; RV32IM-NEXT: ret91;92; RV64I-LABEL: udiv_pow2:93; RV64I: # %bb.0:94; RV64I-NEXT: srliw a0, a0, 395; RV64I-NEXT: ret96;97; RV64IM-LABEL: udiv_pow2:98; RV64IM: # %bb.0:99; RV64IM-NEXT: srliw a0, a0, 3100; RV64IM-NEXT: ret101 %1 = udiv i32 %a, 8102 ret i32 %1103}104 105define i32 @udiv_constant_lhs(i32 %a) nounwind {106; RV32I-LABEL: udiv_constant_lhs:107; RV32I: # %bb.0:108; RV32I-NEXT: mv a1, a0109; RV32I-NEXT: li a0, 10110; RV32I-NEXT: tail __udivsi3111;112; RV32IM-LABEL: udiv_constant_lhs:113; RV32IM: # %bb.0:114; RV32IM-NEXT: li a1, 10115; RV32IM-NEXT: divu a0, a1, a0116; RV32IM-NEXT: ret117;118; RV64I-LABEL: udiv_constant_lhs:119; RV64I: # %bb.0:120; RV64I-NEXT: addi sp, sp, -16121; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill122; RV64I-NEXT: slli a0, a0, 32123; RV64I-NEXT: srli a1, a0, 32124; RV64I-NEXT: li a0, 10125; RV64I-NEXT: call __udivdi3126; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload127; RV64I-NEXT: addi sp, sp, 16128; RV64I-NEXT: ret129;130; RV64IM-LABEL: udiv_constant_lhs:131; RV64IM: # %bb.0:132; RV64IM-NEXT: li a1, 10133; RV64IM-NEXT: divuw a0, a1, a0134; RV64IM-NEXT: ret135 %1 = udiv i32 10, %a136 ret i32 %1137}138 139define i64 @udiv64(i64 %a, i64 %b) nounwind {140; RV32I-LABEL: udiv64:141; RV32I: # %bb.0:142; RV32I-NEXT: addi sp, sp, -16143; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill144; RV32I-NEXT: call __udivdi3145; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload146; RV32I-NEXT: addi sp, sp, 16147; RV32I-NEXT: ret148;149; RV32IM-LABEL: udiv64:150; RV32IM: # %bb.0:151; RV32IM-NEXT: addi sp, sp, -16152; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill153; RV32IM-NEXT: call __udivdi3154; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload155; RV32IM-NEXT: addi sp, sp, 16156; RV32IM-NEXT: ret157;158; RV64I-LABEL: udiv64:159; RV64I: # %bb.0:160; RV64I-NEXT: tail __udivdi3161;162; RV64IM-LABEL: udiv64:163; RV64IM: # %bb.0:164; RV64IM-NEXT: divu a0, a0, a1165; RV64IM-NEXT: ret166 %1 = udiv i64 %a, %b167 ret i64 %1168}169 170define i64 @udiv64_constant(i64 %a) nounwind {171; RV32I-LABEL: udiv64_constant:172; RV32I: # %bb.0:173; RV32I-NEXT: addi sp, sp, -16174; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill175; RV32I-NEXT: li a2, 5176; RV32I-NEXT: li a3, 0177; RV32I-NEXT: call __udivdi3178; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload179; RV32I-NEXT: addi sp, sp, 16180; RV32I-NEXT: ret181;182; RV32IM-LABEL: udiv64_constant:183; RV32IM: # %bb.0:184; RV32IM-NEXT: add a2, a0, a1185; RV32IM-NEXT: lui a3, 838861186; RV32IM-NEXT: sltu a4, a2, a0187; RV32IM-NEXT: addi a5, a3, -819188; RV32IM-NEXT: addi a3, a3, -820189; RV32IM-NEXT: add a2, a2, a4190; RV32IM-NEXT: mulhu a4, a2, a5191; RV32IM-NEXT: srli a6, a4, 2192; RV32IM-NEXT: andi a4, a4, -4193; RV32IM-NEXT: add a4, a4, a6194; RV32IM-NEXT: sub a2, a2, a4195; RV32IM-NEXT: sub a4, a0, a2196; RV32IM-NEXT: sltu a0, a0, a2197; RV32IM-NEXT: mul a2, a4, a3198; RV32IM-NEXT: mulhu a3, a4, a5199; RV32IM-NEXT: sub a1, a1, a0200; RV32IM-NEXT: add a2, a3, a2201; RV32IM-NEXT: mul a1, a1, a5202; RV32IM-NEXT: add a1, a2, a1203; RV32IM-NEXT: mul a0, a4, a5204; RV32IM-NEXT: ret205;206; RV64I-LABEL: udiv64_constant:207; RV64I: # %bb.0:208; RV64I-NEXT: li a1, 5209; RV64I-NEXT: tail __udivdi3210;211; RV64IM-LABEL: udiv64_constant:212; RV64IM: # %bb.0:213; RV64IM-NEXT: lui a1, 838861214; RV64IM-NEXT: addi a1, a1, -819215; RV64IM-NEXT: slli a2, a1, 32216; RV64IM-NEXT: add a1, a1, a2217; RV64IM-NEXT: mulhu a0, a0, a1218; RV64IM-NEXT: srli a0, a0, 2219; RV64IM-NEXT: ret220 %1 = udiv i64 %a, 5221 ret i64 %1222}223 224define i64 @udiv64_constant_lhs(i64 %a) nounwind {225; RV32I-LABEL: udiv64_constant_lhs:226; RV32I: # %bb.0:227; RV32I-NEXT: addi sp, sp, -16228; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill229; RV32I-NEXT: mv a3, a1230; RV32I-NEXT: mv a2, a0231; RV32I-NEXT: li a0, 10232; RV32I-NEXT: li a1, 0233; RV32I-NEXT: call __udivdi3234; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload235; RV32I-NEXT: addi sp, sp, 16236; RV32I-NEXT: ret237;238; RV32IM-LABEL: udiv64_constant_lhs:239; RV32IM: # %bb.0:240; RV32IM-NEXT: addi sp, sp, -16241; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill242; RV32IM-NEXT: mv a3, a1243; RV32IM-NEXT: mv a2, a0244; RV32IM-NEXT: li a0, 10245; RV32IM-NEXT: li a1, 0246; RV32IM-NEXT: call __udivdi3247; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload248; RV32IM-NEXT: addi sp, sp, 16249; RV32IM-NEXT: ret250;251; RV64I-LABEL: udiv64_constant_lhs:252; RV64I: # %bb.0:253; RV64I-NEXT: mv a1, a0254; RV64I-NEXT: li a0, 10255; RV64I-NEXT: tail __udivdi3256;257; RV64IM-LABEL: udiv64_constant_lhs:258; RV64IM: # %bb.0:259; RV64IM-NEXT: li a1, 10260; RV64IM-NEXT: divu a0, a1, a0261; RV64IM-NEXT: ret262 %1 = udiv i64 10, %a263 ret i64 %1264}265 266define i8 @udiv8(i8 %a, i8 %b) nounwind {267; RV32I-LABEL: udiv8:268; RV32I: # %bb.0:269; RV32I-NEXT: addi sp, sp, -16270; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill271; RV32I-NEXT: zext.b a0, a0272; RV32I-NEXT: zext.b a1, a1273; RV32I-NEXT: call __udivsi3274; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload275; RV32I-NEXT: addi sp, sp, 16276; RV32I-NEXT: ret277;278; RV32IM-LABEL: udiv8:279; RV32IM: # %bb.0:280; RV32IM-NEXT: zext.b a1, a1281; RV32IM-NEXT: zext.b a0, a0282; RV32IM-NEXT: divu a0, a0, a1283; RV32IM-NEXT: ret284;285; RV64I-LABEL: udiv8:286; RV64I: # %bb.0:287; RV64I-NEXT: addi sp, sp, -16288; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill289; RV64I-NEXT: zext.b a0, a0290; RV64I-NEXT: zext.b a1, a1291; RV64I-NEXT: call __udivdi3292; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload293; RV64I-NEXT: addi sp, sp, 16294; RV64I-NEXT: ret295;296; RV64IM-LABEL: udiv8:297; RV64IM: # %bb.0:298; RV64IM-NEXT: zext.b a1, a1299; RV64IM-NEXT: zext.b a0, a0300; RV64IM-NEXT: divuw a0, a0, a1301; RV64IM-NEXT: ret302 %1 = udiv i8 %a, %b303 ret i8 %1304}305 306define i8 @udiv8_constant(i8 %a) nounwind {307; RV32I-LABEL: udiv8_constant:308; RV32I: # %bb.0:309; RV32I-NEXT: addi sp, sp, -16310; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill311; RV32I-NEXT: zext.b a0, a0312; RV32I-NEXT: li a1, 5313; RV32I-NEXT: call __udivsi3314; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload315; RV32I-NEXT: addi sp, sp, 16316; RV32I-NEXT: ret317;318; RV32IM-LABEL: udiv8_constant:319; RV32IM: # %bb.0:320; RV32IM-NEXT: zext.b a0, a0321; RV32IM-NEXT: li a1, 205322; RV32IM-NEXT: mul a0, a0, a1323; RV32IM-NEXT: srli a0, a0, 10324; RV32IM-NEXT: ret325;326; RV64I-LABEL: udiv8_constant:327; RV64I: # %bb.0:328; RV64I-NEXT: addi sp, sp, -16329; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill330; RV64I-NEXT: zext.b a0, a0331; RV64I-NEXT: li a1, 5332; RV64I-NEXT: call __udivdi3333; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload334; RV64I-NEXT: addi sp, sp, 16335; RV64I-NEXT: ret336;337; RV64IM-LABEL: udiv8_constant:338; RV64IM: # %bb.0:339; RV64IM-NEXT: zext.b a0, a0340; RV64IM-NEXT: li a1, 205341; RV64IM-NEXT: mul a0, a0, a1342; RV64IM-NEXT: srli a0, a0, 10343; RV64IM-NEXT: ret344 %1 = udiv i8 %a, 5345 ret i8 %1346}347 348define i8 @udiv8_pow2(i8 %a) nounwind {349; RV32I-LABEL: udiv8_pow2:350; RV32I: # %bb.0:351; RV32I-NEXT: slli a0, a0, 24352; RV32I-NEXT: srli a0, a0, 27353; RV32I-NEXT: ret354;355; RV32IM-LABEL: udiv8_pow2:356; RV32IM: # %bb.0:357; RV32IM-NEXT: slli a0, a0, 24358; RV32IM-NEXT: srli a0, a0, 27359; RV32IM-NEXT: ret360;361; RV64I-LABEL: udiv8_pow2:362; RV64I: # %bb.0:363; RV64I-NEXT: slli a0, a0, 56364; RV64I-NEXT: srli a0, a0, 59365; RV64I-NEXT: ret366;367; RV64IM-LABEL: udiv8_pow2:368; RV64IM: # %bb.0:369; RV64IM-NEXT: slli a0, a0, 56370; RV64IM-NEXT: srli a0, a0, 59371; RV64IM-NEXT: ret372 %1 = udiv i8 %a, 8373 ret i8 %1374}375 376define i8 @udiv8_constant_lhs(i8 %a) nounwind {377; RV32I-LABEL: udiv8_constant_lhs:378; RV32I: # %bb.0:379; RV32I-NEXT: addi sp, sp, -16380; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill381; RV32I-NEXT: zext.b a1, a0382; RV32I-NEXT: li a0, 10383; RV32I-NEXT: call __udivsi3384; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload385; RV32I-NEXT: addi sp, sp, 16386; RV32I-NEXT: ret387;388; RV32IM-LABEL: udiv8_constant_lhs:389; RV32IM: # %bb.0:390; RV32IM-NEXT: zext.b a0, a0391; RV32IM-NEXT: li a1, 10392; RV32IM-NEXT: divu a0, a1, a0393; RV32IM-NEXT: ret394;395; RV64I-LABEL: udiv8_constant_lhs:396; RV64I: # %bb.0:397; RV64I-NEXT: addi sp, sp, -16398; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill399; RV64I-NEXT: zext.b a1, a0400; RV64I-NEXT: li a0, 10401; RV64I-NEXT: call __udivdi3402; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload403; RV64I-NEXT: addi sp, sp, 16404; RV64I-NEXT: ret405;406; RV64IM-LABEL: udiv8_constant_lhs:407; RV64IM: # %bb.0:408; RV64IM-NEXT: zext.b a0, a0409; RV64IM-NEXT: li a1, 10410; RV64IM-NEXT: divuw a0, a1, a0411; RV64IM-NEXT: ret412 %1 = udiv i8 10, %a413 ret i8 %1414}415 416define i16 @udiv16(i16 %a, i16 %b) nounwind {417; RV32I-LABEL: udiv16:418; RV32I: # %bb.0:419; RV32I-NEXT: addi sp, sp, -16420; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill421; RV32I-NEXT: lui a2, 16422; RV32I-NEXT: addi a2, a2, -1423; RV32I-NEXT: and a0, a0, a2424; RV32I-NEXT: and a1, a1, a2425; RV32I-NEXT: call __udivsi3426; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload427; RV32I-NEXT: addi sp, sp, 16428; RV32I-NEXT: ret429;430; RV32IM-LABEL: udiv16:431; RV32IM: # %bb.0:432; RV32IM-NEXT: lui a2, 16433; RV32IM-NEXT: addi a2, a2, -1434; RV32IM-NEXT: and a1, a1, a2435; RV32IM-NEXT: and a0, a0, a2436; RV32IM-NEXT: divu a0, a0, a1437; RV32IM-NEXT: ret438;439; RV64I-LABEL: udiv16:440; RV64I: # %bb.0:441; RV64I-NEXT: addi sp, sp, -16442; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill443; RV64I-NEXT: lui a2, 16444; RV64I-NEXT: addi a2, a2, -1445; RV64I-NEXT: and a0, a0, a2446; RV64I-NEXT: and a1, a1, a2447; RV64I-NEXT: call __udivdi3448; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload449; RV64I-NEXT: addi sp, sp, 16450; RV64I-NEXT: ret451;452; RV64IM-LABEL: udiv16:453; RV64IM: # %bb.0:454; RV64IM-NEXT: lui a2, 16455; RV64IM-NEXT: addi a2, a2, -1456; RV64IM-NEXT: and a1, a1, a2457; RV64IM-NEXT: and a0, a0, a2458; RV64IM-NEXT: divuw a0, a0, a1459; RV64IM-NEXT: ret460 %1 = udiv i16 %a, %b461 ret i16 %1462}463 464define i16 @udiv16_constant(i16 %a) nounwind {465; RV32I-LABEL: udiv16_constant:466; RV32I: # %bb.0:467; RV32I-NEXT: addi sp, sp, -16468; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill469; RV32I-NEXT: slli a0, a0, 16470; RV32I-NEXT: srli a0, a0, 16471; RV32I-NEXT: li a1, 5472; RV32I-NEXT: call __udivsi3473; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload474; RV32I-NEXT: addi sp, sp, 16475; RV32I-NEXT: ret476;477; RV32IM-LABEL: udiv16_constant:478; RV32IM: # %bb.0:479; RV32IM-NEXT: slli a0, a0, 16480; RV32IM-NEXT: lui a1, 838864481; RV32IM-NEXT: mulhu a0, a0, a1482; RV32IM-NEXT: srli a0, a0, 18483; RV32IM-NEXT: ret484;485; RV64I-LABEL: udiv16_constant:486; RV64I: # %bb.0:487; RV64I-NEXT: addi sp, sp, -16488; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill489; RV64I-NEXT: slli a0, a0, 48490; RV64I-NEXT: srli a0, a0, 48491; RV64I-NEXT: li a1, 5492; RV64I-NEXT: call __udivdi3493; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload494; RV64I-NEXT: addi sp, sp, 16495; RV64I-NEXT: ret496;497; RV64IM-LABEL: udiv16_constant:498; RV64IM: # %bb.0:499; RV64IM-NEXT: lui a1, 52429500; RV64IM-NEXT: slli a1, a1, 4501; RV64IM-NEXT: slli a0, a0, 48502; RV64IM-NEXT: mulhu a0, a0, a1503; RV64IM-NEXT: srli a0, a0, 18504; RV64IM-NEXT: ret505 %1 = udiv i16 %a, 5506 ret i16 %1507}508 509define i16 @udiv16_pow2(i16 %a) nounwind {510; RV32I-LABEL: udiv16_pow2:511; RV32I: # %bb.0:512; RV32I-NEXT: slli a0, a0, 16513; RV32I-NEXT: srli a0, a0, 19514; RV32I-NEXT: ret515;516; RV32IM-LABEL: udiv16_pow2:517; RV32IM: # %bb.0:518; RV32IM-NEXT: slli a0, a0, 16519; RV32IM-NEXT: srli a0, a0, 19520; RV32IM-NEXT: ret521;522; RV64I-LABEL: udiv16_pow2:523; RV64I: # %bb.0:524; RV64I-NEXT: slli a0, a0, 48525; RV64I-NEXT: srli a0, a0, 51526; RV64I-NEXT: ret527;528; RV64IM-LABEL: udiv16_pow2:529; RV64IM: # %bb.0:530; RV64IM-NEXT: slli a0, a0, 48531; RV64IM-NEXT: srli a0, a0, 51532; RV64IM-NEXT: ret533 %1 = udiv i16 %a, 8534 ret i16 %1535}536 537define i16 @udiv16_constant_lhs(i16 %a) nounwind {538; RV32I-LABEL: udiv16_constant_lhs:539; RV32I: # %bb.0:540; RV32I-NEXT: addi sp, sp, -16541; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill542; RV32I-NEXT: slli a0, a0, 16543; RV32I-NEXT: srli a1, a0, 16544; RV32I-NEXT: li a0, 10545; RV32I-NEXT: call __udivsi3546; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload547; RV32I-NEXT: addi sp, sp, 16548; RV32I-NEXT: ret549;550; RV32IM-LABEL: udiv16_constant_lhs:551; RV32IM: # %bb.0:552; RV32IM-NEXT: slli a0, a0, 16553; RV32IM-NEXT: srli a0, a0, 16554; RV32IM-NEXT: li a1, 10555; RV32IM-NEXT: divu a0, a1, a0556; RV32IM-NEXT: ret557;558; RV64I-LABEL: udiv16_constant_lhs:559; RV64I: # %bb.0:560; RV64I-NEXT: addi sp, sp, -16561; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill562; RV64I-NEXT: slli a0, a0, 48563; RV64I-NEXT: srli a1, a0, 48564; RV64I-NEXT: li a0, 10565; RV64I-NEXT: call __udivdi3566; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload567; RV64I-NEXT: addi sp, sp, 16568; RV64I-NEXT: ret569;570; RV64IM-LABEL: udiv16_constant_lhs:571; RV64IM: # %bb.0:572; RV64IM-NEXT: slli a0, a0, 48573; RV64IM-NEXT: srli a0, a0, 48574; RV64IM-NEXT: li a1, 10575; RV64IM-NEXT: divuw a0, a1, a0576; RV64IM-NEXT: ret577 %1 = udiv i16 10, %a578 ret i16 %1579}580 581define i32 @sdiv(i32 %a, i32 %b) nounwind {582; RV32I-LABEL: sdiv:583; RV32I: # %bb.0:584; RV32I-NEXT: tail __divsi3585;586; RV32IM-LABEL: sdiv:587; RV32IM: # %bb.0:588; RV32IM-NEXT: div a0, a0, a1589; RV32IM-NEXT: ret590;591; RV64I-LABEL: sdiv:592; RV64I: # %bb.0:593; RV64I-NEXT: addi sp, sp, -16594; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill595; RV64I-NEXT: sext.w a0, a0596; RV64I-NEXT: sext.w a1, a1597; RV64I-NEXT: call __divdi3598; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload599; RV64I-NEXT: addi sp, sp, 16600; RV64I-NEXT: ret601;602; RV64IM-LABEL: sdiv:603; RV64IM: # %bb.0:604; RV64IM-NEXT: divw a0, a0, a1605; RV64IM-NEXT: ret606 %1 = sdiv i32 %a, %b607 ret i32 %1608}609 610define i32 @sdiv_constant(i32 %a) nounwind {611; RV32I-LABEL: sdiv_constant:612; RV32I: # %bb.0:613; RV32I-NEXT: li a1, 5614; RV32I-NEXT: tail __divsi3615;616; RV32IM-LABEL: sdiv_constant:617; RV32IM: # %bb.0:618; RV32IM-NEXT: lui a1, 419430619; RV32IM-NEXT: addi a1, a1, 1639620; RV32IM-NEXT: mulh a0, a0, a1621; RV32IM-NEXT: srli a1, a0, 31622; RV32IM-NEXT: srai a0, a0, 1623; RV32IM-NEXT: add a0, a0, a1624; RV32IM-NEXT: ret625;626; RV64I-LABEL: sdiv_constant:627; RV64I: # %bb.0:628; RV64I-NEXT: addi sp, sp, -16629; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill630; RV64I-NEXT: sext.w a0, a0631; RV64I-NEXT: li a1, 5632; RV64I-NEXT: call __divdi3633; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload634; RV64I-NEXT: addi sp, sp, 16635; RV64I-NEXT: ret636;637; RV64IM-LABEL: sdiv_constant:638; RV64IM: # %bb.0:639; RV64IM-NEXT: sext.w a0, a0640; RV64IM-NEXT: lui a1, 419430641; RV64IM-NEXT: addi a1, a1, 1639642; RV64IM-NEXT: mul a0, a0, a1643; RV64IM-NEXT: srli a1, a0, 63644; RV64IM-NEXT: srai a0, a0, 33645; RV64IM-NEXT: add a0, a0, a1646; RV64IM-NEXT: ret647 %1 = sdiv i32 %a, 5648 ret i32 %1649}650 651define i32 @sdiv_pow2(i32 %a) nounwind {652; RV32I-LABEL: sdiv_pow2:653; RV32I: # %bb.0:654; RV32I-NEXT: srai a1, a0, 31655; RV32I-NEXT: srli a1, a1, 29656; RV32I-NEXT: add a0, a0, a1657; RV32I-NEXT: srai a0, a0, 3658; RV32I-NEXT: ret659;660; RV32IM-LABEL: sdiv_pow2:661; RV32IM: # %bb.0:662; RV32IM-NEXT: srai a1, a0, 31663; RV32IM-NEXT: srli a1, a1, 29664; RV32IM-NEXT: add a0, a0, a1665; RV32IM-NEXT: srai a0, a0, 3666; RV32IM-NEXT: ret667;668; RV64I-LABEL: sdiv_pow2:669; RV64I: # %bb.0:670; RV64I-NEXT: sraiw a1, a0, 31671; RV64I-NEXT: srliw a1, a1, 29672; RV64I-NEXT: add a0, a0, a1673; RV64I-NEXT: sraiw a0, a0, 3674; RV64I-NEXT: ret675;676; RV64IM-LABEL: sdiv_pow2:677; RV64IM: # %bb.0:678; RV64IM-NEXT: sraiw a1, a0, 31679; RV64IM-NEXT: srliw a1, a1, 29680; RV64IM-NEXT: add a0, a0, a1681; RV64IM-NEXT: sraiw a0, a0, 3682; RV64IM-NEXT: ret683 %1 = sdiv i32 %a, 8684 ret i32 %1685}686 687define i32 @sdiv_pow2_2(i32 %a) nounwind {688; RV32I-LABEL: sdiv_pow2_2:689; RV32I: # %bb.0:690; RV32I-NEXT: srai a1, a0, 31691; RV32I-NEXT: srli a1, a1, 16692; RV32I-NEXT: add a0, a0, a1693; RV32I-NEXT: srai a0, a0, 16694; RV32I-NEXT: ret695;696; RV32IM-LABEL: sdiv_pow2_2:697; RV32IM: # %bb.0:698; RV32IM-NEXT: srai a1, a0, 31699; RV32IM-NEXT: srli a1, a1, 16700; RV32IM-NEXT: add a0, a0, a1701; RV32IM-NEXT: srai a0, a0, 16702; RV32IM-NEXT: ret703;704; RV64I-LABEL: sdiv_pow2_2:705; RV64I: # %bb.0:706; RV64I-NEXT: sraiw a1, a0, 31707; RV64I-NEXT: srliw a1, a1, 16708; RV64I-NEXT: add a0, a0, a1709; RV64I-NEXT: sraiw a0, a0, 16710; RV64I-NEXT: ret711;712; RV64IM-LABEL: sdiv_pow2_2:713; RV64IM: # %bb.0:714; RV64IM-NEXT: sraiw a1, a0, 31715; RV64IM-NEXT: srliw a1, a1, 16716; RV64IM-NEXT: add a0, a0, a1717; RV64IM-NEXT: sraiw a0, a0, 16718; RV64IM-NEXT: ret719 %1 = sdiv i32 %a, 65536720 ret i32 %1721}722 723define i32 @sdiv_constant_lhs(i32 %a) nounwind {724; RV32I-LABEL: sdiv_constant_lhs:725; RV32I: # %bb.0:726; RV32I-NEXT: mv a1, a0727; RV32I-NEXT: li a0, -10728; RV32I-NEXT: tail __divsi3729;730; RV32IM-LABEL: sdiv_constant_lhs:731; RV32IM: # %bb.0:732; RV32IM-NEXT: li a1, -10733; RV32IM-NEXT: div a0, a1, a0734; RV32IM-NEXT: ret735;736; RV64I-LABEL: sdiv_constant_lhs:737; RV64I: # %bb.0:738; RV64I-NEXT: addi sp, sp, -16739; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill740; RV64I-NEXT: sext.w a1, a0741; RV64I-NEXT: li a0, -10742; RV64I-NEXT: call __divdi3743; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload744; RV64I-NEXT: addi sp, sp, 16745; RV64I-NEXT: ret746;747; RV64IM-LABEL: sdiv_constant_lhs:748; RV64IM: # %bb.0:749; RV64IM-NEXT: li a1, -10750; RV64IM-NEXT: divw a0, a1, a0751; RV64IM-NEXT: ret752 %1 = sdiv i32 -10, %a753 ret i32 %1754}755 756define i64 @sdiv64(i64 %a, i64 %b) nounwind {757; RV32I-LABEL: sdiv64:758; RV32I: # %bb.0:759; RV32I-NEXT: addi sp, sp, -16760; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill761; RV32I-NEXT: call __divdi3762; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload763; RV32I-NEXT: addi sp, sp, 16764; RV32I-NEXT: ret765;766; RV32IM-LABEL: sdiv64:767; RV32IM: # %bb.0:768; RV32IM-NEXT: addi sp, sp, -16769; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill770; RV32IM-NEXT: call __divdi3771; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload772; RV32IM-NEXT: addi sp, sp, 16773; RV32IM-NEXT: ret774;775; RV64I-LABEL: sdiv64:776; RV64I: # %bb.0:777; RV64I-NEXT: tail __divdi3778;779; RV64IM-LABEL: sdiv64:780; RV64IM: # %bb.0:781; RV64IM-NEXT: div a0, a0, a1782; RV64IM-NEXT: ret783 %1 = sdiv i64 %a, %b784 ret i64 %1785}786 787define i64 @sdiv64_constant(i64 %a) nounwind {788; RV32I-LABEL: sdiv64_constant:789; RV32I: # %bb.0:790; RV32I-NEXT: addi sp, sp, -16791; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill792; RV32I-NEXT: li a2, 5793; RV32I-NEXT: li a3, 0794; RV32I-NEXT: call __divdi3795; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload796; RV32I-NEXT: addi sp, sp, 16797; RV32I-NEXT: ret798;799; RV32IM-LABEL: sdiv64_constant:800; RV32IM: # %bb.0:801; RV32IM-NEXT: addi sp, sp, -16802; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill803; RV32IM-NEXT: li a2, 5804; RV32IM-NEXT: li a3, 0805; RV32IM-NEXT: call __divdi3806; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload807; RV32IM-NEXT: addi sp, sp, 16808; RV32IM-NEXT: ret809;810; RV64I-LABEL: sdiv64_constant:811; RV64I: # %bb.0:812; RV64I-NEXT: li a1, 5813; RV64I-NEXT: tail __divdi3814;815; RV64IM-LABEL: sdiv64_constant:816; RV64IM: # %bb.0:817; RV64IM-NEXT: lui a1, %hi(.LCPI21_0)818; RV64IM-NEXT: ld a1, %lo(.LCPI21_0)(a1)819; RV64IM-NEXT: mulh a0, a0, a1820; RV64IM-NEXT: srli a1, a0, 63821; RV64IM-NEXT: srai a0, a0, 1822; RV64IM-NEXT: add a0, a0, a1823; RV64IM-NEXT: ret824 %1 = sdiv i64 %a, 5825 ret i64 %1826}827 828define i64 @sdiv64_constant_lhs(i64 %a) nounwind {829; RV32I-LABEL: sdiv64_constant_lhs:830; RV32I: # %bb.0:831; RV32I-NEXT: addi sp, sp, -16832; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill833; RV32I-NEXT: mv a3, a1834; RV32I-NEXT: mv a2, a0835; RV32I-NEXT: li a0, 10836; RV32I-NEXT: li a1, 0837; RV32I-NEXT: call __divdi3838; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload839; RV32I-NEXT: addi sp, sp, 16840; RV32I-NEXT: ret841;842; RV32IM-LABEL: sdiv64_constant_lhs:843; RV32IM: # %bb.0:844; RV32IM-NEXT: addi sp, sp, -16845; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill846; RV32IM-NEXT: mv a3, a1847; RV32IM-NEXT: mv a2, a0848; RV32IM-NEXT: li a0, 10849; RV32IM-NEXT: li a1, 0850; RV32IM-NEXT: call __divdi3851; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload852; RV32IM-NEXT: addi sp, sp, 16853; RV32IM-NEXT: ret854;855; RV64I-LABEL: sdiv64_constant_lhs:856; RV64I: # %bb.0:857; RV64I-NEXT: mv a1, a0858; RV64I-NEXT: li a0, 10859; RV64I-NEXT: tail __divdi3860;861; RV64IM-LABEL: sdiv64_constant_lhs:862; RV64IM: # %bb.0:863; RV64IM-NEXT: li a1, 10864; RV64IM-NEXT: div a0, a1, a0865; RV64IM-NEXT: ret866 %1 = sdiv i64 10, %a867 ret i64 %1868}869 870; Although this sdiv has two sexti32 operands, it shouldn't compile to divw on871; RV64M as that wouldn't produce the correct result for e.g. INT_MIN/-1.872 873define i64 @sdiv64_sext_operands(i32 %a, i32 %b) nounwind {874; RV32I-LABEL: sdiv64_sext_operands:875; RV32I: # %bb.0:876; RV32I-NEXT: addi sp, sp, -16877; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill878; RV32I-NEXT: mv a2, a1879; RV32I-NEXT: srai a1, a0, 31880; RV32I-NEXT: srai a3, a2, 31881; RV32I-NEXT: call __divdi3882; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload883; RV32I-NEXT: addi sp, sp, 16884; RV32I-NEXT: ret885;886; RV32IM-LABEL: sdiv64_sext_operands:887; RV32IM: # %bb.0:888; RV32IM-NEXT: addi sp, sp, -16889; RV32IM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill890; RV32IM-NEXT: mv a2, a1891; RV32IM-NEXT: srai a1, a0, 31892; RV32IM-NEXT: srai a3, a2, 31893; RV32IM-NEXT: call __divdi3894; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload895; RV32IM-NEXT: addi sp, sp, 16896; RV32IM-NEXT: ret897;898; RV64I-LABEL: sdiv64_sext_operands:899; RV64I: # %bb.0:900; RV64I-NEXT: sext.w a0, a0901; RV64I-NEXT: sext.w a1, a1902; RV64I-NEXT: tail __divdi3903;904; RV64IM-LABEL: sdiv64_sext_operands:905; RV64IM: # %bb.0:906; RV64IM-NEXT: sext.w a0, a0907; RV64IM-NEXT: sext.w a1, a1908; RV64IM-NEXT: div a0, a0, a1909; RV64IM-NEXT: ret910 %1 = sext i32 %a to i64911 %2 = sext i32 %b to i64912 %3 = sdiv i64 %1, %2913 ret i64 %3914}915 916define i8 @sdiv8(i8 %a, i8 %b) nounwind {917; RV32I-LABEL: sdiv8:918; RV32I: # %bb.0:919; RV32I-NEXT: addi sp, sp, -16920; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill921; RV32I-NEXT: slli a0, a0, 24922; RV32I-NEXT: slli a1, a1, 24923; RV32I-NEXT: srai a0, a0, 24924; RV32I-NEXT: srai a1, a1, 24925; RV32I-NEXT: call __divsi3926; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload927; RV32I-NEXT: addi sp, sp, 16928; RV32I-NEXT: ret929;930; RV32IM-LABEL: sdiv8:931; RV32IM: # %bb.0:932; RV32IM-NEXT: slli a1, a1, 24933; RV32IM-NEXT: slli a0, a0, 24934; RV32IM-NEXT: srai a1, a1, 24935; RV32IM-NEXT: srai a0, a0, 24936; RV32IM-NEXT: div a0, a0, a1937; RV32IM-NEXT: ret938;939; RV64I-LABEL: sdiv8:940; RV64I: # %bb.0:941; RV64I-NEXT: addi sp, sp, -16942; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill943; RV64I-NEXT: slli a0, a0, 56944; RV64I-NEXT: slli a1, a1, 56945; RV64I-NEXT: srai a0, a0, 56946; RV64I-NEXT: srai a1, a1, 56947; RV64I-NEXT: call __divdi3948; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload949; RV64I-NEXT: addi sp, sp, 16950; RV64I-NEXT: ret951;952; RV64IM-LABEL: sdiv8:953; RV64IM: # %bb.0:954; RV64IM-NEXT: slli a1, a1, 56955; RV64IM-NEXT: slli a0, a0, 56956; RV64IM-NEXT: srai a1, a1, 56957; RV64IM-NEXT: srai a0, a0, 56958; RV64IM-NEXT: divw a0, a0, a1959; RV64IM-NEXT: ret960 %1 = sdiv i8 %a, %b961 ret i8 %1962}963 964define i8 @sdiv8_constant(i8 %a) nounwind {965; RV32I-LABEL: sdiv8_constant:966; RV32I: # %bb.0:967; RV32I-NEXT: addi sp, sp, -16968; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill969; RV32I-NEXT: slli a0, a0, 24970; RV32I-NEXT: srai a0, a0, 24971; RV32I-NEXT: li a1, 5972; RV32I-NEXT: call __divsi3973; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload974; RV32I-NEXT: addi sp, sp, 16975; RV32I-NEXT: ret976;977; RV32IM-LABEL: sdiv8_constant:978; RV32IM: # %bb.0:979; RV32IM-NEXT: slli a0, a0, 24980; RV32IM-NEXT: li a1, 103981; RV32IM-NEXT: srai a0, a0, 24982; RV32IM-NEXT: mul a0, a0, a1983; RV32IM-NEXT: srli a1, a0, 31984; RV32IM-NEXT: srai a0, a0, 9985; RV32IM-NEXT: add a0, a0, a1986; RV32IM-NEXT: ret987;988; RV64I-LABEL: sdiv8_constant:989; RV64I: # %bb.0:990; RV64I-NEXT: addi sp, sp, -16991; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill992; RV64I-NEXT: slli a0, a0, 56993; RV64I-NEXT: srai a0, a0, 56994; RV64I-NEXT: li a1, 5995; RV64I-NEXT: call __divdi3996; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload997; RV64I-NEXT: addi sp, sp, 16998; RV64I-NEXT: ret999;1000; RV64IM-LABEL: sdiv8_constant:1001; RV64IM: # %bb.0:1002; RV64IM-NEXT: slli a0, a0, 561003; RV64IM-NEXT: li a1, 1031004; RV64IM-NEXT: srai a0, a0, 561005; RV64IM-NEXT: mul a0, a0, a11006; RV64IM-NEXT: srli a1, a0, 631007; RV64IM-NEXT: srai a0, a0, 91008; RV64IM-NEXT: add a0, a0, a11009; RV64IM-NEXT: ret1010 %1 = sdiv i8 %a, 51011 ret i8 %11012}1013 1014define i8 @sdiv8_pow2(i8 %a) nounwind {1015; RV32I-LABEL: sdiv8_pow2:1016; RV32I: # %bb.0:1017; RV32I-NEXT: slli a1, a0, 241018; RV32I-NEXT: srai a1, a1, 21019; RV32I-NEXT: srli a1, a1, 291020; RV32I-NEXT: add a0, a0, a11021; RV32I-NEXT: slli a0, a0, 241022; RV32I-NEXT: srai a0, a0, 271023; RV32I-NEXT: ret1024;1025; RV32IM-LABEL: sdiv8_pow2:1026; RV32IM: # %bb.0:1027; RV32IM-NEXT: slli a1, a0, 241028; RV32IM-NEXT: srai a1, a1, 21029; RV32IM-NEXT: srli a1, a1, 291030; RV32IM-NEXT: add a0, a0, a11031; RV32IM-NEXT: slli a0, a0, 241032; RV32IM-NEXT: srai a0, a0, 271033; RV32IM-NEXT: ret1034;1035; RV64I-LABEL: sdiv8_pow2:1036; RV64I: # %bb.0:1037; RV64I-NEXT: slli a1, a0, 561038; RV64I-NEXT: srai a1, a1, 21039; RV64I-NEXT: srli a1, a1, 611040; RV64I-NEXT: add a0, a0, a11041; RV64I-NEXT: slli a0, a0, 561042; RV64I-NEXT: srai a0, a0, 591043; RV64I-NEXT: ret1044;1045; RV64IM-LABEL: sdiv8_pow2:1046; RV64IM: # %bb.0:1047; RV64IM-NEXT: slli a1, a0, 561048; RV64IM-NEXT: srai a1, a1, 21049; RV64IM-NEXT: srli a1, a1, 611050; RV64IM-NEXT: add a0, a0, a11051; RV64IM-NEXT: slli a0, a0, 561052; RV64IM-NEXT: srai a0, a0, 591053; RV64IM-NEXT: ret1054 %1 = sdiv i8 %a, 81055 ret i8 %11056}1057 1058define i8 @sdiv8_constant_lhs(i8 %a) nounwind {1059; RV32I-LABEL: sdiv8_constant_lhs:1060; RV32I: # %bb.0:1061; RV32I-NEXT: addi sp, sp, -161062; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1063; RV32I-NEXT: slli a0, a0, 241064; RV32I-NEXT: srai a1, a0, 241065; RV32I-NEXT: li a0, -101066; RV32I-NEXT: call __divsi31067; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1068; RV32I-NEXT: addi sp, sp, 161069; RV32I-NEXT: ret1070;1071; RV32IM-LABEL: sdiv8_constant_lhs:1072; RV32IM: # %bb.0:1073; RV32IM-NEXT: slli a0, a0, 241074; RV32IM-NEXT: srai a0, a0, 241075; RV32IM-NEXT: li a1, -101076; RV32IM-NEXT: div a0, a1, a01077; RV32IM-NEXT: ret1078;1079; RV64I-LABEL: sdiv8_constant_lhs:1080; RV64I: # %bb.0:1081; RV64I-NEXT: addi sp, sp, -161082; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1083; RV64I-NEXT: slli a0, a0, 561084; RV64I-NEXT: srai a1, a0, 561085; RV64I-NEXT: li a0, -101086; RV64I-NEXT: call __divdi31087; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1088; RV64I-NEXT: addi sp, sp, 161089; RV64I-NEXT: ret1090;1091; RV64IM-LABEL: sdiv8_constant_lhs:1092; RV64IM: # %bb.0:1093; RV64IM-NEXT: slli a0, a0, 561094; RV64IM-NEXT: srai a0, a0, 561095; RV64IM-NEXT: li a1, -101096; RV64IM-NEXT: divw a0, a1, a01097; RV64IM-NEXT: ret1098 %1 = sdiv i8 -10, %a1099 ret i8 %11100}1101 1102define i16 @sdiv16(i16 %a, i16 %b) nounwind {1103; RV32I-LABEL: sdiv16:1104; RV32I: # %bb.0:1105; RV32I-NEXT: addi sp, sp, -161106; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1107; RV32I-NEXT: slli a0, a0, 161108; RV32I-NEXT: slli a1, a1, 161109; RV32I-NEXT: srai a0, a0, 161110; RV32I-NEXT: srai a1, a1, 161111; RV32I-NEXT: call __divsi31112; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1113; RV32I-NEXT: addi sp, sp, 161114; RV32I-NEXT: ret1115;1116; RV32IM-LABEL: sdiv16:1117; RV32IM: # %bb.0:1118; RV32IM-NEXT: slli a1, a1, 161119; RV32IM-NEXT: slli a0, a0, 161120; RV32IM-NEXT: srai a1, a1, 161121; RV32IM-NEXT: srai a0, a0, 161122; RV32IM-NEXT: div a0, a0, a11123; RV32IM-NEXT: ret1124;1125; RV64I-LABEL: sdiv16:1126; RV64I: # %bb.0:1127; RV64I-NEXT: addi sp, sp, -161128; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1129; RV64I-NEXT: slli a0, a0, 481130; RV64I-NEXT: slli a1, a1, 481131; RV64I-NEXT: srai a0, a0, 481132; RV64I-NEXT: srai a1, a1, 481133; RV64I-NEXT: call __divdi31134; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1135; RV64I-NEXT: addi sp, sp, 161136; RV64I-NEXT: ret1137;1138; RV64IM-LABEL: sdiv16:1139; RV64IM: # %bb.0:1140; RV64IM-NEXT: slli a1, a1, 481141; RV64IM-NEXT: slli a0, a0, 481142; RV64IM-NEXT: srai a1, a1, 481143; RV64IM-NEXT: srai a0, a0, 481144; RV64IM-NEXT: divw a0, a0, a11145; RV64IM-NEXT: ret1146 %1 = sdiv i16 %a, %b1147 ret i16 %11148}1149 1150define i16 @sdiv16_constant(i16 %a) nounwind {1151; RV32I-LABEL: sdiv16_constant:1152; RV32I: # %bb.0:1153; RV32I-NEXT: addi sp, sp, -161154; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1155; RV32I-NEXT: slli a0, a0, 161156; RV32I-NEXT: srai a0, a0, 161157; RV32I-NEXT: li a1, 51158; RV32I-NEXT: call __divsi31159; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1160; RV32I-NEXT: addi sp, sp, 161161; RV32I-NEXT: ret1162;1163; RV32IM-LABEL: sdiv16_constant:1164; RV32IM: # %bb.0:1165; RV32IM-NEXT: slli a0, a0, 161166; RV32IM-NEXT: lui a1, 61167; RV32IM-NEXT: srai a0, a0, 161168; RV32IM-NEXT: addi a1, a1, 16391169; RV32IM-NEXT: mul a0, a0, a11170; RV32IM-NEXT: srli a1, a0, 311171; RV32IM-NEXT: srai a0, a0, 171172; RV32IM-NEXT: add a0, a0, a11173; RV32IM-NEXT: ret1174;1175; RV64I-LABEL: sdiv16_constant:1176; RV64I: # %bb.0:1177; RV64I-NEXT: addi sp, sp, -161178; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1179; RV64I-NEXT: slli a0, a0, 481180; RV64I-NEXT: srai a0, a0, 481181; RV64I-NEXT: li a1, 51182; RV64I-NEXT: call __divdi31183; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1184; RV64I-NEXT: addi sp, sp, 161185; RV64I-NEXT: ret1186;1187; RV64IM-LABEL: sdiv16_constant:1188; RV64IM: # %bb.0:1189; RV64IM-NEXT: slli a0, a0, 481190; RV64IM-NEXT: lui a1, 61191; RV64IM-NEXT: srai a0, a0, 481192; RV64IM-NEXT: addi a1, a1, 16391193; RV64IM-NEXT: mul a0, a0, a11194; RV64IM-NEXT: srli a1, a0, 631195; RV64IM-NEXT: srai a0, a0, 171196; RV64IM-NEXT: add a0, a0, a11197; RV64IM-NEXT: ret1198 %1 = sdiv i16 %a, 51199 ret i16 %11200}1201 1202define i16 @sdiv16_pow2(i16 %a) nounwind {1203; RV32I-LABEL: sdiv16_pow2:1204; RV32I: # %bb.0:1205; RV32I-NEXT: slli a1, a0, 161206; RV32I-NEXT: srai a1, a1, 21207; RV32I-NEXT: srli a1, a1, 291208; RV32I-NEXT: add a0, a0, a11209; RV32I-NEXT: slli a0, a0, 161210; RV32I-NEXT: srai a0, a0, 191211; RV32I-NEXT: ret1212;1213; RV32IM-LABEL: sdiv16_pow2:1214; RV32IM: # %bb.0:1215; RV32IM-NEXT: slli a1, a0, 161216; RV32IM-NEXT: srai a1, a1, 21217; RV32IM-NEXT: srli a1, a1, 291218; RV32IM-NEXT: add a0, a0, a11219; RV32IM-NEXT: slli a0, a0, 161220; RV32IM-NEXT: srai a0, a0, 191221; RV32IM-NEXT: ret1222;1223; RV64I-LABEL: sdiv16_pow2:1224; RV64I: # %bb.0:1225; RV64I-NEXT: slli a1, a0, 481226; RV64I-NEXT: srai a1, a1, 21227; RV64I-NEXT: srli a1, a1, 611228; RV64I-NEXT: add a0, a0, a11229; RV64I-NEXT: slli a0, a0, 481230; RV64I-NEXT: srai a0, a0, 511231; RV64I-NEXT: ret1232;1233; RV64IM-LABEL: sdiv16_pow2:1234; RV64IM: # %bb.0:1235; RV64IM-NEXT: slli a1, a0, 481236; RV64IM-NEXT: srai a1, a1, 21237; RV64IM-NEXT: srli a1, a1, 611238; RV64IM-NEXT: add a0, a0, a11239; RV64IM-NEXT: slli a0, a0, 481240; RV64IM-NEXT: srai a0, a0, 511241; RV64IM-NEXT: ret1242 %1 = sdiv i16 %a, 81243 ret i16 %11244}1245 1246define i16 @sdiv16_constant_lhs(i16 %a) nounwind {1247; RV32I-LABEL: sdiv16_constant_lhs:1248; RV32I: # %bb.0:1249; RV32I-NEXT: addi sp, sp, -161250; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1251; RV32I-NEXT: slli a0, a0, 161252; RV32I-NEXT: srai a1, a0, 161253; RV32I-NEXT: li a0, -101254; RV32I-NEXT: call __divsi31255; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1256; RV32I-NEXT: addi sp, sp, 161257; RV32I-NEXT: ret1258;1259; RV32IM-LABEL: sdiv16_constant_lhs:1260; RV32IM: # %bb.0:1261; RV32IM-NEXT: slli a0, a0, 161262; RV32IM-NEXT: srai a0, a0, 161263; RV32IM-NEXT: li a1, -101264; RV32IM-NEXT: div a0, a1, a01265; RV32IM-NEXT: ret1266;1267; RV64I-LABEL: sdiv16_constant_lhs:1268; RV64I: # %bb.0:1269; RV64I-NEXT: addi sp, sp, -161270; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1271; RV64I-NEXT: slli a0, a0, 481272; RV64I-NEXT: srai a1, a0, 481273; RV64I-NEXT: li a0, -101274; RV64I-NEXT: call __divdi31275; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1276; RV64I-NEXT: addi sp, sp, 161277; RV64I-NEXT: ret1278;1279; RV64IM-LABEL: sdiv16_constant_lhs:1280; RV64IM: # %bb.0:1281; RV64IM-NEXT: slli a0, a0, 481282; RV64IM-NEXT: srai a0, a0, 481283; RV64IM-NEXT: li a1, -101284; RV64IM-NEXT: divw a0, a1, a01285; RV64IM-NEXT: ret1286 %1 = sdiv i16 -10, %a1287 ret i16 %11288}1289