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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi=ilp32 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32IFD %s4; RUN: llc -mtriple=riscv32 -mattr=+zdinx -target-abi=ilp32 -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefix=RV32IZFINXZDINX %s6 7; Basic correctness checks for calling convention lowering for RV32D. This can8; be somewhat error-prone for soft-float RV32D due to the fact that f64 is legal9; but i64 is not, and there is no instruction to move values directly between10; the GPRs and 64-bit FPRs.11 12define double @callee_double_inreg(double %a, double %b) nounwind {13; RV32IFD-LABEL: callee_double_inreg:14; RV32IFD: # %bb.0:15; RV32IFD-NEXT: addi sp, sp, -1616; RV32IFD-NEXT: sw a2, 8(sp)17; RV32IFD-NEXT: sw a3, 12(sp)18; RV32IFD-NEXT: fld fa5, 8(sp)19; RV32IFD-NEXT: sw a0, 8(sp)20; RV32IFD-NEXT: sw a1, 12(sp)21; RV32IFD-NEXT: fld fa4, 8(sp)22; RV32IFD-NEXT: fadd.d fa5, fa4, fa523; RV32IFD-NEXT: fsd fa5, 8(sp)24; RV32IFD-NEXT: lw a0, 8(sp)25; RV32IFD-NEXT: lw a1, 12(sp)26; RV32IFD-NEXT: addi sp, sp, 1627; RV32IFD-NEXT: ret28;29; RV32IZFINXZDINX-LABEL: callee_double_inreg:30; RV32IZFINXZDINX: # %bb.0:31; RV32IZFINXZDINX-NEXT: fadd.d a0, a0, a232; RV32IZFINXZDINX-NEXT: ret33 %1 = fadd double %a, %b34 ret double %135}36 37; TODO: code quality for loading and then passing f64 constants is poor.38 39define double @caller_double_inreg() nounwind {40; RV32IFD-LABEL: caller_double_inreg:41; RV32IFD: # %bb.0:42; RV32IFD-NEXT: addi sp, sp, -1643; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill44; RV32IFD-NEXT: lui a0, 26223645; RV32IFD-NEXT: lui a2, 37748746; RV32IFD-NEXT: lui a3, 26236447; RV32IFD-NEXT: addi a1, a0, 65548; RV32IFD-NEXT: addi a0, a2, 147549; RV32IFD-NEXT: addi a3, a3, 65550; RV32IFD-NEXT: mv a2, a051; RV32IFD-NEXT: call callee_double_inreg52; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload53; RV32IFD-NEXT: addi sp, sp, 1654; RV32IFD-NEXT: ret55;56; RV32IZFINXZDINX-LABEL: caller_double_inreg:57; RV32IZFINXZDINX: # %bb.0:58; RV32IZFINXZDINX-NEXT: addi sp, sp, -1659; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill60; RV32IZFINXZDINX-NEXT: lui a0, 26223661; RV32IZFINXZDINX-NEXT: lui a2, 37748762; RV32IZFINXZDINX-NEXT: lui a3, 26236463; RV32IZFINXZDINX-NEXT: addi a1, a0, 65564; RV32IZFINXZDINX-NEXT: addi a0, a2, 147565; RV32IZFINXZDINX-NEXT: addi a3, a3, 65566; RV32IZFINXZDINX-NEXT: mv a2, a067; RV32IZFINXZDINX-NEXT: call callee_double_inreg68; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload69; RV32IZFINXZDINX-NEXT: addi sp, sp, 1670; RV32IZFINXZDINX-NEXT: ret71 %1 = call double @callee_double_inreg(double 2.720000e+00, double 3.720000e+00)72 ret double %173}74 75define double @callee_double_split_reg_stack(i32 %a, i64 %b, i64 %c, double %d, double %e) nounwind {76; RV32IFD-LABEL: callee_double_split_reg_stack:77; RV32IFD: # %bb.0:78; RV32IFD-NEXT: addi sp, sp, -1679; RV32IFD-NEXT: lw a0, 16(sp)80; RV32IFD-NEXT: sw a7, 8(sp)81; RV32IFD-NEXT: sw a0, 12(sp)82; RV32IFD-NEXT: fld fa5, 8(sp)83; RV32IFD-NEXT: sw a5, 8(sp)84; RV32IFD-NEXT: sw a6, 12(sp)85; RV32IFD-NEXT: fld fa4, 8(sp)86; RV32IFD-NEXT: fadd.d fa5, fa4, fa587; RV32IFD-NEXT: fsd fa5, 8(sp)88; RV32IFD-NEXT: lw a0, 8(sp)89; RV32IFD-NEXT: lw a1, 12(sp)90; RV32IFD-NEXT: addi sp, sp, 1691; RV32IFD-NEXT: ret92;93; RV32IZFINXZDINX-LABEL: callee_double_split_reg_stack:94; RV32IZFINXZDINX: # %bb.0:95; RV32IZFINXZDINX-NEXT: mv a0, a796; RV32IZFINXZDINX-NEXT: lw a1, 0(sp)97; RV32IZFINXZDINX-NEXT: mv a3, a698; RV32IZFINXZDINX-NEXT: mv a2, a599; RV32IZFINXZDINX-NEXT: fadd.d a0, a2, a0100; RV32IZFINXZDINX-NEXT: ret101 %1 = fadd double %d, %e102 ret double %1103}104 105define double @caller_double_split_reg_stack() nounwind {106; RV32IFD-LABEL: caller_double_split_reg_stack:107; RV32IFD: # %bb.0:108; RV32IFD-NEXT: addi sp, sp, -16109; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill110; RV32IFD-NEXT: lui a2, 262510111; RV32IFD-NEXT: lui a3, 262446112; RV32IFD-NEXT: lui a4, 713032113; RV32IFD-NEXT: li a0, 1114; RV32IFD-NEXT: li a1, 2115; RV32IFD-NEXT: addi a2, a2, 327116; RV32IFD-NEXT: addi a6, a3, 327117; RV32IFD-NEXT: addi a5, a4, -1311118; RV32IFD-NEXT: li a3, 3119; RV32IFD-NEXT: sw a2, 0(sp)120; RV32IFD-NEXT: li a2, 0121; RV32IFD-NEXT: li a4, 0122; RV32IFD-NEXT: mv a7, a5123; RV32IFD-NEXT: call callee_double_split_reg_stack124; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload125; RV32IFD-NEXT: addi sp, sp, 16126; RV32IFD-NEXT: ret127;128; RV32IZFINXZDINX-LABEL: caller_double_split_reg_stack:129; RV32IZFINXZDINX: # %bb.0:130; RV32IZFINXZDINX-NEXT: addi sp, sp, -16131; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill132; RV32IZFINXZDINX-NEXT: lui a2, 262510133; RV32IZFINXZDINX-NEXT: lui a3, 262446134; RV32IZFINXZDINX-NEXT: lui a4, 713032135; RV32IZFINXZDINX-NEXT: li a0, 1136; RV32IZFINXZDINX-NEXT: li a1, 2137; RV32IZFINXZDINX-NEXT: addi a2, a2, 327138; RV32IZFINXZDINX-NEXT: addi a6, a3, 327139; RV32IZFINXZDINX-NEXT: addi a5, a4, -1311140; RV32IZFINXZDINX-NEXT: li a3, 3141; RV32IZFINXZDINX-NEXT: sw a2, 0(sp)142; RV32IZFINXZDINX-NEXT: li a2, 0143; RV32IZFINXZDINX-NEXT: li a4, 0144; RV32IZFINXZDINX-NEXT: mv a7, a5145; RV32IZFINXZDINX-NEXT: call callee_double_split_reg_stack146; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload147; RV32IZFINXZDINX-NEXT: addi sp, sp, 16148; RV32IZFINXZDINX-NEXT: ret149 %1 = call double @callee_double_split_reg_stack(i32 1, i64 2, i64 3, double 4.72, double 5.72)150 ret double %1151}152 153define double @callee_double_stack(i64 %a, i64 %b, i64 %c, i64 %d, double %e, double %f) nounwind {154; RV32IFD-LABEL: callee_double_stack:155; RV32IFD: # %bb.0:156; RV32IFD-NEXT: addi sp, sp, -16157; RV32IFD-NEXT: fld fa5, 24(sp)158; RV32IFD-NEXT: fld fa4, 16(sp)159; RV32IFD-NEXT: fadd.d fa5, fa4, fa5160; RV32IFD-NEXT: fsd fa5, 8(sp)161; RV32IFD-NEXT: lw a0, 8(sp)162; RV32IFD-NEXT: lw a1, 12(sp)163; RV32IFD-NEXT: addi sp, sp, 16164; RV32IFD-NEXT: ret165;166; RV32IZFINXZDINX-LABEL: callee_double_stack:167; RV32IZFINXZDINX: # %bb.0:168; RV32IZFINXZDINX-NEXT: lw a1, 12(sp)169; RV32IZFINXZDINX-NEXT: lw a3, 4(sp)170; RV32IZFINXZDINX-NEXT: lw a0, 8(sp)171; RV32IZFINXZDINX-NEXT: lw a2, 0(sp)172; RV32IZFINXZDINX-NEXT: fadd.d a0, a2, a0173; RV32IZFINXZDINX-NEXT: ret174 %1 = fadd double %e, %f175 ret double %1176}177 178define double @caller_double_stack() nounwind {179; RV32IFD-LABEL: caller_double_stack:180; RV32IFD: # %bb.0:181; RV32IFD-NEXT: addi sp, sp, -32182; RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill183; RV32IFD-NEXT: lui a1, 262510184; RV32IFD-NEXT: lui a3, 713032185; RV32IFD-NEXT: lui a5, 262574186; RV32IFD-NEXT: li a0, 1187; RV32IFD-NEXT: li a2, 2188; RV32IFD-NEXT: li a4, 3189; RV32IFD-NEXT: li a6, 4190; RV32IFD-NEXT: addi a1, a1, 327191; RV32IFD-NEXT: addi a3, a3, -1311192; RV32IFD-NEXT: addi a5, a5, 327193; RV32IFD-NEXT: sw a3, 0(sp)194; RV32IFD-NEXT: sw a1, 4(sp)195; RV32IFD-NEXT: sw a3, 8(sp)196; RV32IFD-NEXT: sw a5, 12(sp)197; RV32IFD-NEXT: li a1, 0198; RV32IFD-NEXT: li a3, 0199; RV32IFD-NEXT: li a5, 0200; RV32IFD-NEXT: li a7, 0201; RV32IFD-NEXT: call callee_double_stack202; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload203; RV32IFD-NEXT: addi sp, sp, 32204; RV32IFD-NEXT: ret205;206; RV32IZFINXZDINX-LABEL: caller_double_stack:207; RV32IZFINXZDINX: # %bb.0:208; RV32IZFINXZDINX-NEXT: addi sp, sp, -32209; RV32IZFINXZDINX-NEXT: sw ra, 28(sp) # 4-byte Folded Spill210; RV32IZFINXZDINX-NEXT: lui a1, 262510211; RV32IZFINXZDINX-NEXT: lui a3, 713032212; RV32IZFINXZDINX-NEXT: lui a5, 262574213; RV32IZFINXZDINX-NEXT: li a0, 1214; RV32IZFINXZDINX-NEXT: li a2, 2215; RV32IZFINXZDINX-NEXT: li a4, 3216; RV32IZFINXZDINX-NEXT: li a6, 4217; RV32IZFINXZDINX-NEXT: addi a1, a1, 327218; RV32IZFINXZDINX-NEXT: addi a3, a3, -1311219; RV32IZFINXZDINX-NEXT: addi a5, a5, 327220; RV32IZFINXZDINX-NEXT: sw a3, 0(sp)221; RV32IZFINXZDINX-NEXT: sw a1, 4(sp)222; RV32IZFINXZDINX-NEXT: sw a3, 8(sp)223; RV32IZFINXZDINX-NEXT: sw a5, 12(sp)224; RV32IZFINXZDINX-NEXT: li a1, 0225; RV32IZFINXZDINX-NEXT: li a3, 0226; RV32IZFINXZDINX-NEXT: li a5, 0227; RV32IZFINXZDINX-NEXT: li a7, 0228; RV32IZFINXZDINX-NEXT: call callee_double_stack229; RV32IZFINXZDINX-NEXT: lw ra, 28(sp) # 4-byte Folded Reload230; RV32IZFINXZDINX-NEXT: addi sp, sp, 32231; RV32IZFINXZDINX-NEXT: ret232 %1 = call double @callee_double_stack(i64 1, i64 2, i64 3, i64 4, double 5.72, double 6.72)233 ret double %1234}235 236define double @func_return_double_undef() nounwind {237; RV32IFD-LABEL: func_return_double_undef:238; RV32IFD: # %bb.0:239; RV32IFD-NEXT: ret240;241; RV32IZFINXZDINX-LABEL: func_return_double_undef:242; RV32IZFINXZDINX: # %bb.0:243; RV32IZFINXZDINX-NEXT: ret244 ret double poison245}246