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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \3; RUN: -target-abi=ilp32d | FileCheck %s --check-prefix=CHECK32D4; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs < %s \5; RUN: -target-abi=lp64d | FileCheck %s --check-prefix=CHECK64D6; RUN: llc -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs < %s \7; RUN: -target-abi=ilp32 | FileCheck --check-prefix=CHECKRV32ZDINX %s8; RUN: llc -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs < %s \9; RUN: -target-abi=lp64 | FileCheck --check-prefix=CHECKRV64ZDINX %s10 11define double @double_imm() nounwind {12; CHECK32D-LABEL: double_imm:13; CHECK32D: # %bb.0:14; CHECK32D-NEXT: lui a0, %hi(.LCPI0_0)15; CHECK32D-NEXT: fld fa0, %lo(.LCPI0_0)(a0)16; CHECK32D-NEXT: ret17;18; CHECK64D-LABEL: double_imm:19; CHECK64D: # %bb.0:20; CHECK64D-NEXT: lui a0, %hi(.LCPI0_0)21; CHECK64D-NEXT: fld fa0, %lo(.LCPI0_0)(a0)22; CHECK64D-NEXT: ret23;24; CHECKRV32ZDINX-LABEL: double_imm:25; CHECKRV32ZDINX: # %bb.0:26; CHECKRV32ZDINX-NEXT: lui a0, 34515527; CHECKRV32ZDINX-NEXT: lui a1, 26229028; CHECKRV32ZDINX-NEXT: addi a0, a0, -74429; CHECKRV32ZDINX-NEXT: addi a1, a1, 50730; CHECKRV32ZDINX-NEXT: ret31;32; CHECKRV64ZDINX-LABEL: double_imm:33; CHECKRV64ZDINX: # %bb.0:34; CHECKRV64ZDINX-NEXT: lui a0, %hi(.LCPI0_0)35; CHECKRV64ZDINX-NEXT: ld a0, %lo(.LCPI0_0)(a0)36; CHECKRV64ZDINX-NEXT: ret37 ret double 3.141592653589793115997963468544185161590576171875038}39 40define double @double_imm_op(double %a) nounwind {41; CHECK32D-LABEL: double_imm_op:42; CHECK32D: # %bb.0:43; CHECK32D-NEXT: lui a0, %hi(.LCPI1_0)44; CHECK32D-NEXT: fld fa5, %lo(.LCPI1_0)(a0)45; CHECK32D-NEXT: fadd.d fa0, fa0, fa546; CHECK32D-NEXT: ret47;48; CHECK64D-LABEL: double_imm_op:49; CHECK64D: # %bb.0:50; CHECK64D-NEXT: li a0, 102351; CHECK64D-NEXT: slli a0, a0, 5252; CHECK64D-NEXT: fmv.d.x fa5, a053; CHECK64D-NEXT: fadd.d fa0, fa0, fa554; CHECK64D-NEXT: ret55;56; CHECKRV32ZDINX-LABEL: double_imm_op:57; CHECKRV32ZDINX: # %bb.0:58; CHECKRV32ZDINX-NEXT: lui a2, %hi(.LCPI1_0)59; CHECKRV32ZDINX-NEXT: lw a4, %lo(.LCPI1_0)(a2)60; CHECKRV32ZDINX-NEXT: addi a2, a2, %lo(.LCPI1_0)61; CHECKRV32ZDINX-NEXT: lw a5, 4(a2)62; CHECKRV32ZDINX-NEXT: fadd.d a0, a0, a463; CHECKRV32ZDINX-NEXT: ret64;65; CHECKRV64ZDINX-LABEL: double_imm_op:66; CHECKRV64ZDINX: # %bb.0:67; CHECKRV64ZDINX-NEXT: li a1, 102368; CHECKRV64ZDINX-NEXT: slli a1, a1, 5269; CHECKRV64ZDINX-NEXT: fadd.d a0, a0, a170; CHECKRV64ZDINX-NEXT: ret71 %1 = fadd double %a, 1.072 ret double %173}74 75define double @double_positive_zero(ptr %pd) nounwind {76; CHECK32D-LABEL: double_positive_zero:77; CHECK32D: # %bb.0:78; CHECK32D-NEXT: fcvt.d.w fa0, zero79; CHECK32D-NEXT: ret80;81; CHECK64D-LABEL: double_positive_zero:82; CHECK64D: # %bb.0:83; CHECK64D-NEXT: fmv.d.x fa0, zero84; CHECK64D-NEXT: ret85;86; CHECKRV32ZDINX-LABEL: double_positive_zero:87; CHECKRV32ZDINX: # %bb.0:88; CHECKRV32ZDINX-NEXT: li a0, 089; CHECKRV32ZDINX-NEXT: li a1, 090; CHECKRV32ZDINX-NEXT: ret91;92; CHECKRV64ZDINX-LABEL: double_positive_zero:93; CHECKRV64ZDINX: # %bb.0:94; CHECKRV64ZDINX-NEXT: li a0, 095; CHECKRV64ZDINX-NEXT: ret96 ret double 0.097}98 99define double @double_negative_zero(ptr %pd) nounwind {100; CHECK32D-LABEL: double_negative_zero:101; CHECK32D: # %bb.0:102; CHECK32D-NEXT: fcvt.d.w fa5, zero103; CHECK32D-NEXT: fneg.d fa0, fa5104; CHECK32D-NEXT: ret105;106; CHECK64D-LABEL: double_negative_zero:107; CHECK64D: # %bb.0:108; CHECK64D-NEXT: fmv.d.x fa5, zero109; CHECK64D-NEXT: fneg.d fa0, fa5110; CHECK64D-NEXT: ret111;112; CHECKRV32ZDINX-LABEL: double_negative_zero:113; CHECKRV32ZDINX: # %bb.0:114; CHECKRV32ZDINX-NEXT: lui a1, 524288115; CHECKRV32ZDINX-NEXT: li a0, 0116; CHECKRV32ZDINX-NEXT: ret117;118; CHECKRV64ZDINX-LABEL: double_negative_zero:119; CHECKRV64ZDINX: # %bb.0:120; CHECKRV64ZDINX-NEXT: fneg.d a0, zero121; CHECKRV64ZDINX-NEXT: ret122 ret double -0.0123}124define dso_local double @negzero_sel(i16 noundef %a, double noundef %d) nounwind {125; CHECK32D-LABEL: negzero_sel:126; CHECK32D: # %bb.0: # %entry127; CHECK32D-NEXT: slli a0, a0, 16128; CHECK32D-NEXT: beqz a0, .LBB4_2129; CHECK32D-NEXT: # %bb.1: # %entry130; CHECK32D-NEXT: fcvt.d.w fa5, zero131; CHECK32D-NEXT: fneg.d fa0, fa5132; CHECK32D-NEXT: .LBB4_2: # %entry133; CHECK32D-NEXT: ret134;135; CHECK64D-LABEL: negzero_sel:136; CHECK64D: # %bb.0: # %entry137; CHECK64D-NEXT: slli a0, a0, 48138; CHECK64D-NEXT: beqz a0, .LBB4_2139; CHECK64D-NEXT: # %bb.1: # %entry140; CHECK64D-NEXT: fmv.d.x fa5, zero141; CHECK64D-NEXT: fneg.d fa0, fa5142; CHECK64D-NEXT: .LBB4_2: # %entry143; CHECK64D-NEXT: ret144;145; CHECKRV32ZDINX-LABEL: negzero_sel:146; CHECKRV32ZDINX: # %bb.0: # %entry147; CHECKRV32ZDINX-NEXT: slli a0, a0, 16148; CHECKRV32ZDINX-NEXT: beqz a0, .LBB4_2149; CHECKRV32ZDINX-NEXT: # %bb.1: # %entry150; CHECKRV32ZDINX-NEXT: fneg.d a2, zero151; CHECKRV32ZDINX-NEXT: j .LBB4_3152; CHECKRV32ZDINX-NEXT: .LBB4_2:153; CHECKRV32ZDINX-NEXT: mv a3, a2154; CHECKRV32ZDINX-NEXT: mv a2, a1155; CHECKRV32ZDINX-NEXT: .LBB4_3: # %entry156; CHECKRV32ZDINX-NEXT: mv a0, a2157; CHECKRV32ZDINX-NEXT: mv a1, a3158; CHECKRV32ZDINX-NEXT: ret159;160; CHECKRV64ZDINX-LABEL: negzero_sel:161; CHECKRV64ZDINX: # %bb.0: # %entry162; CHECKRV64ZDINX-NEXT: slli a2, a0, 48163; CHECKRV64ZDINX-NEXT: mv a0, a1164; CHECKRV64ZDINX-NEXT: beqz a2, .LBB4_2165; CHECKRV64ZDINX-NEXT: # %bb.1: # %entry166; CHECKRV64ZDINX-NEXT: fneg.d a0, zero167; CHECKRV64ZDINX-NEXT: .LBB4_2: # %entry168; CHECKRV64ZDINX-NEXT: ret169entry:170 %tobool.not = icmp eq i16 %a, 0171 %d. = select i1 %tobool.not, double %d, double -0.000000e+00172 ret double %d.173}174