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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d \3; RUN: -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32d \4; RUN: | FileCheck -check-prefixes=CHECKIFD,RV32IFD %s5; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+d \6; RUN: -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64d \7; RUN: | FileCheck -check-prefixes=CHECKIFD,RV64IFD %s8; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zdinx \9; RUN: -verify-machineinstrs -disable-strictnode-mutation -target-abi=ilp32 \10; RUN: | FileCheck -check-prefix=RV32IZFINXZDINX %s11; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zdinx \12; RUN: -verify-machineinstrs -disable-strictnode-mutation -target-abi=lp64 \13; RUN: | FileCheck -check-prefix=RV64IZFINXZDINX %s14; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 \15; RUN: -verify-machineinstrs -disable-strictnode-mutation \16; RUN: | FileCheck -check-prefix=RV32I %s17; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 \18; RUN: -verify-machineinstrs -disable-strictnode-mutation \19; RUN: | FileCheck -check-prefix=RV64I %s20 21define double @sqrt_f64(double %a) nounwind strictfp {22; CHECKIFD-LABEL: sqrt_f64:23; CHECKIFD: # %bb.0:24; CHECKIFD-NEXT: fsqrt.d fa0, fa025; CHECKIFD-NEXT: ret26;27; RV32IZFINXZDINX-LABEL: sqrt_f64:28; RV32IZFINXZDINX: # %bb.0:29; RV32IZFINXZDINX-NEXT: fsqrt.d a0, a030; RV32IZFINXZDINX-NEXT: ret31;32; RV64IZFINXZDINX-LABEL: sqrt_f64:33; RV64IZFINXZDINX: # %bb.0:34; RV64IZFINXZDINX-NEXT: fsqrt.d a0, a035; RV64IZFINXZDINX-NEXT: ret36;37; RV32I-LABEL: sqrt_f64:38; RV32I: # %bb.0:39; RV32I-NEXT: addi sp, sp, -1640; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill41; RV32I-NEXT: call sqrt42; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload43; RV32I-NEXT: addi sp, sp, 1644; RV32I-NEXT: ret45;46; RV64I-LABEL: sqrt_f64:47; RV64I: # %bb.0:48; RV64I-NEXT: addi sp, sp, -1649; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill50; RV64I-NEXT: call sqrt51; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload52; RV64I-NEXT: addi sp, sp, 1653; RV64I-NEXT: ret54 %1 = call double @llvm.experimental.constrained.sqrt.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp55 ret double %156}57 58define double @powi_f64(double %a, i32 %b) nounwind strictfp {59; RV32IFD-LABEL: powi_f64:60; RV32IFD: # %bb.0:61; RV32IFD-NEXT: addi sp, sp, -1662; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill63; RV32IFD-NEXT: call __powidf264; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload65; RV32IFD-NEXT: addi sp, sp, 1666; RV32IFD-NEXT: ret67;68; RV64IFD-LABEL: powi_f64:69; RV64IFD: # %bb.0:70; RV64IFD-NEXT: addi sp, sp, -1671; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill72; RV64IFD-NEXT: sext.w a0, a073; RV64IFD-NEXT: call __powidf274; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload75; RV64IFD-NEXT: addi sp, sp, 1676; RV64IFD-NEXT: ret77;78; RV32IZFINXZDINX-LABEL: powi_f64:79; RV32IZFINXZDINX: # %bb.0:80; RV32IZFINXZDINX-NEXT: addi sp, sp, -1681; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill82; RV32IZFINXZDINX-NEXT: call __powidf283; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload84; RV32IZFINXZDINX-NEXT: addi sp, sp, 1685; RV32IZFINXZDINX-NEXT: ret86;87; RV64IZFINXZDINX-LABEL: powi_f64:88; RV64IZFINXZDINX: # %bb.0:89; RV64IZFINXZDINX-NEXT: addi sp, sp, -1690; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill91; RV64IZFINXZDINX-NEXT: sext.w a1, a192; RV64IZFINXZDINX-NEXT: call __powidf293; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload94; RV64IZFINXZDINX-NEXT: addi sp, sp, 1695; RV64IZFINXZDINX-NEXT: ret96;97; RV32I-LABEL: powi_f64:98; RV32I: # %bb.0:99; RV32I-NEXT: addi sp, sp, -16100; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill101; RV32I-NEXT: call __powidf2102; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload103; RV32I-NEXT: addi sp, sp, 16104; RV32I-NEXT: ret105;106; RV64I-LABEL: powi_f64:107; RV64I: # %bb.0:108; RV64I-NEXT: addi sp, sp, -16109; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill110; RV64I-NEXT: sext.w a1, a1111; RV64I-NEXT: call __powidf2112; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload113; RV64I-NEXT: addi sp, sp, 16114; RV64I-NEXT: ret115 %1 = call double @llvm.experimental.constrained.powi.f64(double %a, i32 %b, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp116 ret double %1117}118 119define double @sin_f64(double %a) nounwind strictfp {120; RV32IFD-LABEL: sin_f64:121; RV32IFD: # %bb.0:122; RV32IFD-NEXT: addi sp, sp, -16123; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill124; RV32IFD-NEXT: call sin125; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload126; RV32IFD-NEXT: addi sp, sp, 16127; RV32IFD-NEXT: ret128;129; RV64IFD-LABEL: sin_f64:130; RV64IFD: # %bb.0:131; RV64IFD-NEXT: addi sp, sp, -16132; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill133; RV64IFD-NEXT: call sin134; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload135; RV64IFD-NEXT: addi sp, sp, 16136; RV64IFD-NEXT: ret137;138; RV32IZFINXZDINX-LABEL: sin_f64:139; RV32IZFINXZDINX: # %bb.0:140; RV32IZFINXZDINX-NEXT: addi sp, sp, -16141; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill142; RV32IZFINXZDINX-NEXT: call sin143; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload144; RV32IZFINXZDINX-NEXT: addi sp, sp, 16145; RV32IZFINXZDINX-NEXT: ret146;147; RV64IZFINXZDINX-LABEL: sin_f64:148; RV64IZFINXZDINX: # %bb.0:149; RV64IZFINXZDINX-NEXT: addi sp, sp, -16150; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill151; RV64IZFINXZDINX-NEXT: call sin152; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload153; RV64IZFINXZDINX-NEXT: addi sp, sp, 16154; RV64IZFINXZDINX-NEXT: ret155;156; RV32I-LABEL: sin_f64:157; RV32I: # %bb.0:158; RV32I-NEXT: addi sp, sp, -16159; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill160; RV32I-NEXT: call sin161; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload162; RV32I-NEXT: addi sp, sp, 16163; RV32I-NEXT: ret164;165; RV64I-LABEL: sin_f64:166; RV64I: # %bb.0:167; RV64I-NEXT: addi sp, sp, -16168; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill169; RV64I-NEXT: call sin170; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload171; RV64I-NEXT: addi sp, sp, 16172; RV64I-NEXT: ret173 %1 = call double @llvm.experimental.constrained.sin.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp174 ret double %1175}176 177define double @cos_f64(double %a) nounwind strictfp {178; RV32IFD-LABEL: cos_f64:179; RV32IFD: # %bb.0:180; RV32IFD-NEXT: addi sp, sp, -16181; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill182; RV32IFD-NEXT: call cos183; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload184; RV32IFD-NEXT: addi sp, sp, 16185; RV32IFD-NEXT: ret186;187; RV64IFD-LABEL: cos_f64:188; RV64IFD: # %bb.0:189; RV64IFD-NEXT: addi sp, sp, -16190; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill191; RV64IFD-NEXT: call cos192; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload193; RV64IFD-NEXT: addi sp, sp, 16194; RV64IFD-NEXT: ret195;196; RV32IZFINXZDINX-LABEL: cos_f64:197; RV32IZFINXZDINX: # %bb.0:198; RV32IZFINXZDINX-NEXT: addi sp, sp, -16199; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill200; RV32IZFINXZDINX-NEXT: call cos201; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload202; RV32IZFINXZDINX-NEXT: addi sp, sp, 16203; RV32IZFINXZDINX-NEXT: ret204;205; RV64IZFINXZDINX-LABEL: cos_f64:206; RV64IZFINXZDINX: # %bb.0:207; RV64IZFINXZDINX-NEXT: addi sp, sp, -16208; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill209; RV64IZFINXZDINX-NEXT: call cos210; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload211; RV64IZFINXZDINX-NEXT: addi sp, sp, 16212; RV64IZFINXZDINX-NEXT: ret213;214; RV32I-LABEL: cos_f64:215; RV32I: # %bb.0:216; RV32I-NEXT: addi sp, sp, -16217; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill218; RV32I-NEXT: call cos219; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload220; RV32I-NEXT: addi sp, sp, 16221; RV32I-NEXT: ret222;223; RV64I-LABEL: cos_f64:224; RV64I: # %bb.0:225; RV64I-NEXT: addi sp, sp, -16226; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill227; RV64I-NEXT: call cos228; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload229; RV64I-NEXT: addi sp, sp, 16230; RV64I-NEXT: ret231 %1 = call double @llvm.experimental.constrained.cos.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp232 ret double %1233}234 235; The sin+cos combination results in an FSINCOS SelectionDAG node.236define double @sincos_f64(double %a) nounwind strictfp {237; RV32IFD-LABEL: sincos_f64:238; RV32IFD: # %bb.0:239; RV32IFD-NEXT: addi sp, sp, -32240; RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill241; RV32IFD-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill242; RV32IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill243; RV32IFD-NEXT: fmv.d fs0, fa0244; RV32IFD-NEXT: call sin245; RV32IFD-NEXT: fmv.d fs1, fa0246; RV32IFD-NEXT: fmv.d fa0, fs0247; RV32IFD-NEXT: call cos248; RV32IFD-NEXT: fadd.d fa0, fs1, fa0249; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload250; RV32IFD-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload251; RV32IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload252; RV32IFD-NEXT: addi sp, sp, 32253; RV32IFD-NEXT: ret254;255; RV64IFD-LABEL: sincos_f64:256; RV64IFD: # %bb.0:257; RV64IFD-NEXT: addi sp, sp, -32258; RV64IFD-NEXT: sd ra, 24(sp) # 8-byte Folded Spill259; RV64IFD-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill260; RV64IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill261; RV64IFD-NEXT: fmv.d fs0, fa0262; RV64IFD-NEXT: call sin263; RV64IFD-NEXT: fmv.d fs1, fa0264; RV64IFD-NEXT: fmv.d fa0, fs0265; RV64IFD-NEXT: call cos266; RV64IFD-NEXT: fadd.d fa0, fs1, fa0267; RV64IFD-NEXT: ld ra, 24(sp) # 8-byte Folded Reload268; RV64IFD-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload269; RV64IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload270; RV64IFD-NEXT: addi sp, sp, 32271; RV64IFD-NEXT: ret272;273; RV32IZFINXZDINX-LABEL: sincos_f64:274; RV32IZFINXZDINX: # %bb.0:275; RV32IZFINXZDINX-NEXT: addi sp, sp, -32276; RV32IZFINXZDINX-NEXT: sw ra, 28(sp) # 4-byte Folded Spill277; RV32IZFINXZDINX-NEXT: sw s0, 24(sp) # 4-byte Folded Spill278; RV32IZFINXZDINX-NEXT: sw s1, 20(sp) # 4-byte Folded Spill279; RV32IZFINXZDINX-NEXT: sw s2, 16(sp) # 4-byte Folded Spill280; RV32IZFINXZDINX-NEXT: sw s3, 12(sp) # 4-byte Folded Spill281; RV32IZFINXZDINX-NEXT: mv s0, a1282; RV32IZFINXZDINX-NEXT: mv s1, a0283; RV32IZFINXZDINX-NEXT: call sin284; RV32IZFINXZDINX-NEXT: mv s2, a0285; RV32IZFINXZDINX-NEXT: mv s3, a1286; RV32IZFINXZDINX-NEXT: mv a0, s1287; RV32IZFINXZDINX-NEXT: mv a1, s0288; RV32IZFINXZDINX-NEXT: call cos289; RV32IZFINXZDINX-NEXT: fadd.d a0, s2, a0290; RV32IZFINXZDINX-NEXT: lw ra, 28(sp) # 4-byte Folded Reload291; RV32IZFINXZDINX-NEXT: lw s0, 24(sp) # 4-byte Folded Reload292; RV32IZFINXZDINX-NEXT: lw s1, 20(sp) # 4-byte Folded Reload293; RV32IZFINXZDINX-NEXT: lw s2, 16(sp) # 4-byte Folded Reload294; RV32IZFINXZDINX-NEXT: lw s3, 12(sp) # 4-byte Folded Reload295; RV32IZFINXZDINX-NEXT: addi sp, sp, 32296; RV32IZFINXZDINX-NEXT: ret297;298; RV64IZFINXZDINX-LABEL: sincos_f64:299; RV64IZFINXZDINX: # %bb.0:300; RV64IZFINXZDINX-NEXT: addi sp, sp, -32301; RV64IZFINXZDINX-NEXT: sd ra, 24(sp) # 8-byte Folded Spill302; RV64IZFINXZDINX-NEXT: sd s0, 16(sp) # 8-byte Folded Spill303; RV64IZFINXZDINX-NEXT: sd s1, 8(sp) # 8-byte Folded Spill304; RV64IZFINXZDINX-NEXT: mv s0, a0305; RV64IZFINXZDINX-NEXT: call sin306; RV64IZFINXZDINX-NEXT: mv s1, a0307; RV64IZFINXZDINX-NEXT: mv a0, s0308; RV64IZFINXZDINX-NEXT: call cos309; RV64IZFINXZDINX-NEXT: fadd.d a0, s1, a0310; RV64IZFINXZDINX-NEXT: ld ra, 24(sp) # 8-byte Folded Reload311; RV64IZFINXZDINX-NEXT: ld s0, 16(sp) # 8-byte Folded Reload312; RV64IZFINXZDINX-NEXT: ld s1, 8(sp) # 8-byte Folded Reload313; RV64IZFINXZDINX-NEXT: addi sp, sp, 32314; RV64IZFINXZDINX-NEXT: ret315;316; RV32I-LABEL: sincos_f64:317; RV32I: # %bb.0:318; RV32I-NEXT: addi sp, sp, -32319; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill320; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill321; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill322; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill323; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill324; RV32I-NEXT: mv s0, a1325; RV32I-NEXT: mv s1, a0326; RV32I-NEXT: call sin327; RV32I-NEXT: mv s2, a0328; RV32I-NEXT: mv s3, a1329; RV32I-NEXT: mv a0, s1330; RV32I-NEXT: mv a1, s0331; RV32I-NEXT: call cos332; RV32I-NEXT: mv a2, a0333; RV32I-NEXT: mv a3, a1334; RV32I-NEXT: mv a0, s2335; RV32I-NEXT: mv a1, s3336; RV32I-NEXT: call __adddf3337; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload338; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload339; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload340; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload341; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload342; RV32I-NEXT: addi sp, sp, 32343; RV32I-NEXT: ret344;345; RV64I-LABEL: sincos_f64:346; RV64I: # %bb.0:347; RV64I-NEXT: addi sp, sp, -32348; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill349; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill350; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill351; RV64I-NEXT: mv s0, a0352; RV64I-NEXT: call sin353; RV64I-NEXT: mv s1, a0354; RV64I-NEXT: mv a0, s0355; RV64I-NEXT: call cos356; RV64I-NEXT: mv a1, a0357; RV64I-NEXT: mv a0, s1358; RV64I-NEXT: call __adddf3359; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload360; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload361; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload362; RV64I-NEXT: addi sp, sp, 32363; RV64I-NEXT: ret364 %1 = call double @llvm.experimental.constrained.sin.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp365 %2 = call double @llvm.experimental.constrained.cos.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp366 %3 = fadd double %1, %2367 ret double %3368}369 370define double @tan_f64(double %a) nounwind strictfp {371; RV32IFD-LABEL: tan_f64:372; RV32IFD: # %bb.0:373; RV32IFD-NEXT: addi sp, sp, -16374; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill375; RV32IFD-NEXT: call tan376; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload377; RV32IFD-NEXT: addi sp, sp, 16378; RV32IFD-NEXT: ret379;380; RV64IFD-LABEL: tan_f64:381; RV64IFD: # %bb.0:382; RV64IFD-NEXT: addi sp, sp, -16383; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill384; RV64IFD-NEXT: call tan385; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload386; RV64IFD-NEXT: addi sp, sp, 16387; RV64IFD-NEXT: ret388;389; RV32IZFINXZDINX-LABEL: tan_f64:390; RV32IZFINXZDINX: # %bb.0:391; RV32IZFINXZDINX-NEXT: addi sp, sp, -16392; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill393; RV32IZFINXZDINX-NEXT: call tan394; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload395; RV32IZFINXZDINX-NEXT: addi sp, sp, 16396; RV32IZFINXZDINX-NEXT: ret397;398; RV64IZFINXZDINX-LABEL: tan_f64:399; RV64IZFINXZDINX: # %bb.0:400; RV64IZFINXZDINX-NEXT: addi sp, sp, -16401; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill402; RV64IZFINXZDINX-NEXT: call tan403; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload404; RV64IZFINXZDINX-NEXT: addi sp, sp, 16405; RV64IZFINXZDINX-NEXT: ret406;407; RV32I-LABEL: tan_f64:408; RV32I: # %bb.0:409; RV32I-NEXT: addi sp, sp, -16410; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill411; RV32I-NEXT: call tan412; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload413; RV32I-NEXT: addi sp, sp, 16414; RV32I-NEXT: ret415;416; RV64I-LABEL: tan_f64:417; RV64I: # %bb.0:418; RV64I-NEXT: addi sp, sp, -16419; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill420; RV64I-NEXT: call tan421; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload422; RV64I-NEXT: addi sp, sp, 16423; RV64I-NEXT: ret424 %1 = call double @llvm.experimental.constrained.tan.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp425 ret double %1426}427 428define double @asin_f64(double %a) nounwind strictfp {429; RV32IFD-LABEL: asin_f64:430; RV32IFD: # %bb.0:431; RV32IFD-NEXT: addi sp, sp, -16432; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill433; RV32IFD-NEXT: call asin434; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload435; RV32IFD-NEXT: addi sp, sp, 16436; RV32IFD-NEXT: ret437;438; RV64IFD-LABEL: asin_f64:439; RV64IFD: # %bb.0:440; RV64IFD-NEXT: addi sp, sp, -16441; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill442; RV64IFD-NEXT: call asin443; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload444; RV64IFD-NEXT: addi sp, sp, 16445; RV64IFD-NEXT: ret446;447; RV32IZFINXZDINX-LABEL: asin_f64:448; RV32IZFINXZDINX: # %bb.0:449; RV32IZFINXZDINX-NEXT: addi sp, sp, -16450; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill451; RV32IZFINXZDINX-NEXT: call asin452; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload453; RV32IZFINXZDINX-NEXT: addi sp, sp, 16454; RV32IZFINXZDINX-NEXT: ret455;456; RV64IZFINXZDINX-LABEL: asin_f64:457; RV64IZFINXZDINX: # %bb.0:458; RV64IZFINXZDINX-NEXT: addi sp, sp, -16459; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill460; RV64IZFINXZDINX-NEXT: call asin461; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload462; RV64IZFINXZDINX-NEXT: addi sp, sp, 16463; RV64IZFINXZDINX-NEXT: ret464;465; RV32I-LABEL: asin_f64:466; RV32I: # %bb.0:467; RV32I-NEXT: addi sp, sp, -16468; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill469; RV32I-NEXT: call asin470; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload471; RV32I-NEXT: addi sp, sp, 16472; RV32I-NEXT: ret473;474; RV64I-LABEL: asin_f64:475; RV64I: # %bb.0:476; RV64I-NEXT: addi sp, sp, -16477; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill478; RV64I-NEXT: call asin479; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload480; RV64I-NEXT: addi sp, sp, 16481; RV64I-NEXT: ret482 %1 = call double @llvm.experimental.constrained.asin.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp483 ret double %1484}485 486define double @acos_f64(double %a) nounwind strictfp {487; RV32IFD-LABEL: acos_f64:488; RV32IFD: # %bb.0:489; RV32IFD-NEXT: addi sp, sp, -16490; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill491; RV32IFD-NEXT: call acos492; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload493; RV32IFD-NEXT: addi sp, sp, 16494; RV32IFD-NEXT: ret495;496; RV64IFD-LABEL: acos_f64:497; RV64IFD: # %bb.0:498; RV64IFD-NEXT: addi sp, sp, -16499; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill500; RV64IFD-NEXT: call acos501; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload502; RV64IFD-NEXT: addi sp, sp, 16503; RV64IFD-NEXT: ret504;505; RV32IZFINXZDINX-LABEL: acos_f64:506; RV32IZFINXZDINX: # %bb.0:507; RV32IZFINXZDINX-NEXT: addi sp, sp, -16508; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill509; RV32IZFINXZDINX-NEXT: call acos510; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload511; RV32IZFINXZDINX-NEXT: addi sp, sp, 16512; RV32IZFINXZDINX-NEXT: ret513;514; RV64IZFINXZDINX-LABEL: acos_f64:515; RV64IZFINXZDINX: # %bb.0:516; RV64IZFINXZDINX-NEXT: addi sp, sp, -16517; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill518; RV64IZFINXZDINX-NEXT: call acos519; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload520; RV64IZFINXZDINX-NEXT: addi sp, sp, 16521; RV64IZFINXZDINX-NEXT: ret522;523; RV32I-LABEL: acos_f64:524; RV32I: # %bb.0:525; RV32I-NEXT: addi sp, sp, -16526; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill527; RV32I-NEXT: call acos528; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload529; RV32I-NEXT: addi sp, sp, 16530; RV32I-NEXT: ret531;532; RV64I-LABEL: acos_f64:533; RV64I: # %bb.0:534; RV64I-NEXT: addi sp, sp, -16535; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill536; RV64I-NEXT: call acos537; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload538; RV64I-NEXT: addi sp, sp, 16539; RV64I-NEXT: ret540 %1 = call double @llvm.experimental.constrained.acos.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp541 ret double %1542}543 544define double @atan_f64(double %a) nounwind strictfp {545; RV32IFD-LABEL: atan_f64:546; RV32IFD: # %bb.0:547; RV32IFD-NEXT: addi sp, sp, -16548; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill549; RV32IFD-NEXT: call atan550; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload551; RV32IFD-NEXT: addi sp, sp, 16552; RV32IFD-NEXT: ret553;554; RV64IFD-LABEL: atan_f64:555; RV64IFD: # %bb.0:556; RV64IFD-NEXT: addi sp, sp, -16557; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill558; RV64IFD-NEXT: call atan559; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload560; RV64IFD-NEXT: addi sp, sp, 16561; RV64IFD-NEXT: ret562;563; RV32IZFINXZDINX-LABEL: atan_f64:564; RV32IZFINXZDINX: # %bb.0:565; RV32IZFINXZDINX-NEXT: addi sp, sp, -16566; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill567; RV32IZFINXZDINX-NEXT: call atan568; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload569; RV32IZFINXZDINX-NEXT: addi sp, sp, 16570; RV32IZFINXZDINX-NEXT: ret571;572; RV64IZFINXZDINX-LABEL: atan_f64:573; RV64IZFINXZDINX: # %bb.0:574; RV64IZFINXZDINX-NEXT: addi sp, sp, -16575; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill576; RV64IZFINXZDINX-NEXT: call atan577; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload578; RV64IZFINXZDINX-NEXT: addi sp, sp, 16579; RV64IZFINXZDINX-NEXT: ret580;581; RV32I-LABEL: atan_f64:582; RV32I: # %bb.0:583; RV32I-NEXT: addi sp, sp, -16584; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill585; RV32I-NEXT: call atan586; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload587; RV32I-NEXT: addi sp, sp, 16588; RV32I-NEXT: ret589;590; RV64I-LABEL: atan_f64:591; RV64I: # %bb.0:592; RV64I-NEXT: addi sp, sp, -16593; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill594; RV64I-NEXT: call atan595; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload596; RV64I-NEXT: addi sp, sp, 16597; RV64I-NEXT: ret598 %1 = call double @llvm.experimental.constrained.atan.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp599 ret double %1600}601 602define double @atan2_f64(double %a, double %b) nounwind strictfp {603; RV32IFD-LABEL: atan2_f64:604; RV32IFD: # %bb.0:605; RV32IFD-NEXT: addi sp, sp, -16606; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill607; RV32IFD-NEXT: call atan2608; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload609; RV32IFD-NEXT: addi sp, sp, 16610; RV32IFD-NEXT: ret611;612; RV64IFD-LABEL: atan2_f64:613; RV64IFD: # %bb.0:614; RV64IFD-NEXT: addi sp, sp, -16615; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill616; RV64IFD-NEXT: call atan2617; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload618; RV64IFD-NEXT: addi sp, sp, 16619; RV64IFD-NEXT: ret620;621; RV32IZFINXZDINX-LABEL: atan2_f64:622; RV32IZFINXZDINX: # %bb.0:623; RV32IZFINXZDINX-NEXT: addi sp, sp, -16624; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill625; RV32IZFINXZDINX-NEXT: call atan2626; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload627; RV32IZFINXZDINX-NEXT: addi sp, sp, 16628; RV32IZFINXZDINX-NEXT: ret629;630; RV64IZFINXZDINX-LABEL: atan2_f64:631; RV64IZFINXZDINX: # %bb.0:632; RV64IZFINXZDINX-NEXT: addi sp, sp, -16633; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill634; RV64IZFINXZDINX-NEXT: call atan2635; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload636; RV64IZFINXZDINX-NEXT: addi sp, sp, 16637; RV64IZFINXZDINX-NEXT: ret638;639; RV32I-LABEL: atan2_f64:640; RV32I: # %bb.0:641; RV32I-NEXT: addi sp, sp, -16642; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill643; RV32I-NEXT: call atan2644; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload645; RV32I-NEXT: addi sp, sp, 16646; RV32I-NEXT: ret647;648; RV64I-LABEL: atan2_f64:649; RV64I: # %bb.0:650; RV64I-NEXT: addi sp, sp, -16651; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill652; RV64I-NEXT: call atan2653; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload654; RV64I-NEXT: addi sp, sp, 16655; RV64I-NEXT: ret656 %1 = call double @llvm.experimental.constrained.atan2.f64(double %a, double %b, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp657 ret double %1658}659 660define double @sinh_f64(double %a) nounwind strictfp {661; RV32IFD-LABEL: sinh_f64:662; RV32IFD: # %bb.0:663; RV32IFD-NEXT: addi sp, sp, -16664; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill665; RV32IFD-NEXT: call sinh666; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload667; RV32IFD-NEXT: addi sp, sp, 16668; RV32IFD-NEXT: ret669;670; RV64IFD-LABEL: sinh_f64:671; RV64IFD: # %bb.0:672; RV64IFD-NEXT: addi sp, sp, -16673; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill674; RV64IFD-NEXT: call sinh675; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload676; RV64IFD-NEXT: addi sp, sp, 16677; RV64IFD-NEXT: ret678;679; RV32IZFINXZDINX-LABEL: sinh_f64:680; RV32IZFINXZDINX: # %bb.0:681; RV32IZFINXZDINX-NEXT: addi sp, sp, -16682; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill683; RV32IZFINXZDINX-NEXT: call sinh684; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload685; RV32IZFINXZDINX-NEXT: addi sp, sp, 16686; RV32IZFINXZDINX-NEXT: ret687;688; RV64IZFINXZDINX-LABEL: sinh_f64:689; RV64IZFINXZDINX: # %bb.0:690; RV64IZFINXZDINX-NEXT: addi sp, sp, -16691; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill692; RV64IZFINXZDINX-NEXT: call sinh693; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload694; RV64IZFINXZDINX-NEXT: addi sp, sp, 16695; RV64IZFINXZDINX-NEXT: ret696;697; RV32I-LABEL: sinh_f64:698; RV32I: # %bb.0:699; RV32I-NEXT: addi sp, sp, -16700; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill701; RV32I-NEXT: call sinh702; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload703; RV32I-NEXT: addi sp, sp, 16704; RV32I-NEXT: ret705;706; RV64I-LABEL: sinh_f64:707; RV64I: # %bb.0:708; RV64I-NEXT: addi sp, sp, -16709; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill710; RV64I-NEXT: call sinh711; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload712; RV64I-NEXT: addi sp, sp, 16713; RV64I-NEXT: ret714 %1 = call double @llvm.experimental.constrained.sinh.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp715 ret double %1716}717 718define double @cosh_f64(double %a) nounwind strictfp {719; RV32IFD-LABEL: cosh_f64:720; RV32IFD: # %bb.0:721; RV32IFD-NEXT: addi sp, sp, -16722; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill723; RV32IFD-NEXT: call cosh724; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload725; RV32IFD-NEXT: addi sp, sp, 16726; RV32IFD-NEXT: ret727;728; RV64IFD-LABEL: cosh_f64:729; RV64IFD: # %bb.0:730; RV64IFD-NEXT: addi sp, sp, -16731; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill732; RV64IFD-NEXT: call cosh733; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload734; RV64IFD-NEXT: addi sp, sp, 16735; RV64IFD-NEXT: ret736;737; RV32IZFINXZDINX-LABEL: cosh_f64:738; RV32IZFINXZDINX: # %bb.0:739; RV32IZFINXZDINX-NEXT: addi sp, sp, -16740; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill741; RV32IZFINXZDINX-NEXT: call cosh742; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload743; RV32IZFINXZDINX-NEXT: addi sp, sp, 16744; RV32IZFINXZDINX-NEXT: ret745;746; RV64IZFINXZDINX-LABEL: cosh_f64:747; RV64IZFINXZDINX: # %bb.0:748; RV64IZFINXZDINX-NEXT: addi sp, sp, -16749; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill750; RV64IZFINXZDINX-NEXT: call cosh751; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload752; RV64IZFINXZDINX-NEXT: addi sp, sp, 16753; RV64IZFINXZDINX-NEXT: ret754;755; RV32I-LABEL: cosh_f64:756; RV32I: # %bb.0:757; RV32I-NEXT: addi sp, sp, -16758; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill759; RV32I-NEXT: call cosh760; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload761; RV32I-NEXT: addi sp, sp, 16762; RV32I-NEXT: ret763;764; RV64I-LABEL: cosh_f64:765; RV64I: # %bb.0:766; RV64I-NEXT: addi sp, sp, -16767; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill768; RV64I-NEXT: call cosh769; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload770; RV64I-NEXT: addi sp, sp, 16771; RV64I-NEXT: ret772 %1 = call double @llvm.experimental.constrained.cosh.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp773 ret double %1774}775 776define double @tanh_f64(double %a) nounwind strictfp {777; RV32IFD-LABEL: tanh_f64:778; RV32IFD: # %bb.0:779; RV32IFD-NEXT: addi sp, sp, -16780; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill781; RV32IFD-NEXT: call tanh782; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload783; RV32IFD-NEXT: addi sp, sp, 16784; RV32IFD-NEXT: ret785;786; RV64IFD-LABEL: tanh_f64:787; RV64IFD: # %bb.0:788; RV64IFD-NEXT: addi sp, sp, -16789; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill790; RV64IFD-NEXT: call tanh791; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload792; RV64IFD-NEXT: addi sp, sp, 16793; RV64IFD-NEXT: ret794;795; RV32IZFINXZDINX-LABEL: tanh_f64:796; RV32IZFINXZDINX: # %bb.0:797; RV32IZFINXZDINX-NEXT: addi sp, sp, -16798; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill799; RV32IZFINXZDINX-NEXT: call tanh800; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload801; RV32IZFINXZDINX-NEXT: addi sp, sp, 16802; RV32IZFINXZDINX-NEXT: ret803;804; RV64IZFINXZDINX-LABEL: tanh_f64:805; RV64IZFINXZDINX: # %bb.0:806; RV64IZFINXZDINX-NEXT: addi sp, sp, -16807; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill808; RV64IZFINXZDINX-NEXT: call tanh809; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload810; RV64IZFINXZDINX-NEXT: addi sp, sp, 16811; RV64IZFINXZDINX-NEXT: ret812;813; RV32I-LABEL: tanh_f64:814; RV32I: # %bb.0:815; RV32I-NEXT: addi sp, sp, -16816; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill817; RV32I-NEXT: call tanh818; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload819; RV32I-NEXT: addi sp, sp, 16820; RV32I-NEXT: ret821;822; RV64I-LABEL: tanh_f64:823; RV64I: # %bb.0:824; RV64I-NEXT: addi sp, sp, -16825; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill826; RV64I-NEXT: call tanh827; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload828; RV64I-NEXT: addi sp, sp, 16829; RV64I-NEXT: ret830 %1 = call double @llvm.experimental.constrained.tanh.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp831 ret double %1832}833 834define double @pow_f64(double %a, double %b) nounwind strictfp {835; RV32IFD-LABEL: pow_f64:836; RV32IFD: # %bb.0:837; RV32IFD-NEXT: addi sp, sp, -16838; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill839; RV32IFD-NEXT: call pow840; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload841; RV32IFD-NEXT: addi sp, sp, 16842; RV32IFD-NEXT: ret843;844; RV64IFD-LABEL: pow_f64:845; RV64IFD: # %bb.0:846; RV64IFD-NEXT: addi sp, sp, -16847; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill848; RV64IFD-NEXT: call pow849; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload850; RV64IFD-NEXT: addi sp, sp, 16851; RV64IFD-NEXT: ret852;853; RV32IZFINXZDINX-LABEL: pow_f64:854; RV32IZFINXZDINX: # %bb.0:855; RV32IZFINXZDINX-NEXT: addi sp, sp, -16856; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill857; RV32IZFINXZDINX-NEXT: call pow858; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload859; RV32IZFINXZDINX-NEXT: addi sp, sp, 16860; RV32IZFINXZDINX-NEXT: ret861;862; RV64IZFINXZDINX-LABEL: pow_f64:863; RV64IZFINXZDINX: # %bb.0:864; RV64IZFINXZDINX-NEXT: addi sp, sp, -16865; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill866; RV64IZFINXZDINX-NEXT: call pow867; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload868; RV64IZFINXZDINX-NEXT: addi sp, sp, 16869; RV64IZFINXZDINX-NEXT: ret870;871; RV32I-LABEL: pow_f64:872; RV32I: # %bb.0:873; RV32I-NEXT: addi sp, sp, -16874; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill875; RV32I-NEXT: call pow876; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload877; RV32I-NEXT: addi sp, sp, 16878; RV32I-NEXT: ret879;880; RV64I-LABEL: pow_f64:881; RV64I: # %bb.0:882; RV64I-NEXT: addi sp, sp, -16883; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill884; RV64I-NEXT: call pow885; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload886; RV64I-NEXT: addi sp, sp, 16887; RV64I-NEXT: ret888 %1 = call double @llvm.experimental.constrained.pow.f64(double %a, double %b, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp889 ret double %1890}891 892define double @exp_f64(double %a) nounwind strictfp {893; RV32IFD-LABEL: exp_f64:894; RV32IFD: # %bb.0:895; RV32IFD-NEXT: addi sp, sp, -16896; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill897; RV32IFD-NEXT: call exp898; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload899; RV32IFD-NEXT: addi sp, sp, 16900; RV32IFD-NEXT: ret901;902; RV64IFD-LABEL: exp_f64:903; RV64IFD: # %bb.0:904; RV64IFD-NEXT: addi sp, sp, -16905; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill906; RV64IFD-NEXT: call exp907; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload908; RV64IFD-NEXT: addi sp, sp, 16909; RV64IFD-NEXT: ret910;911; RV32IZFINXZDINX-LABEL: exp_f64:912; RV32IZFINXZDINX: # %bb.0:913; RV32IZFINXZDINX-NEXT: addi sp, sp, -16914; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill915; RV32IZFINXZDINX-NEXT: call exp916; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload917; RV32IZFINXZDINX-NEXT: addi sp, sp, 16918; RV32IZFINXZDINX-NEXT: ret919;920; RV64IZFINXZDINX-LABEL: exp_f64:921; RV64IZFINXZDINX: # %bb.0:922; RV64IZFINXZDINX-NEXT: addi sp, sp, -16923; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill924; RV64IZFINXZDINX-NEXT: call exp925; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload926; RV64IZFINXZDINX-NEXT: addi sp, sp, 16927; RV64IZFINXZDINX-NEXT: ret928;929; RV32I-LABEL: exp_f64:930; RV32I: # %bb.0:931; RV32I-NEXT: addi sp, sp, -16932; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill933; RV32I-NEXT: call exp934; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload935; RV32I-NEXT: addi sp, sp, 16936; RV32I-NEXT: ret937;938; RV64I-LABEL: exp_f64:939; RV64I: # %bb.0:940; RV64I-NEXT: addi sp, sp, -16941; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill942; RV64I-NEXT: call exp943; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload944; RV64I-NEXT: addi sp, sp, 16945; RV64I-NEXT: ret946 %1 = call double @llvm.experimental.constrained.exp.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp947 ret double %1948}949 950define double @exp2_f64(double %a) nounwind strictfp {951; RV32IFD-LABEL: exp2_f64:952; RV32IFD: # %bb.0:953; RV32IFD-NEXT: addi sp, sp, -16954; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill955; RV32IFD-NEXT: call exp2956; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload957; RV32IFD-NEXT: addi sp, sp, 16958; RV32IFD-NEXT: ret959;960; RV64IFD-LABEL: exp2_f64:961; RV64IFD: # %bb.0:962; RV64IFD-NEXT: addi sp, sp, -16963; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill964; RV64IFD-NEXT: call exp2965; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload966; RV64IFD-NEXT: addi sp, sp, 16967; RV64IFD-NEXT: ret968;969; RV32IZFINXZDINX-LABEL: exp2_f64:970; RV32IZFINXZDINX: # %bb.0:971; RV32IZFINXZDINX-NEXT: addi sp, sp, -16972; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill973; RV32IZFINXZDINX-NEXT: call exp2974; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload975; RV32IZFINXZDINX-NEXT: addi sp, sp, 16976; RV32IZFINXZDINX-NEXT: ret977;978; RV64IZFINXZDINX-LABEL: exp2_f64:979; RV64IZFINXZDINX: # %bb.0:980; RV64IZFINXZDINX-NEXT: addi sp, sp, -16981; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill982; RV64IZFINXZDINX-NEXT: call exp2983; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload984; RV64IZFINXZDINX-NEXT: addi sp, sp, 16985; RV64IZFINXZDINX-NEXT: ret986;987; RV32I-LABEL: exp2_f64:988; RV32I: # %bb.0:989; RV32I-NEXT: addi sp, sp, -16990; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill991; RV32I-NEXT: call exp2992; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload993; RV32I-NEXT: addi sp, sp, 16994; RV32I-NEXT: ret995;996; RV64I-LABEL: exp2_f64:997; RV64I: # %bb.0:998; RV64I-NEXT: addi sp, sp, -16999; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1000; RV64I-NEXT: call exp21001; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1002; RV64I-NEXT: addi sp, sp, 161003; RV64I-NEXT: ret1004 %1 = call double @llvm.experimental.constrained.exp2.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp1005 ret double %11006}1007 1008define double @log_f64(double %a) nounwind strictfp {1009; RV32IFD-LABEL: log_f64:1010; RV32IFD: # %bb.0:1011; RV32IFD-NEXT: addi sp, sp, -161012; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1013; RV32IFD-NEXT: call log1014; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1015; RV32IFD-NEXT: addi sp, sp, 161016; RV32IFD-NEXT: ret1017;1018; RV64IFD-LABEL: log_f64:1019; RV64IFD: # %bb.0:1020; RV64IFD-NEXT: addi sp, sp, -161021; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1022; RV64IFD-NEXT: call log1023; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1024; RV64IFD-NEXT: addi sp, sp, 161025; RV64IFD-NEXT: ret1026;1027; RV32IZFINXZDINX-LABEL: log_f64:1028; RV32IZFINXZDINX: # %bb.0:1029; RV32IZFINXZDINX-NEXT: addi sp, sp, -161030; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1031; RV32IZFINXZDINX-NEXT: call log1032; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1033; RV32IZFINXZDINX-NEXT: addi sp, sp, 161034; RV32IZFINXZDINX-NEXT: ret1035;1036; RV64IZFINXZDINX-LABEL: log_f64:1037; RV64IZFINXZDINX: # %bb.0:1038; RV64IZFINXZDINX-NEXT: addi sp, sp, -161039; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1040; RV64IZFINXZDINX-NEXT: call log1041; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1042; RV64IZFINXZDINX-NEXT: addi sp, sp, 161043; RV64IZFINXZDINX-NEXT: ret1044;1045; RV32I-LABEL: log_f64:1046; RV32I: # %bb.0:1047; RV32I-NEXT: addi sp, sp, -161048; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1049; RV32I-NEXT: call log1050; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1051; RV32I-NEXT: addi sp, sp, 161052; RV32I-NEXT: ret1053;1054; RV64I-LABEL: log_f64:1055; RV64I: # %bb.0:1056; RV64I-NEXT: addi sp, sp, -161057; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1058; RV64I-NEXT: call log1059; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1060; RV64I-NEXT: addi sp, sp, 161061; RV64I-NEXT: ret1062 %1 = call double @llvm.experimental.constrained.log.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp1063 ret double %11064}1065 1066define double @log10_f64(double %a) nounwind strictfp {1067; RV32IFD-LABEL: log10_f64:1068; RV32IFD: # %bb.0:1069; RV32IFD-NEXT: addi sp, sp, -161070; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1071; RV32IFD-NEXT: call log101072; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1073; RV32IFD-NEXT: addi sp, sp, 161074; RV32IFD-NEXT: ret1075;1076; RV64IFD-LABEL: log10_f64:1077; RV64IFD: # %bb.0:1078; RV64IFD-NEXT: addi sp, sp, -161079; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1080; RV64IFD-NEXT: call log101081; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1082; RV64IFD-NEXT: addi sp, sp, 161083; RV64IFD-NEXT: ret1084;1085; RV32IZFINXZDINX-LABEL: log10_f64:1086; RV32IZFINXZDINX: # %bb.0:1087; RV32IZFINXZDINX-NEXT: addi sp, sp, -161088; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1089; RV32IZFINXZDINX-NEXT: call log101090; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1091; RV32IZFINXZDINX-NEXT: addi sp, sp, 161092; RV32IZFINXZDINX-NEXT: ret1093;1094; RV64IZFINXZDINX-LABEL: log10_f64:1095; RV64IZFINXZDINX: # %bb.0:1096; RV64IZFINXZDINX-NEXT: addi sp, sp, -161097; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1098; RV64IZFINXZDINX-NEXT: call log101099; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1100; RV64IZFINXZDINX-NEXT: addi sp, sp, 161101; RV64IZFINXZDINX-NEXT: ret1102;1103; RV32I-LABEL: log10_f64:1104; RV32I: # %bb.0:1105; RV32I-NEXT: addi sp, sp, -161106; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1107; RV32I-NEXT: call log101108; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1109; RV32I-NEXT: addi sp, sp, 161110; RV32I-NEXT: ret1111;1112; RV64I-LABEL: log10_f64:1113; RV64I: # %bb.0:1114; RV64I-NEXT: addi sp, sp, -161115; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1116; RV64I-NEXT: call log101117; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1118; RV64I-NEXT: addi sp, sp, 161119; RV64I-NEXT: ret1120 %1 = call double @llvm.experimental.constrained.log10.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp1121 ret double %11122}1123 1124define double @log2_f64(double %a) nounwind strictfp {1125; RV32IFD-LABEL: log2_f64:1126; RV32IFD: # %bb.0:1127; RV32IFD-NEXT: addi sp, sp, -161128; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1129; RV32IFD-NEXT: call log21130; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1131; RV32IFD-NEXT: addi sp, sp, 161132; RV32IFD-NEXT: ret1133;1134; RV64IFD-LABEL: log2_f64:1135; RV64IFD: # %bb.0:1136; RV64IFD-NEXT: addi sp, sp, -161137; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1138; RV64IFD-NEXT: call log21139; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1140; RV64IFD-NEXT: addi sp, sp, 161141; RV64IFD-NEXT: ret1142;1143; RV32IZFINXZDINX-LABEL: log2_f64:1144; RV32IZFINXZDINX: # %bb.0:1145; RV32IZFINXZDINX-NEXT: addi sp, sp, -161146; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1147; RV32IZFINXZDINX-NEXT: call log21148; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1149; RV32IZFINXZDINX-NEXT: addi sp, sp, 161150; RV32IZFINXZDINX-NEXT: ret1151;1152; RV64IZFINXZDINX-LABEL: log2_f64:1153; RV64IZFINXZDINX: # %bb.0:1154; RV64IZFINXZDINX-NEXT: addi sp, sp, -161155; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1156; RV64IZFINXZDINX-NEXT: call log21157; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1158; RV64IZFINXZDINX-NEXT: addi sp, sp, 161159; RV64IZFINXZDINX-NEXT: ret1160;1161; RV32I-LABEL: log2_f64:1162; RV32I: # %bb.0:1163; RV32I-NEXT: addi sp, sp, -161164; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1165; RV32I-NEXT: call log21166; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1167; RV32I-NEXT: addi sp, sp, 161168; RV32I-NEXT: ret1169;1170; RV64I-LABEL: log2_f64:1171; RV64I: # %bb.0:1172; RV64I-NEXT: addi sp, sp, -161173; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1174; RV64I-NEXT: call log21175; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1176; RV64I-NEXT: addi sp, sp, 161177; RV64I-NEXT: ret1178 %1 = call double @llvm.experimental.constrained.log2.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp1179 ret double %11180}1181 1182define double @fma_f64(double %a, double %b, double %c) nounwind strictfp {1183; CHECKIFD-LABEL: fma_f64:1184; CHECKIFD: # %bb.0:1185; CHECKIFD-NEXT: fmadd.d fa0, fa0, fa1, fa21186; CHECKIFD-NEXT: ret1187;1188; RV32IZFINXZDINX-LABEL: fma_f64:1189; RV32IZFINXZDINX: # %bb.0:1190; RV32IZFINXZDINX-NEXT: fmadd.d a0, a0, a2, a41191; RV32IZFINXZDINX-NEXT: ret1192;1193; RV64IZFINXZDINX-LABEL: fma_f64:1194; RV64IZFINXZDINX: # %bb.0:1195; RV64IZFINXZDINX-NEXT: fmadd.d a0, a0, a1, a21196; RV64IZFINXZDINX-NEXT: ret1197;1198; RV32I-LABEL: fma_f64:1199; RV32I: # %bb.0:1200; RV32I-NEXT: addi sp, sp, -161201; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1202; RV32I-NEXT: call fma1203; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1204; RV32I-NEXT: addi sp, sp, 161205; RV32I-NEXT: ret1206;1207; RV64I-LABEL: fma_f64:1208; RV64I: # %bb.0:1209; RV64I-NEXT: addi sp, sp, -161210; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1211; RV64I-NEXT: call fma1212; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1213; RV64I-NEXT: addi sp, sp, 161214; RV64I-NEXT: ret1215 %1 = call double @llvm.experimental.constrained.fma.f64(double %a, double %b, double %c, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp1216 ret double %11217}1218 1219define double @fmuladd_f64(double %a, double %b, double %c) nounwind strictfp {1220; CHECKIFD-LABEL: fmuladd_f64:1221; CHECKIFD: # %bb.0:1222; CHECKIFD-NEXT: fmadd.d fa0, fa0, fa1, fa21223; CHECKIFD-NEXT: ret1224;1225; RV32IZFINXZDINX-LABEL: fmuladd_f64:1226; RV32IZFINXZDINX: # %bb.0:1227; RV32IZFINXZDINX-NEXT: fmadd.d a0, a0, a2, a41228; RV32IZFINXZDINX-NEXT: ret1229;1230; RV64IZFINXZDINX-LABEL: fmuladd_f64:1231; RV64IZFINXZDINX: # %bb.0:1232; RV64IZFINXZDINX-NEXT: fmadd.d a0, a0, a1, a21233; RV64IZFINXZDINX-NEXT: ret1234;1235; RV32I-LABEL: fmuladd_f64:1236; RV32I: # %bb.0:1237; RV32I-NEXT: addi sp, sp, -161238; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1239; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1240; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill1241; RV32I-NEXT: mv s0, a51242; RV32I-NEXT: mv s1, a41243; RV32I-NEXT: call __muldf31244; RV32I-NEXT: mv a2, s11245; RV32I-NEXT: mv a3, s01246; RV32I-NEXT: call __adddf31247; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1248; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1249; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload1250; RV32I-NEXT: addi sp, sp, 161251; RV32I-NEXT: ret1252;1253; RV64I-LABEL: fmuladd_f64:1254; RV64I: # %bb.0:1255; RV64I-NEXT: addi sp, sp, -161256; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1257; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill1258; RV64I-NEXT: mv s0, a21259; RV64I-NEXT: call __muldf31260; RV64I-NEXT: mv a1, s01261; RV64I-NEXT: call __adddf31262; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1263; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload1264; RV64I-NEXT: addi sp, sp, 161265; RV64I-NEXT: ret1266 %1 = call double @llvm.experimental.constrained.fmuladd.f64(double %a, double %b, double %c, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp1267 ret double %11268}1269 1270define double @minnum_f64(double %a, double %b) nounwind strictfp {1271; RV32IFD-LABEL: minnum_f64:1272; RV32IFD: # %bb.0:1273; RV32IFD-NEXT: addi sp, sp, -161274; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1275; RV32IFD-NEXT: call fmin1276; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1277; RV32IFD-NEXT: addi sp, sp, 161278; RV32IFD-NEXT: ret1279;1280; RV64IFD-LABEL: minnum_f64:1281; RV64IFD: # %bb.0:1282; RV64IFD-NEXT: addi sp, sp, -161283; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1284; RV64IFD-NEXT: call fmin1285; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1286; RV64IFD-NEXT: addi sp, sp, 161287; RV64IFD-NEXT: ret1288;1289; RV32IZFINXZDINX-LABEL: minnum_f64:1290; RV32IZFINXZDINX: # %bb.0:1291; RV32IZFINXZDINX-NEXT: addi sp, sp, -161292; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1293; RV32IZFINXZDINX-NEXT: call fmin1294; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1295; RV32IZFINXZDINX-NEXT: addi sp, sp, 161296; RV32IZFINXZDINX-NEXT: ret1297;1298; RV64IZFINXZDINX-LABEL: minnum_f64:1299; RV64IZFINXZDINX: # %bb.0:1300; RV64IZFINXZDINX-NEXT: addi sp, sp, -161301; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1302; RV64IZFINXZDINX-NEXT: call fmin1303; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1304; RV64IZFINXZDINX-NEXT: addi sp, sp, 161305; RV64IZFINXZDINX-NEXT: ret1306;1307; RV32I-LABEL: minnum_f64:1308; RV32I: # %bb.0:1309; RV32I-NEXT: addi sp, sp, -161310; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1311; RV32I-NEXT: call fmin1312; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1313; RV32I-NEXT: addi sp, sp, 161314; RV32I-NEXT: ret1315;1316; RV64I-LABEL: minnum_f64:1317; RV64I: # %bb.0:1318; RV64I-NEXT: addi sp, sp, -161319; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1320; RV64I-NEXT: call fmin1321; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1322; RV64I-NEXT: addi sp, sp, 161323; RV64I-NEXT: ret1324 %1 = call double @llvm.experimental.constrained.minnum.f64(double %a, double %b, metadata !"fpexcept.strict") strictfp1325 ret double %11326}1327 1328define double @maxnum_f64(double %a, double %b) nounwind strictfp {1329; RV32IFD-LABEL: maxnum_f64:1330; RV32IFD: # %bb.0:1331; RV32IFD-NEXT: addi sp, sp, -161332; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1333; RV32IFD-NEXT: call fmax1334; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1335; RV32IFD-NEXT: addi sp, sp, 161336; RV32IFD-NEXT: ret1337;1338; RV64IFD-LABEL: maxnum_f64:1339; RV64IFD: # %bb.0:1340; RV64IFD-NEXT: addi sp, sp, -161341; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1342; RV64IFD-NEXT: call fmax1343; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1344; RV64IFD-NEXT: addi sp, sp, 161345; RV64IFD-NEXT: ret1346;1347; RV32IZFINXZDINX-LABEL: maxnum_f64:1348; RV32IZFINXZDINX: # %bb.0:1349; RV32IZFINXZDINX-NEXT: addi sp, sp, -161350; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1351; RV32IZFINXZDINX-NEXT: call fmax1352; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1353; RV32IZFINXZDINX-NEXT: addi sp, sp, 161354; RV32IZFINXZDINX-NEXT: ret1355;1356; RV64IZFINXZDINX-LABEL: maxnum_f64:1357; RV64IZFINXZDINX: # %bb.0:1358; RV64IZFINXZDINX-NEXT: addi sp, sp, -161359; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1360; RV64IZFINXZDINX-NEXT: call fmax1361; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1362; RV64IZFINXZDINX-NEXT: addi sp, sp, 161363; RV64IZFINXZDINX-NEXT: ret1364;1365; RV32I-LABEL: maxnum_f64:1366; RV32I: # %bb.0:1367; RV32I-NEXT: addi sp, sp, -161368; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1369; RV32I-NEXT: call fmax1370; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1371; RV32I-NEXT: addi sp, sp, 161372; RV32I-NEXT: ret1373;1374; RV64I-LABEL: maxnum_f64:1375; RV64I: # %bb.0:1376; RV64I-NEXT: addi sp, sp, -161377; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1378; RV64I-NEXT: call fmax1379; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1380; RV64I-NEXT: addi sp, sp, 161381; RV64I-NEXT: ret1382 %1 = call double @llvm.experimental.constrained.maxnum.f64(double %a, double %b, metadata !"fpexcept.strict") strictfp1383 ret double %11384}1385 1386; TODO: FMINNAN and FMAXNAN aren't handled in1387; SelectionDAGLegalize::ExpandNode.1388 1389; declare double @llvm.experimental.constrained.minimum.f64(double, double, metadata)1390 1391; define double @fminimum_f64(double %a, double %b) nounwind strictfp {1392; %1 = call double @llvm.experimental.constrained.minimum.f64(double %a, double %b, metadata !"fpexcept.strict") strictfp1393; ret double %11394; }1395 1396; declare double @llvm.experimental.constrained.maximum.f64(double, double, metadata)1397 1398; define double @fmaximum_f64(double %a, double %b) nounwind strictfp {1399; %1 = call double @llvm.experimental.constrained.maximum.f64(double %a, double %b, metadata !"fpexcept.strict") strictfp1400; ret double %11401; }1402 1403define double @floor_f64(double %a) nounwind strictfp {1404; RV32IFD-LABEL: floor_f64:1405; RV32IFD: # %bb.0:1406; RV32IFD-NEXT: addi sp, sp, -161407; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1408; RV32IFD-NEXT: call floor1409; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1410; RV32IFD-NEXT: addi sp, sp, 161411; RV32IFD-NEXT: ret1412;1413; RV64IFD-LABEL: floor_f64:1414; RV64IFD: # %bb.0:1415; RV64IFD-NEXT: addi sp, sp, -161416; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1417; RV64IFD-NEXT: call floor1418; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1419; RV64IFD-NEXT: addi sp, sp, 161420; RV64IFD-NEXT: ret1421;1422; RV32IZFINXZDINX-LABEL: floor_f64:1423; RV32IZFINXZDINX: # %bb.0:1424; RV32IZFINXZDINX-NEXT: addi sp, sp, -161425; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1426; RV32IZFINXZDINX-NEXT: call floor1427; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1428; RV32IZFINXZDINX-NEXT: addi sp, sp, 161429; RV32IZFINXZDINX-NEXT: ret1430;1431; RV64IZFINXZDINX-LABEL: floor_f64:1432; RV64IZFINXZDINX: # %bb.0:1433; RV64IZFINXZDINX-NEXT: addi sp, sp, -161434; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1435; RV64IZFINXZDINX-NEXT: call floor1436; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1437; RV64IZFINXZDINX-NEXT: addi sp, sp, 161438; RV64IZFINXZDINX-NEXT: ret1439;1440; RV32I-LABEL: floor_f64:1441; RV32I: # %bb.0:1442; RV32I-NEXT: addi sp, sp, -161443; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1444; RV32I-NEXT: call floor1445; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1446; RV32I-NEXT: addi sp, sp, 161447; RV32I-NEXT: ret1448;1449; RV64I-LABEL: floor_f64:1450; RV64I: # %bb.0:1451; RV64I-NEXT: addi sp, sp, -161452; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1453; RV64I-NEXT: call floor1454; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1455; RV64I-NEXT: addi sp, sp, 161456; RV64I-NEXT: ret1457 %1 = call double @llvm.experimental.constrained.floor.f64(double %a, metadata !"fpexcept.strict") strictfp1458 ret double %11459}1460 1461define double @ceil_f64(double %a) nounwind strictfp {1462; RV32IFD-LABEL: ceil_f64:1463; RV32IFD: # %bb.0:1464; RV32IFD-NEXT: addi sp, sp, -161465; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1466; RV32IFD-NEXT: call ceil1467; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1468; RV32IFD-NEXT: addi sp, sp, 161469; RV32IFD-NEXT: ret1470;1471; RV64IFD-LABEL: ceil_f64:1472; RV64IFD: # %bb.0:1473; RV64IFD-NEXT: addi sp, sp, -161474; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1475; RV64IFD-NEXT: call ceil1476; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1477; RV64IFD-NEXT: addi sp, sp, 161478; RV64IFD-NEXT: ret1479;1480; RV32IZFINXZDINX-LABEL: ceil_f64:1481; RV32IZFINXZDINX: # %bb.0:1482; RV32IZFINXZDINX-NEXT: addi sp, sp, -161483; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1484; RV32IZFINXZDINX-NEXT: call ceil1485; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1486; RV32IZFINXZDINX-NEXT: addi sp, sp, 161487; RV32IZFINXZDINX-NEXT: ret1488;1489; RV64IZFINXZDINX-LABEL: ceil_f64:1490; RV64IZFINXZDINX: # %bb.0:1491; RV64IZFINXZDINX-NEXT: addi sp, sp, -161492; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1493; RV64IZFINXZDINX-NEXT: call ceil1494; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1495; RV64IZFINXZDINX-NEXT: addi sp, sp, 161496; RV64IZFINXZDINX-NEXT: ret1497;1498; RV32I-LABEL: ceil_f64:1499; RV32I: # %bb.0:1500; RV32I-NEXT: addi sp, sp, -161501; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1502; RV32I-NEXT: call ceil1503; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1504; RV32I-NEXT: addi sp, sp, 161505; RV32I-NEXT: ret1506;1507; RV64I-LABEL: ceil_f64:1508; RV64I: # %bb.0:1509; RV64I-NEXT: addi sp, sp, -161510; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1511; RV64I-NEXT: call ceil1512; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1513; RV64I-NEXT: addi sp, sp, 161514; RV64I-NEXT: ret1515 %1 = call double @llvm.experimental.constrained.ceil.f64(double %a, metadata !"fpexcept.strict") strictfp1516 ret double %11517}1518 1519define double @trunc_f64(double %a) nounwind strictfp {1520; RV32IFD-LABEL: trunc_f64:1521; RV32IFD: # %bb.0:1522; RV32IFD-NEXT: addi sp, sp, -161523; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1524; RV32IFD-NEXT: call trunc1525; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1526; RV32IFD-NEXT: addi sp, sp, 161527; RV32IFD-NEXT: ret1528;1529; RV64IFD-LABEL: trunc_f64:1530; RV64IFD: # %bb.0:1531; RV64IFD-NEXT: addi sp, sp, -161532; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1533; RV64IFD-NEXT: call trunc1534; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1535; RV64IFD-NEXT: addi sp, sp, 161536; RV64IFD-NEXT: ret1537;1538; RV32IZFINXZDINX-LABEL: trunc_f64:1539; RV32IZFINXZDINX: # %bb.0:1540; RV32IZFINXZDINX-NEXT: addi sp, sp, -161541; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1542; RV32IZFINXZDINX-NEXT: call trunc1543; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1544; RV32IZFINXZDINX-NEXT: addi sp, sp, 161545; RV32IZFINXZDINX-NEXT: ret1546;1547; RV64IZFINXZDINX-LABEL: trunc_f64:1548; RV64IZFINXZDINX: # %bb.0:1549; RV64IZFINXZDINX-NEXT: addi sp, sp, -161550; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1551; RV64IZFINXZDINX-NEXT: call trunc1552; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1553; RV64IZFINXZDINX-NEXT: addi sp, sp, 161554; RV64IZFINXZDINX-NEXT: ret1555;1556; RV32I-LABEL: trunc_f64:1557; RV32I: # %bb.0:1558; RV32I-NEXT: addi sp, sp, -161559; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1560; RV32I-NEXT: call trunc1561; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1562; RV32I-NEXT: addi sp, sp, 161563; RV32I-NEXT: ret1564;1565; RV64I-LABEL: trunc_f64:1566; RV64I: # %bb.0:1567; RV64I-NEXT: addi sp, sp, -161568; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1569; RV64I-NEXT: call trunc1570; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1571; RV64I-NEXT: addi sp, sp, 161572; RV64I-NEXT: ret1573 %1 = call double @llvm.experimental.constrained.trunc.f64(double %a, metadata !"fpexcept.strict") strictfp1574 ret double %11575}1576 1577define double @rint_f64(double %a) nounwind strictfp {1578; RV32IFD-LABEL: rint_f64:1579; RV32IFD: # %bb.0:1580; RV32IFD-NEXT: addi sp, sp, -161581; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1582; RV32IFD-NEXT: call rint1583; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1584; RV32IFD-NEXT: addi sp, sp, 161585; RV32IFD-NEXT: ret1586;1587; RV64IFD-LABEL: rint_f64:1588; RV64IFD: # %bb.0:1589; RV64IFD-NEXT: addi sp, sp, -161590; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1591; RV64IFD-NEXT: call rint1592; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1593; RV64IFD-NEXT: addi sp, sp, 161594; RV64IFD-NEXT: ret1595;1596; RV32IZFINXZDINX-LABEL: rint_f64:1597; RV32IZFINXZDINX: # %bb.0:1598; RV32IZFINXZDINX-NEXT: addi sp, sp, -161599; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1600; RV32IZFINXZDINX-NEXT: call rint1601; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1602; RV32IZFINXZDINX-NEXT: addi sp, sp, 161603; RV32IZFINXZDINX-NEXT: ret1604;1605; RV64IZFINXZDINX-LABEL: rint_f64:1606; RV64IZFINXZDINX: # %bb.0:1607; RV64IZFINXZDINX-NEXT: addi sp, sp, -161608; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1609; RV64IZFINXZDINX-NEXT: call rint1610; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1611; RV64IZFINXZDINX-NEXT: addi sp, sp, 161612; RV64IZFINXZDINX-NEXT: ret1613;1614; RV32I-LABEL: rint_f64:1615; RV32I: # %bb.0:1616; RV32I-NEXT: addi sp, sp, -161617; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1618; RV32I-NEXT: call rint1619; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1620; RV32I-NEXT: addi sp, sp, 161621; RV32I-NEXT: ret1622;1623; RV64I-LABEL: rint_f64:1624; RV64I: # %bb.0:1625; RV64I-NEXT: addi sp, sp, -161626; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1627; RV64I-NEXT: call rint1628; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1629; RV64I-NEXT: addi sp, sp, 161630; RV64I-NEXT: ret1631 %1 = call double @llvm.experimental.constrained.rint.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp1632 ret double %11633}1634 1635define double @nearbyint_f64(double %a) nounwind strictfp {1636; RV32IFD-LABEL: nearbyint_f64:1637; RV32IFD: # %bb.0:1638; RV32IFD-NEXT: addi sp, sp, -161639; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1640; RV32IFD-NEXT: call nearbyint1641; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1642; RV32IFD-NEXT: addi sp, sp, 161643; RV32IFD-NEXT: ret1644;1645; RV64IFD-LABEL: nearbyint_f64:1646; RV64IFD: # %bb.0:1647; RV64IFD-NEXT: addi sp, sp, -161648; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1649; RV64IFD-NEXT: call nearbyint1650; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1651; RV64IFD-NEXT: addi sp, sp, 161652; RV64IFD-NEXT: ret1653;1654; RV32IZFINXZDINX-LABEL: nearbyint_f64:1655; RV32IZFINXZDINX: # %bb.0:1656; RV32IZFINXZDINX-NEXT: addi sp, sp, -161657; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1658; RV32IZFINXZDINX-NEXT: call nearbyint1659; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1660; RV32IZFINXZDINX-NEXT: addi sp, sp, 161661; RV32IZFINXZDINX-NEXT: ret1662;1663; RV64IZFINXZDINX-LABEL: nearbyint_f64:1664; RV64IZFINXZDINX: # %bb.0:1665; RV64IZFINXZDINX-NEXT: addi sp, sp, -161666; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1667; RV64IZFINXZDINX-NEXT: call nearbyint1668; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1669; RV64IZFINXZDINX-NEXT: addi sp, sp, 161670; RV64IZFINXZDINX-NEXT: ret1671;1672; RV32I-LABEL: nearbyint_f64:1673; RV32I: # %bb.0:1674; RV32I-NEXT: addi sp, sp, -161675; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1676; RV32I-NEXT: call nearbyint1677; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1678; RV32I-NEXT: addi sp, sp, 161679; RV32I-NEXT: ret1680;1681; RV64I-LABEL: nearbyint_f64:1682; RV64I: # %bb.0:1683; RV64I-NEXT: addi sp, sp, -161684; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1685; RV64I-NEXT: call nearbyint1686; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1687; RV64I-NEXT: addi sp, sp, 161688; RV64I-NEXT: ret1689 %1 = call double @llvm.experimental.constrained.nearbyint.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp1690 ret double %11691}1692 1693define double @round_f64(double %a) nounwind strictfp {1694; RV32IFD-LABEL: round_f64:1695; RV32IFD: # %bb.0:1696; RV32IFD-NEXT: addi sp, sp, -161697; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1698; RV32IFD-NEXT: call round1699; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1700; RV32IFD-NEXT: addi sp, sp, 161701; RV32IFD-NEXT: ret1702;1703; RV64IFD-LABEL: round_f64:1704; RV64IFD: # %bb.0:1705; RV64IFD-NEXT: addi sp, sp, -161706; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1707; RV64IFD-NEXT: call round1708; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1709; RV64IFD-NEXT: addi sp, sp, 161710; RV64IFD-NEXT: ret1711;1712; RV32IZFINXZDINX-LABEL: round_f64:1713; RV32IZFINXZDINX: # %bb.0:1714; RV32IZFINXZDINX-NEXT: addi sp, sp, -161715; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1716; RV32IZFINXZDINX-NEXT: call round1717; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1718; RV32IZFINXZDINX-NEXT: addi sp, sp, 161719; RV32IZFINXZDINX-NEXT: ret1720;1721; RV64IZFINXZDINX-LABEL: round_f64:1722; RV64IZFINXZDINX: # %bb.0:1723; RV64IZFINXZDINX-NEXT: addi sp, sp, -161724; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1725; RV64IZFINXZDINX-NEXT: call round1726; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1727; RV64IZFINXZDINX-NEXT: addi sp, sp, 161728; RV64IZFINXZDINX-NEXT: ret1729;1730; RV32I-LABEL: round_f64:1731; RV32I: # %bb.0:1732; RV32I-NEXT: addi sp, sp, -161733; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1734; RV32I-NEXT: call round1735; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1736; RV32I-NEXT: addi sp, sp, 161737; RV32I-NEXT: ret1738;1739; RV64I-LABEL: round_f64:1740; RV64I: # %bb.0:1741; RV64I-NEXT: addi sp, sp, -161742; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1743; RV64I-NEXT: call round1744; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1745; RV64I-NEXT: addi sp, sp, 161746; RV64I-NEXT: ret1747 %1 = call double @llvm.experimental.constrained.round.f64(double %a, metadata !"fpexcept.strict") strictfp1748 ret double %11749}1750 1751define double @roundeven_f64(double %a) nounwind strictfp {1752; RV32IFD-LABEL: roundeven_f64:1753; RV32IFD: # %bb.0:1754; RV32IFD-NEXT: addi sp, sp, -161755; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1756; RV32IFD-NEXT: call roundeven1757; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1758; RV32IFD-NEXT: addi sp, sp, 161759; RV32IFD-NEXT: ret1760;1761; RV64IFD-LABEL: roundeven_f64:1762; RV64IFD: # %bb.0:1763; RV64IFD-NEXT: addi sp, sp, -161764; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1765; RV64IFD-NEXT: call roundeven1766; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1767; RV64IFD-NEXT: addi sp, sp, 161768; RV64IFD-NEXT: ret1769;1770; RV32IZFINXZDINX-LABEL: roundeven_f64:1771; RV32IZFINXZDINX: # %bb.0:1772; RV32IZFINXZDINX-NEXT: addi sp, sp, -161773; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1774; RV32IZFINXZDINX-NEXT: call roundeven1775; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1776; RV32IZFINXZDINX-NEXT: addi sp, sp, 161777; RV32IZFINXZDINX-NEXT: ret1778;1779; RV64IZFINXZDINX-LABEL: roundeven_f64:1780; RV64IZFINXZDINX: # %bb.0:1781; RV64IZFINXZDINX-NEXT: addi sp, sp, -161782; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1783; RV64IZFINXZDINX-NEXT: call roundeven1784; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1785; RV64IZFINXZDINX-NEXT: addi sp, sp, 161786; RV64IZFINXZDINX-NEXT: ret1787;1788; RV32I-LABEL: roundeven_f64:1789; RV32I: # %bb.0:1790; RV32I-NEXT: addi sp, sp, -161791; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1792; RV32I-NEXT: call roundeven1793; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1794; RV32I-NEXT: addi sp, sp, 161795; RV32I-NEXT: ret1796;1797; RV64I-LABEL: roundeven_f64:1798; RV64I: # %bb.0:1799; RV64I-NEXT: addi sp, sp, -161800; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1801; RV64I-NEXT: call roundeven1802; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1803; RV64I-NEXT: addi sp, sp, 161804; RV64I-NEXT: ret1805 %1 = call double @llvm.experimental.constrained.roundeven.f64(double %a, metadata !"fpexcept.strict") strictfp1806 ret double %11807}1808 1809define iXLen @lrint_f64(double %a) nounwind strictfp {1810; RV32IFD-LABEL: lrint_f64:1811; RV32IFD: # %bb.0:1812; RV32IFD-NEXT: fcvt.w.d a0, fa01813; RV32IFD-NEXT: ret1814;1815; RV64IFD-LABEL: lrint_f64:1816; RV64IFD: # %bb.0:1817; RV64IFD-NEXT: fcvt.l.d a0, fa01818; RV64IFD-NEXT: ret1819;1820; RV32IZFINXZDINX-LABEL: lrint_f64:1821; RV32IZFINXZDINX: # %bb.0:1822; RV32IZFINXZDINX-NEXT: fcvt.w.d a0, a01823; RV32IZFINXZDINX-NEXT: ret1824;1825; RV64IZFINXZDINX-LABEL: lrint_f64:1826; RV64IZFINXZDINX: # %bb.0:1827; RV64IZFINXZDINX-NEXT: fcvt.l.d a0, a01828; RV64IZFINXZDINX-NEXT: ret1829;1830; RV32I-LABEL: lrint_f64:1831; RV32I: # %bb.0:1832; RV32I-NEXT: addi sp, sp, -161833; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1834; RV32I-NEXT: call lrint1835; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1836; RV32I-NEXT: addi sp, sp, 161837; RV32I-NEXT: ret1838;1839; RV64I-LABEL: lrint_f64:1840; RV64I: # %bb.0:1841; RV64I-NEXT: addi sp, sp, -161842; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1843; RV64I-NEXT: call lrint1844; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1845; RV64I-NEXT: addi sp, sp, 161846; RV64I-NEXT: ret1847 %1 = call iXLen @llvm.experimental.constrained.lrint.iXLen.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp1848 ret iXLen %11849}1850 1851define iXLen @lround_f64(double %a) nounwind strictfp {1852; RV32IFD-LABEL: lround_f64:1853; RV32IFD: # %bb.0:1854; RV32IFD-NEXT: fcvt.w.d a0, fa0, rmm1855; RV32IFD-NEXT: ret1856;1857; RV64IFD-LABEL: lround_f64:1858; RV64IFD: # %bb.0:1859; RV64IFD-NEXT: fcvt.l.d a0, fa0, rmm1860; RV64IFD-NEXT: ret1861;1862; RV32IZFINXZDINX-LABEL: lround_f64:1863; RV32IZFINXZDINX: # %bb.0:1864; RV32IZFINXZDINX-NEXT: fcvt.w.d a0, a0, rmm1865; RV32IZFINXZDINX-NEXT: ret1866;1867; RV64IZFINXZDINX-LABEL: lround_f64:1868; RV64IZFINXZDINX: # %bb.0:1869; RV64IZFINXZDINX-NEXT: fcvt.l.d a0, a0, rmm1870; RV64IZFINXZDINX-NEXT: ret1871;1872; RV32I-LABEL: lround_f64:1873; RV32I: # %bb.0:1874; RV32I-NEXT: addi sp, sp, -161875; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1876; RV32I-NEXT: call lround1877; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1878; RV32I-NEXT: addi sp, sp, 161879; RV32I-NEXT: ret1880;1881; RV64I-LABEL: lround_f64:1882; RV64I: # %bb.0:1883; RV64I-NEXT: addi sp, sp, -161884; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1885; RV64I-NEXT: call lround1886; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1887; RV64I-NEXT: addi sp, sp, 161888; RV64I-NEXT: ret1889 %1 = call iXLen @llvm.experimental.constrained.lround.iXLen.f64(double %a, metadata !"fpexcept.strict") strictfp1890 ret iXLen %11891}1892 1893define i64 @llrint_f64(double %a) nounwind strictfp {1894; RV32IFD-LABEL: llrint_f64:1895; RV32IFD: # %bb.0:1896; RV32IFD-NEXT: addi sp, sp, -161897; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1898; RV32IFD-NEXT: call llrint1899; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1900; RV32IFD-NEXT: addi sp, sp, 161901; RV32IFD-NEXT: ret1902;1903; RV64IFD-LABEL: llrint_f64:1904; RV64IFD: # %bb.0:1905; RV64IFD-NEXT: fcvt.l.d a0, fa01906; RV64IFD-NEXT: ret1907;1908; RV32IZFINXZDINX-LABEL: llrint_f64:1909; RV32IZFINXZDINX: # %bb.0:1910; RV32IZFINXZDINX-NEXT: addi sp, sp, -161911; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1912; RV32IZFINXZDINX-NEXT: call llrint1913; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1914; RV32IZFINXZDINX-NEXT: addi sp, sp, 161915; RV32IZFINXZDINX-NEXT: ret1916;1917; RV64IZFINXZDINX-LABEL: llrint_f64:1918; RV64IZFINXZDINX: # %bb.0:1919; RV64IZFINXZDINX-NEXT: fcvt.l.d a0, a01920; RV64IZFINXZDINX-NEXT: ret1921;1922; RV32I-LABEL: llrint_f64:1923; RV32I: # %bb.0:1924; RV32I-NEXT: addi sp, sp, -161925; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1926; RV32I-NEXT: call llrint1927; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1928; RV32I-NEXT: addi sp, sp, 161929; RV32I-NEXT: ret1930;1931; RV64I-LABEL: llrint_f64:1932; RV64I: # %bb.0:1933; RV64I-NEXT: addi sp, sp, -161934; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1935; RV64I-NEXT: call llrint1936; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1937; RV64I-NEXT: addi sp, sp, 161938; RV64I-NEXT: ret1939 %1 = call i64 @llvm.experimental.constrained.llrint.i64.f64(double %a, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp1940 ret i64 %11941}1942 1943define i64 @llround_f64(double %a) nounwind strictfp {1944; RV32IFD-LABEL: llround_f64:1945; RV32IFD: # %bb.0:1946; RV32IFD-NEXT: addi sp, sp, -161947; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1948; RV32IFD-NEXT: call llround1949; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1950; RV32IFD-NEXT: addi sp, sp, 161951; RV32IFD-NEXT: ret1952;1953; RV64IFD-LABEL: llround_f64:1954; RV64IFD: # %bb.0:1955; RV64IFD-NEXT: fcvt.l.d a0, fa0, rmm1956; RV64IFD-NEXT: ret1957;1958; RV32IZFINXZDINX-LABEL: llround_f64:1959; RV32IZFINXZDINX: # %bb.0:1960; RV32IZFINXZDINX-NEXT: addi sp, sp, -161961; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1962; RV32IZFINXZDINX-NEXT: call llround1963; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1964; RV32IZFINXZDINX-NEXT: addi sp, sp, 161965; RV32IZFINXZDINX-NEXT: ret1966;1967; RV64IZFINXZDINX-LABEL: llround_f64:1968; RV64IZFINXZDINX: # %bb.0:1969; RV64IZFINXZDINX-NEXT: fcvt.l.d a0, a0, rmm1970; RV64IZFINXZDINX-NEXT: ret1971;1972; RV32I-LABEL: llround_f64:1973; RV32I: # %bb.0:1974; RV32I-NEXT: addi sp, sp, -161975; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1976; RV32I-NEXT: call llround1977; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1978; RV32I-NEXT: addi sp, sp, 161979; RV32I-NEXT: ret1980;1981; RV64I-LABEL: llround_f64:1982; RV64I: # %bb.0:1983; RV64I-NEXT: addi sp, sp, -161984; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1985; RV64I-NEXT: call llround1986; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1987; RV64I-NEXT: addi sp, sp, 161988; RV64I-NEXT: ret1989 %1 = call i64 @llvm.experimental.constrained.llround.i64.f64(double %a, metadata !"fpexcept.strict") strictfp1990 ret i64 %11991}1992 1993define double @ldexp_f64(double %x, i32 signext %y) nounwind {1994; RV32IFD-LABEL: ldexp_f64:1995; RV32IFD: # %bb.0:1996; RV32IFD-NEXT: addi sp, sp, -161997; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1998; RV32IFD-NEXT: call ldexp1999; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2000; RV32IFD-NEXT: addi sp, sp, 162001; RV32IFD-NEXT: ret2002;2003; RV64IFD-LABEL: ldexp_f64:2004; RV64IFD: # %bb.0:2005; RV64IFD-NEXT: addi sp, sp, -162006; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2007; RV64IFD-NEXT: call ldexp2008; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2009; RV64IFD-NEXT: addi sp, sp, 162010; RV64IFD-NEXT: ret2011;2012; RV32IZFINXZDINX-LABEL: ldexp_f64:2013; RV32IZFINXZDINX: # %bb.0:2014; RV32IZFINXZDINX-NEXT: addi sp, sp, -162015; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2016; RV32IZFINXZDINX-NEXT: call ldexp2017; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2018; RV32IZFINXZDINX-NEXT: addi sp, sp, 162019; RV32IZFINXZDINX-NEXT: ret2020;2021; RV64IZFINXZDINX-LABEL: ldexp_f64:2022; RV64IZFINXZDINX: # %bb.0:2023; RV64IZFINXZDINX-NEXT: addi sp, sp, -162024; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2025; RV64IZFINXZDINX-NEXT: call ldexp2026; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2027; RV64IZFINXZDINX-NEXT: addi sp, sp, 162028; RV64IZFINXZDINX-NEXT: ret2029;2030; RV32I-LABEL: ldexp_f64:2031; RV32I: # %bb.0:2032; RV32I-NEXT: addi sp, sp, -162033; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2034; RV32I-NEXT: call ldexp2035; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2036; RV32I-NEXT: addi sp, sp, 162037; RV32I-NEXT: ret2038;2039; RV64I-LABEL: ldexp_f64:2040; RV64I: # %bb.0:2041; RV64I-NEXT: addi sp, sp, -162042; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2043; RV64I-NEXT: call ldexp2044; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2045; RV64I-NEXT: addi sp, sp, 162046; RV64I-NEXT: ret2047 %z = call double @llvm.experimental.constrained.ldexp.f64.i32(double %x, i32 %y, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp2048 ret double %z2049}2050