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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+d \3; RUN: -verify-machineinstrs -target-abi=ilp32d \4; RUN: | FileCheck -check-prefixes=CHECKIFD,RV32IFD %s5; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+d \6; RUN: -verify-machineinstrs -target-abi=lp64d \7; RUN: | FileCheck -check-prefixes=CHECKIFD,RV64IFD %s8; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+zdinx \9; RUN: -verify-machineinstrs -target-abi=ilp32 \10; RUN: | FileCheck -check-prefix=RV32IZFINXZDINX %s11; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+zdinx \12; RUN: -verify-machineinstrs -target-abi=lp64 \13; RUN: | FileCheck -check-prefix=RV64IZFINXZDINX %s14; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 \15; RUN: -verify-machineinstrs | FileCheck -check-prefix=RV32I %s16; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 \17; RUN: -verify-machineinstrs | FileCheck -check-prefix=RV64I %s18 19define double @sqrt_f64(double %a) nounwind {20; CHECKIFD-LABEL: sqrt_f64:21; CHECKIFD: # %bb.0:22; CHECKIFD-NEXT: fsqrt.d fa0, fa023; CHECKIFD-NEXT: ret24;25; RV32IZFINXZDINX-LABEL: sqrt_f64:26; RV32IZFINXZDINX: # %bb.0:27; RV32IZFINXZDINX-NEXT: fsqrt.d a0, a028; RV32IZFINXZDINX-NEXT: ret29;30; RV64IZFINXZDINX-LABEL: sqrt_f64:31; RV64IZFINXZDINX: # %bb.0:32; RV64IZFINXZDINX-NEXT: fsqrt.d a0, a033; RV64IZFINXZDINX-NEXT: ret34;35; RV32I-LABEL: sqrt_f64:36; RV32I: # %bb.0:37; RV32I-NEXT: addi sp, sp, -1638; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill39; RV32I-NEXT: call sqrt40; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload41; RV32I-NEXT: addi sp, sp, 1642; RV32I-NEXT: ret43;44; RV64I-LABEL: sqrt_f64:45; RV64I: # %bb.0:46; RV64I-NEXT: addi sp, sp, -1647; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill48; RV64I-NEXT: call sqrt49; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload50; RV64I-NEXT: addi sp, sp, 1651; RV64I-NEXT: ret52 %1 = call double @llvm.sqrt.f64(double %a)53 ret double %154}55 56define double @powi_f64(double %a, i32 %b) nounwind {57; RV32IFD-LABEL: powi_f64:58; RV32IFD: # %bb.0:59; RV32IFD-NEXT: tail __powidf260;61; RV64IFD-LABEL: powi_f64:62; RV64IFD: # %bb.0:63; RV64IFD-NEXT: addi sp, sp, -1664; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill65; RV64IFD-NEXT: sext.w a0, a066; RV64IFD-NEXT: call __powidf267; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload68; RV64IFD-NEXT: addi sp, sp, 1669; RV64IFD-NEXT: ret70;71; RV32IZFINXZDINX-LABEL: powi_f64:72; RV32IZFINXZDINX: # %bb.0:73; RV32IZFINXZDINX-NEXT: addi sp, sp, -1674; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill75; RV32IZFINXZDINX-NEXT: call __powidf276; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload77; RV32IZFINXZDINX-NEXT: addi sp, sp, 1678; RV32IZFINXZDINX-NEXT: ret79;80; RV64IZFINXZDINX-LABEL: powi_f64:81; RV64IZFINXZDINX: # %bb.0:82; RV64IZFINXZDINX-NEXT: addi sp, sp, -1683; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill84; RV64IZFINXZDINX-NEXT: sext.w a1, a185; RV64IZFINXZDINX-NEXT: call __powidf286; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload87; RV64IZFINXZDINX-NEXT: addi sp, sp, 1688; RV64IZFINXZDINX-NEXT: ret89;90; RV32I-LABEL: powi_f64:91; RV32I: # %bb.0:92; RV32I-NEXT: addi sp, sp, -1693; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill94; RV32I-NEXT: call __powidf295; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload96; RV32I-NEXT: addi sp, sp, 1697; RV32I-NEXT: ret98;99; RV64I-LABEL: powi_f64:100; RV64I: # %bb.0:101; RV64I-NEXT: addi sp, sp, -16102; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill103; RV64I-NEXT: sext.w a1, a1104; RV64I-NEXT: call __powidf2105; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload106; RV64I-NEXT: addi sp, sp, 16107; RV64I-NEXT: ret108 %1 = call double @llvm.powi.f64.i32(double %a, i32 %b)109 ret double %1110}111 112define double @sin_f64(double %a) nounwind {113; CHECKIFD-LABEL: sin_f64:114; CHECKIFD: # %bb.0:115; CHECKIFD-NEXT: tail sin116;117; RV32IZFINXZDINX-LABEL: sin_f64:118; RV32IZFINXZDINX: # %bb.0:119; RV32IZFINXZDINX-NEXT: addi sp, sp, -16120; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill121; RV32IZFINXZDINX-NEXT: call sin122; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload123; RV32IZFINXZDINX-NEXT: addi sp, sp, 16124; RV32IZFINXZDINX-NEXT: ret125;126; RV64IZFINXZDINX-LABEL: sin_f64:127; RV64IZFINXZDINX: # %bb.0:128; RV64IZFINXZDINX-NEXT: tail sin129;130; RV32I-LABEL: sin_f64:131; RV32I: # %bb.0:132; RV32I-NEXT: addi sp, sp, -16133; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill134; RV32I-NEXT: call sin135; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload136; RV32I-NEXT: addi sp, sp, 16137; RV32I-NEXT: ret138;139; RV64I-LABEL: sin_f64:140; RV64I: # %bb.0:141; RV64I-NEXT: addi sp, sp, -16142; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill143; RV64I-NEXT: call sin144; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload145; RV64I-NEXT: addi sp, sp, 16146; RV64I-NEXT: ret147 %1 = call double @llvm.sin.f64(double %a)148 ret double %1149}150 151define double @cos_f64(double %a) nounwind {152; CHECKIFD-LABEL: cos_f64:153; CHECKIFD: # %bb.0:154; CHECKIFD-NEXT: tail cos155;156; RV32IZFINXZDINX-LABEL: cos_f64:157; RV32IZFINXZDINX: # %bb.0:158; RV32IZFINXZDINX-NEXT: addi sp, sp, -16159; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill160; RV32IZFINXZDINX-NEXT: call cos161; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload162; RV32IZFINXZDINX-NEXT: addi sp, sp, 16163; RV32IZFINXZDINX-NEXT: ret164;165; RV64IZFINXZDINX-LABEL: cos_f64:166; RV64IZFINXZDINX: # %bb.0:167; RV64IZFINXZDINX-NEXT: tail cos168;169; RV32I-LABEL: cos_f64:170; RV32I: # %bb.0:171; RV32I-NEXT: addi sp, sp, -16172; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill173; RV32I-NEXT: call cos174; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload175; RV32I-NEXT: addi sp, sp, 16176; RV32I-NEXT: ret177;178; RV64I-LABEL: cos_f64:179; RV64I: # %bb.0:180; RV64I-NEXT: addi sp, sp, -16181; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill182; RV64I-NEXT: call cos183; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload184; RV64I-NEXT: addi sp, sp, 16185; RV64I-NEXT: ret186 %1 = call double @llvm.cos.f64(double %a)187 ret double %1188}189 190; The sin+cos combination results in an FSINCOS SelectionDAG node.191define double @sincos_f64(double %a) nounwind {192; RV32IFD-LABEL: sincos_f64:193; RV32IFD: # %bb.0:194; RV32IFD-NEXT: addi sp, sp, -32195; RV32IFD-NEXT: sw ra, 28(sp) # 4-byte Folded Spill196; RV32IFD-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill197; RV32IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill198; RV32IFD-NEXT: fmv.d fs0, fa0199; RV32IFD-NEXT: call sin200; RV32IFD-NEXT: fmv.d fs1, fa0201; RV32IFD-NEXT: fmv.d fa0, fs0202; RV32IFD-NEXT: call cos203; RV32IFD-NEXT: fadd.d fa0, fs1, fa0204; RV32IFD-NEXT: lw ra, 28(sp) # 4-byte Folded Reload205; RV32IFD-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload206; RV32IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload207; RV32IFD-NEXT: addi sp, sp, 32208; RV32IFD-NEXT: ret209;210; RV64IFD-LABEL: sincos_f64:211; RV64IFD: # %bb.0:212; RV64IFD-NEXT: addi sp, sp, -32213; RV64IFD-NEXT: sd ra, 24(sp) # 8-byte Folded Spill214; RV64IFD-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill215; RV64IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill216; RV64IFD-NEXT: fmv.d fs0, fa0217; RV64IFD-NEXT: call sin218; RV64IFD-NEXT: fmv.d fs1, fa0219; RV64IFD-NEXT: fmv.d fa0, fs0220; RV64IFD-NEXT: call cos221; RV64IFD-NEXT: fadd.d fa0, fs1, fa0222; RV64IFD-NEXT: ld ra, 24(sp) # 8-byte Folded Reload223; RV64IFD-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload224; RV64IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload225; RV64IFD-NEXT: addi sp, sp, 32226; RV64IFD-NEXT: ret227;228; RV32IZFINXZDINX-LABEL: sincos_f64:229; RV32IZFINXZDINX: # %bb.0:230; RV32IZFINXZDINX-NEXT: addi sp, sp, -32231; RV32IZFINXZDINX-NEXT: sw ra, 28(sp) # 4-byte Folded Spill232; RV32IZFINXZDINX-NEXT: sw s0, 24(sp) # 4-byte Folded Spill233; RV32IZFINXZDINX-NEXT: sw s1, 20(sp) # 4-byte Folded Spill234; RV32IZFINXZDINX-NEXT: sw s2, 16(sp) # 4-byte Folded Spill235; RV32IZFINXZDINX-NEXT: sw s3, 12(sp) # 4-byte Folded Spill236; RV32IZFINXZDINX-NEXT: mv s0, a1237; RV32IZFINXZDINX-NEXT: mv s1, a0238; RV32IZFINXZDINX-NEXT: call sin239; RV32IZFINXZDINX-NEXT: mv s2, a0240; RV32IZFINXZDINX-NEXT: mv s3, a1241; RV32IZFINXZDINX-NEXT: mv a0, s1242; RV32IZFINXZDINX-NEXT: mv a1, s0243; RV32IZFINXZDINX-NEXT: call cos244; RV32IZFINXZDINX-NEXT: fadd.d a0, s2, a0245; RV32IZFINXZDINX-NEXT: lw ra, 28(sp) # 4-byte Folded Reload246; RV32IZFINXZDINX-NEXT: lw s0, 24(sp) # 4-byte Folded Reload247; RV32IZFINXZDINX-NEXT: lw s1, 20(sp) # 4-byte Folded Reload248; RV32IZFINXZDINX-NEXT: lw s2, 16(sp) # 4-byte Folded Reload249; RV32IZFINXZDINX-NEXT: lw s3, 12(sp) # 4-byte Folded Reload250; RV32IZFINXZDINX-NEXT: addi sp, sp, 32251; RV32IZFINXZDINX-NEXT: ret252;253; RV64IZFINXZDINX-LABEL: sincos_f64:254; RV64IZFINXZDINX: # %bb.0:255; RV64IZFINXZDINX-NEXT: addi sp, sp, -32256; RV64IZFINXZDINX-NEXT: sd ra, 24(sp) # 8-byte Folded Spill257; RV64IZFINXZDINX-NEXT: sd s0, 16(sp) # 8-byte Folded Spill258; RV64IZFINXZDINX-NEXT: sd s1, 8(sp) # 8-byte Folded Spill259; RV64IZFINXZDINX-NEXT: mv s0, a0260; RV64IZFINXZDINX-NEXT: call sin261; RV64IZFINXZDINX-NEXT: mv s1, a0262; RV64IZFINXZDINX-NEXT: mv a0, s0263; RV64IZFINXZDINX-NEXT: call cos264; RV64IZFINXZDINX-NEXT: fadd.d a0, s1, a0265; RV64IZFINXZDINX-NEXT: ld ra, 24(sp) # 8-byte Folded Reload266; RV64IZFINXZDINX-NEXT: ld s0, 16(sp) # 8-byte Folded Reload267; RV64IZFINXZDINX-NEXT: ld s1, 8(sp) # 8-byte Folded Reload268; RV64IZFINXZDINX-NEXT: addi sp, sp, 32269; RV64IZFINXZDINX-NEXT: ret270;271; RV32I-LABEL: sincos_f64:272; RV32I: # %bb.0:273; RV32I-NEXT: addi sp, sp, -32274; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill275; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill276; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill277; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill278; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill279; RV32I-NEXT: mv s0, a1280; RV32I-NEXT: mv s1, a0281; RV32I-NEXT: call sin282; RV32I-NEXT: mv s2, a0283; RV32I-NEXT: mv s3, a1284; RV32I-NEXT: mv a0, s1285; RV32I-NEXT: mv a1, s0286; RV32I-NEXT: call cos287; RV32I-NEXT: mv a2, a0288; RV32I-NEXT: mv a3, a1289; RV32I-NEXT: mv a0, s2290; RV32I-NEXT: mv a1, s3291; RV32I-NEXT: call __adddf3292; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload293; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload294; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload295; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload296; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload297; RV32I-NEXT: addi sp, sp, 32298; RV32I-NEXT: ret299;300; RV64I-LABEL: sincos_f64:301; RV64I: # %bb.0:302; RV64I-NEXT: addi sp, sp, -32303; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill304; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill305; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill306; RV64I-NEXT: mv s0, a0307; RV64I-NEXT: call sin308; RV64I-NEXT: mv s1, a0309; RV64I-NEXT: mv a0, s0310; RV64I-NEXT: call cos311; RV64I-NEXT: mv a1, a0312; RV64I-NEXT: mv a0, s1313; RV64I-NEXT: call __adddf3314; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload315; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload316; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload317; RV64I-NEXT: addi sp, sp, 32318; RV64I-NEXT: ret319 %1 = call double @llvm.sin.f64(double %a)320 %2 = call double @llvm.cos.f64(double %a)321 %3 = fadd double %1, %2322 ret double %3323}324 325define double @pow_f64(double %a, double %b) nounwind {326; CHECKIFD-LABEL: pow_f64:327; CHECKIFD: # %bb.0:328; CHECKIFD-NEXT: tail pow329;330; RV32IZFINXZDINX-LABEL: pow_f64:331; RV32IZFINXZDINX: # %bb.0:332; RV32IZFINXZDINX-NEXT: addi sp, sp, -16333; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill334; RV32IZFINXZDINX-NEXT: call pow335; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload336; RV32IZFINXZDINX-NEXT: addi sp, sp, 16337; RV32IZFINXZDINX-NEXT: ret338;339; RV64IZFINXZDINX-LABEL: pow_f64:340; RV64IZFINXZDINX: # %bb.0:341; RV64IZFINXZDINX-NEXT: tail pow342;343; RV32I-LABEL: pow_f64:344; RV32I: # %bb.0:345; RV32I-NEXT: addi sp, sp, -16346; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill347; RV32I-NEXT: call pow348; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload349; RV32I-NEXT: addi sp, sp, 16350; RV32I-NEXT: ret351;352; RV64I-LABEL: pow_f64:353; RV64I: # %bb.0:354; RV64I-NEXT: addi sp, sp, -16355; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill356; RV64I-NEXT: call pow357; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload358; RV64I-NEXT: addi sp, sp, 16359; RV64I-NEXT: ret360 %1 = call double @llvm.pow.f64(double %a, double %b)361 ret double %1362}363 364define double @exp_f64(double %a) nounwind {365; CHECKIFD-LABEL: exp_f64:366; CHECKIFD: # %bb.0:367; CHECKIFD-NEXT: tail exp368;369; RV32IZFINXZDINX-LABEL: exp_f64:370; RV32IZFINXZDINX: # %bb.0:371; RV32IZFINXZDINX-NEXT: addi sp, sp, -16372; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill373; RV32IZFINXZDINX-NEXT: call exp374; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload375; RV32IZFINXZDINX-NEXT: addi sp, sp, 16376; RV32IZFINXZDINX-NEXT: ret377;378; RV64IZFINXZDINX-LABEL: exp_f64:379; RV64IZFINXZDINX: # %bb.0:380; RV64IZFINXZDINX-NEXT: tail exp381;382; RV32I-LABEL: exp_f64:383; RV32I: # %bb.0:384; RV32I-NEXT: addi sp, sp, -16385; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill386; RV32I-NEXT: call exp387; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload388; RV32I-NEXT: addi sp, sp, 16389; RV32I-NEXT: ret390;391; RV64I-LABEL: exp_f64:392; RV64I: # %bb.0:393; RV64I-NEXT: addi sp, sp, -16394; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill395; RV64I-NEXT: call exp396; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload397; RV64I-NEXT: addi sp, sp, 16398; RV64I-NEXT: ret399 %1 = call double @llvm.exp.f64(double %a)400 ret double %1401}402 403define double @exp2_f64(double %a) nounwind {404; CHECKIFD-LABEL: exp2_f64:405; CHECKIFD: # %bb.0:406; CHECKIFD-NEXT: tail exp2407;408; RV32IZFINXZDINX-LABEL: exp2_f64:409; RV32IZFINXZDINX: # %bb.0:410; RV32IZFINXZDINX-NEXT: addi sp, sp, -16411; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill412; RV32IZFINXZDINX-NEXT: call exp2413; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload414; RV32IZFINXZDINX-NEXT: addi sp, sp, 16415; RV32IZFINXZDINX-NEXT: ret416;417; RV64IZFINXZDINX-LABEL: exp2_f64:418; RV64IZFINXZDINX: # %bb.0:419; RV64IZFINXZDINX-NEXT: tail exp2420;421; RV32I-LABEL: exp2_f64:422; RV32I: # %bb.0:423; RV32I-NEXT: addi sp, sp, -16424; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill425; RV32I-NEXT: call exp2426; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload427; RV32I-NEXT: addi sp, sp, 16428; RV32I-NEXT: ret429;430; RV64I-LABEL: exp2_f64:431; RV64I: # %bb.0:432; RV64I-NEXT: addi sp, sp, -16433; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill434; RV64I-NEXT: call exp2435; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload436; RV64I-NEXT: addi sp, sp, 16437; RV64I-NEXT: ret438 %1 = call double @llvm.exp2.f64(double %a)439 ret double %1440}441 442define double @exp10_f64(double %a) nounwind {443; CHECKIFD-LABEL: exp10_f64:444; CHECKIFD: # %bb.0:445; CHECKIFD-NEXT: tail exp10446;447; RV32IZFINXZDINX-LABEL: exp10_f64:448; RV32IZFINXZDINX: # %bb.0:449; RV32IZFINXZDINX-NEXT: addi sp, sp, -16450; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill451; RV32IZFINXZDINX-NEXT: call exp10452; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload453; RV32IZFINXZDINX-NEXT: addi sp, sp, 16454; RV32IZFINXZDINX-NEXT: ret455;456; RV64IZFINXZDINX-LABEL: exp10_f64:457; RV64IZFINXZDINX: # %bb.0:458; RV64IZFINXZDINX-NEXT: tail exp10459;460; RV32I-LABEL: exp10_f64:461; RV32I: # %bb.0:462; RV32I-NEXT: addi sp, sp, -16463; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill464; RV32I-NEXT: call exp10465; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload466; RV32I-NEXT: addi sp, sp, 16467; RV32I-NEXT: ret468;469; RV64I-LABEL: exp10_f64:470; RV64I: # %bb.0:471; RV64I-NEXT: addi sp, sp, -16472; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill473; RV64I-NEXT: call exp10474; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload475; RV64I-NEXT: addi sp, sp, 16476; RV64I-NEXT: ret477 %1 = call double @llvm.exp10.f64(double %a)478 ret double %1479}480 481define double @log_f64(double %a) nounwind {482; CHECKIFD-LABEL: log_f64:483; CHECKIFD: # %bb.0:484; CHECKIFD-NEXT: tail log485;486; RV32IZFINXZDINX-LABEL: log_f64:487; RV32IZFINXZDINX: # %bb.0:488; RV32IZFINXZDINX-NEXT: addi sp, sp, -16489; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill490; RV32IZFINXZDINX-NEXT: call log491; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload492; RV32IZFINXZDINX-NEXT: addi sp, sp, 16493; RV32IZFINXZDINX-NEXT: ret494;495; RV64IZFINXZDINX-LABEL: log_f64:496; RV64IZFINXZDINX: # %bb.0:497; RV64IZFINXZDINX-NEXT: tail log498;499; RV32I-LABEL: log_f64:500; RV32I: # %bb.0:501; RV32I-NEXT: addi sp, sp, -16502; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill503; RV32I-NEXT: call log504; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload505; RV32I-NEXT: addi sp, sp, 16506; RV32I-NEXT: ret507;508; RV64I-LABEL: log_f64:509; RV64I: # %bb.0:510; RV64I-NEXT: addi sp, sp, -16511; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill512; RV64I-NEXT: call log513; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload514; RV64I-NEXT: addi sp, sp, 16515; RV64I-NEXT: ret516 %1 = call double @llvm.log.f64(double %a)517 ret double %1518}519 520define double @log10_f64(double %a) nounwind {521; CHECKIFD-LABEL: log10_f64:522; CHECKIFD: # %bb.0:523; CHECKIFD-NEXT: tail log10524;525; RV32IZFINXZDINX-LABEL: log10_f64:526; RV32IZFINXZDINX: # %bb.0:527; RV32IZFINXZDINX-NEXT: addi sp, sp, -16528; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill529; RV32IZFINXZDINX-NEXT: call log10530; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload531; RV32IZFINXZDINX-NEXT: addi sp, sp, 16532; RV32IZFINXZDINX-NEXT: ret533;534; RV64IZFINXZDINX-LABEL: log10_f64:535; RV64IZFINXZDINX: # %bb.0:536; RV64IZFINXZDINX-NEXT: tail log10537;538; RV32I-LABEL: log10_f64:539; RV32I: # %bb.0:540; RV32I-NEXT: addi sp, sp, -16541; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill542; RV32I-NEXT: call log10543; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload544; RV32I-NEXT: addi sp, sp, 16545; RV32I-NEXT: ret546;547; RV64I-LABEL: log10_f64:548; RV64I: # %bb.0:549; RV64I-NEXT: addi sp, sp, -16550; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill551; RV64I-NEXT: call log10552; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload553; RV64I-NEXT: addi sp, sp, 16554; RV64I-NEXT: ret555 %1 = call double @llvm.log10.f64(double %a)556 ret double %1557}558 559define double @log2_f64(double %a) nounwind {560; CHECKIFD-LABEL: log2_f64:561; CHECKIFD: # %bb.0:562; CHECKIFD-NEXT: tail log2563;564; RV32IZFINXZDINX-LABEL: log2_f64:565; RV32IZFINXZDINX: # %bb.0:566; RV32IZFINXZDINX-NEXT: addi sp, sp, -16567; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill568; RV32IZFINXZDINX-NEXT: call log2569; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload570; RV32IZFINXZDINX-NEXT: addi sp, sp, 16571; RV32IZFINXZDINX-NEXT: ret572;573; RV64IZFINXZDINX-LABEL: log2_f64:574; RV64IZFINXZDINX: # %bb.0:575; RV64IZFINXZDINX-NEXT: tail log2576;577; RV32I-LABEL: log2_f64:578; RV32I: # %bb.0:579; RV32I-NEXT: addi sp, sp, -16580; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill581; RV32I-NEXT: call log2582; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload583; RV32I-NEXT: addi sp, sp, 16584; RV32I-NEXT: ret585;586; RV64I-LABEL: log2_f64:587; RV64I: # %bb.0:588; RV64I-NEXT: addi sp, sp, -16589; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill590; RV64I-NEXT: call log2591; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload592; RV64I-NEXT: addi sp, sp, 16593; RV64I-NEXT: ret594 %1 = call double @llvm.log2.f64(double %a)595 ret double %1596}597 598define double @fma_f64(double %a, double %b, double %c) nounwind {599; CHECKIFD-LABEL: fma_f64:600; CHECKIFD: # %bb.0:601; CHECKIFD-NEXT: fmadd.d fa0, fa0, fa1, fa2602; CHECKIFD-NEXT: ret603;604; RV32IZFINXZDINX-LABEL: fma_f64:605; RV32IZFINXZDINX: # %bb.0:606; RV32IZFINXZDINX-NEXT: fmadd.d a0, a0, a2, a4607; RV32IZFINXZDINX-NEXT: ret608;609; RV64IZFINXZDINX-LABEL: fma_f64:610; RV64IZFINXZDINX: # %bb.0:611; RV64IZFINXZDINX-NEXT: fmadd.d a0, a0, a1, a2612; RV64IZFINXZDINX-NEXT: ret613;614; RV32I-LABEL: fma_f64:615; RV32I: # %bb.0:616; RV32I-NEXT: addi sp, sp, -16617; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill618; RV32I-NEXT: call fma619; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload620; RV32I-NEXT: addi sp, sp, 16621; RV32I-NEXT: ret622;623; RV64I-LABEL: fma_f64:624; RV64I: # %bb.0:625; RV64I-NEXT: addi sp, sp, -16626; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill627; RV64I-NEXT: call fma628; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload629; RV64I-NEXT: addi sp, sp, 16630; RV64I-NEXT: ret631 %1 = call double @llvm.fma.f64(double %a, double %b, double %c)632 ret double %1633}634 635define double @fmuladd_f64(double %a, double %b, double %c) nounwind {636; CHECKIFD-LABEL: fmuladd_f64:637; CHECKIFD: # %bb.0:638; CHECKIFD-NEXT: fmadd.d fa0, fa0, fa1, fa2639; CHECKIFD-NEXT: ret640;641; RV32IZFINXZDINX-LABEL: fmuladd_f64:642; RV32IZFINXZDINX: # %bb.0:643; RV32IZFINXZDINX-NEXT: fmadd.d a0, a0, a2, a4644; RV32IZFINXZDINX-NEXT: ret645;646; RV64IZFINXZDINX-LABEL: fmuladd_f64:647; RV64IZFINXZDINX: # %bb.0:648; RV64IZFINXZDINX-NEXT: fmadd.d a0, a0, a1, a2649; RV64IZFINXZDINX-NEXT: ret650;651; RV32I-LABEL: fmuladd_f64:652; RV32I: # %bb.0:653; RV32I-NEXT: addi sp, sp, -16654; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill655; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill656; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill657; RV32I-NEXT: mv s0, a5658; RV32I-NEXT: mv s1, a4659; RV32I-NEXT: call __muldf3660; RV32I-NEXT: mv a2, s1661; RV32I-NEXT: mv a3, s0662; RV32I-NEXT: call __adddf3663; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload664; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload665; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload666; RV32I-NEXT: addi sp, sp, 16667; RV32I-NEXT: ret668;669; RV64I-LABEL: fmuladd_f64:670; RV64I: # %bb.0:671; RV64I-NEXT: addi sp, sp, -16672; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill673; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill674; RV64I-NEXT: mv s0, a2675; RV64I-NEXT: call __muldf3676; RV64I-NEXT: mv a1, s0677; RV64I-NEXT: call __adddf3678; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload679; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload680; RV64I-NEXT: addi sp, sp, 16681; RV64I-NEXT: ret682 %1 = call double @llvm.fmuladd.f64(double %a, double %b, double %c)683 ret double %1684}685 686define double @fabs_f64(double %a) nounwind {687; CHECKIFD-LABEL: fabs_f64:688; CHECKIFD: # %bb.0:689; CHECKIFD-NEXT: fabs.d fa0, fa0690; CHECKIFD-NEXT: ret691;692; RV32IZFINXZDINX-LABEL: fabs_f64:693; RV32IZFINXZDINX: # %bb.0:694; RV32IZFINXZDINX-NEXT: fabs.d a0, a0695; RV32IZFINXZDINX-NEXT: ret696;697; RV64IZFINXZDINX-LABEL: fabs_f64:698; RV64IZFINXZDINX: # %bb.0:699; RV64IZFINXZDINX-NEXT: fabs.d a0, a0700; RV64IZFINXZDINX-NEXT: ret701;702; RV32I-LABEL: fabs_f64:703; RV32I: # %bb.0:704; RV32I-NEXT: slli a1, a1, 1705; RV32I-NEXT: srli a1, a1, 1706; RV32I-NEXT: ret707;708; RV64I-LABEL: fabs_f64:709; RV64I: # %bb.0:710; RV64I-NEXT: slli a0, a0, 1711; RV64I-NEXT: srli a0, a0, 1712; RV64I-NEXT: ret713 %1 = call double @llvm.fabs.f64(double %a)714 ret double %1715}716 717define double @minnum_f64(double %a, double %b) nounwind {718; CHECKIFD-LABEL: minnum_f64:719; CHECKIFD: # %bb.0:720; CHECKIFD-NEXT: fmin.d fa0, fa0, fa1721; CHECKIFD-NEXT: ret722;723; RV32IZFINXZDINX-LABEL: minnum_f64:724; RV32IZFINXZDINX: # %bb.0:725; RV32IZFINXZDINX-NEXT: fmin.d a0, a0, a2726; RV32IZFINXZDINX-NEXT: ret727;728; RV64IZFINXZDINX-LABEL: minnum_f64:729; RV64IZFINXZDINX: # %bb.0:730; RV64IZFINXZDINX-NEXT: fmin.d a0, a0, a1731; RV64IZFINXZDINX-NEXT: ret732;733; RV32I-LABEL: minnum_f64:734; RV32I: # %bb.0:735; RV32I-NEXT: addi sp, sp, -16736; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill737; RV32I-NEXT: call fmin738; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload739; RV32I-NEXT: addi sp, sp, 16740; RV32I-NEXT: ret741;742; RV64I-LABEL: minnum_f64:743; RV64I: # %bb.0:744; RV64I-NEXT: addi sp, sp, -16745; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill746; RV64I-NEXT: call fmin747; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload748; RV64I-NEXT: addi sp, sp, 16749; RV64I-NEXT: ret750 %1 = call double @llvm.minnum.f64(double %a, double %b)751 ret double %1752}753 754define double @maxnum_f64(double %a, double %b) nounwind {755; CHECKIFD-LABEL: maxnum_f64:756; CHECKIFD: # %bb.0:757; CHECKIFD-NEXT: fmax.d fa0, fa0, fa1758; CHECKIFD-NEXT: ret759;760; RV32IZFINXZDINX-LABEL: maxnum_f64:761; RV32IZFINXZDINX: # %bb.0:762; RV32IZFINXZDINX-NEXT: fmax.d a0, a0, a2763; RV32IZFINXZDINX-NEXT: ret764;765; RV64IZFINXZDINX-LABEL: maxnum_f64:766; RV64IZFINXZDINX: # %bb.0:767; RV64IZFINXZDINX-NEXT: fmax.d a0, a0, a1768; RV64IZFINXZDINX-NEXT: ret769;770; RV32I-LABEL: maxnum_f64:771; RV32I: # %bb.0:772; RV32I-NEXT: addi sp, sp, -16773; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill774; RV32I-NEXT: call fmax775; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload776; RV32I-NEXT: addi sp, sp, 16777; RV32I-NEXT: ret778;779; RV64I-LABEL: maxnum_f64:780; RV64I: # %bb.0:781; RV64I-NEXT: addi sp, sp, -16782; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill783; RV64I-NEXT: call fmax784; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload785; RV64I-NEXT: addi sp, sp, 16786; RV64I-NEXT: ret787 %1 = call double @llvm.maxnum.f64(double %a, double %b)788 ret double %1789}790 791define double @copysign_f64(double %a, double %b) nounwind {792; CHECKIFD-LABEL: copysign_f64:793; CHECKIFD: # %bb.0:794; CHECKIFD-NEXT: fsgnj.d fa0, fa0, fa1795; CHECKIFD-NEXT: ret796;797; RV32IZFINXZDINX-LABEL: copysign_f64:798; RV32IZFINXZDINX: # %bb.0:799; RV32IZFINXZDINX-NEXT: fsgnj.d a0, a0, a2800; RV32IZFINXZDINX-NEXT: ret801;802; RV64IZFINXZDINX-LABEL: copysign_f64:803; RV64IZFINXZDINX: # %bb.0:804; RV64IZFINXZDINX-NEXT: fsgnj.d a0, a0, a1805; RV64IZFINXZDINX-NEXT: ret806;807; RV32I-LABEL: copysign_f64:808; RV32I: # %bb.0:809; RV32I-NEXT: lui a2, 524288810; RV32I-NEXT: slli a1, a1, 1811; RV32I-NEXT: and a2, a3, a2812; RV32I-NEXT: srli a1, a1, 1813; RV32I-NEXT: or a1, a1, a2814; RV32I-NEXT: ret815;816; RV64I-LABEL: copysign_f64:817; RV64I: # %bb.0:818; RV64I-NEXT: srli a1, a1, 63819; RV64I-NEXT: slli a0, a0, 1820; RV64I-NEXT: slli a1, a1, 63821; RV64I-NEXT: srli a0, a0, 1822; RV64I-NEXT: or a0, a0, a1823; RV64I-NEXT: ret824 %1 = call double @llvm.copysign.f64(double %a, double %b)825 ret double %1826}827 828define double @floor_f64(double %a) nounwind {829; RV32IFD-LABEL: floor_f64:830; RV32IFD: # %bb.0:831; RV32IFD-NEXT: tail floor832;833; RV64IFD-LABEL: floor_f64:834; RV64IFD: # %bb.0:835; RV64IFD-NEXT: li a0, 1075836; RV64IFD-NEXT: slli a0, a0, 52837; RV64IFD-NEXT: fmv.d.x fa5, a0838; RV64IFD-NEXT: fabs.d fa4, fa0839; RV64IFD-NEXT: flt.d a0, fa4, fa5840; RV64IFD-NEXT: beqz a0, .LBB18_2841; RV64IFD-NEXT: # %bb.1:842; RV64IFD-NEXT: fcvt.l.d a0, fa0, rdn843; RV64IFD-NEXT: fcvt.d.l fa5, a0, rdn844; RV64IFD-NEXT: fsgnj.d fa0, fa5, fa0845; RV64IFD-NEXT: .LBB18_2:846; RV64IFD-NEXT: ret847;848; RV32IZFINXZDINX-LABEL: floor_f64:849; RV32IZFINXZDINX: # %bb.0:850; RV32IZFINXZDINX-NEXT: addi sp, sp, -16851; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill852; RV32IZFINXZDINX-NEXT: call floor853; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload854; RV32IZFINXZDINX-NEXT: addi sp, sp, 16855; RV32IZFINXZDINX-NEXT: ret856;857; RV64IZFINXZDINX-LABEL: floor_f64:858; RV64IZFINXZDINX: # %bb.0:859; RV64IZFINXZDINX-NEXT: li a1, 1075860; RV64IZFINXZDINX-NEXT: slli a1, a1, 52861; RV64IZFINXZDINX-NEXT: fabs.d a2, a0862; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1863; RV64IZFINXZDINX-NEXT: beqz a1, .LBB18_2864; RV64IZFINXZDINX-NEXT: # %bb.1:865; RV64IZFINXZDINX-NEXT: fcvt.l.d a1, a0, rdn866; RV64IZFINXZDINX-NEXT: fcvt.d.l a1, a1, rdn867; RV64IZFINXZDINX-NEXT: fsgnj.d a0, a1, a0868; RV64IZFINXZDINX-NEXT: .LBB18_2:869; RV64IZFINXZDINX-NEXT: ret870;871; RV32I-LABEL: floor_f64:872; RV32I: # %bb.0:873; RV32I-NEXT: addi sp, sp, -16874; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill875; RV32I-NEXT: call floor876; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload877; RV32I-NEXT: addi sp, sp, 16878; RV32I-NEXT: ret879;880; RV64I-LABEL: floor_f64:881; RV64I: # %bb.0:882; RV64I-NEXT: addi sp, sp, -16883; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill884; RV64I-NEXT: call floor885; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload886; RV64I-NEXT: addi sp, sp, 16887; RV64I-NEXT: ret888 %1 = call double @llvm.floor.f64(double %a)889 ret double %1890}891 892define double @ceil_f64(double %a) nounwind {893; RV32IFD-LABEL: ceil_f64:894; RV32IFD: # %bb.0:895; RV32IFD-NEXT: tail ceil896;897; RV64IFD-LABEL: ceil_f64:898; RV64IFD: # %bb.0:899; RV64IFD-NEXT: li a0, 1075900; RV64IFD-NEXT: slli a0, a0, 52901; RV64IFD-NEXT: fmv.d.x fa5, a0902; RV64IFD-NEXT: fabs.d fa4, fa0903; RV64IFD-NEXT: flt.d a0, fa4, fa5904; RV64IFD-NEXT: beqz a0, .LBB19_2905; RV64IFD-NEXT: # %bb.1:906; RV64IFD-NEXT: fcvt.l.d a0, fa0, rup907; RV64IFD-NEXT: fcvt.d.l fa5, a0, rup908; RV64IFD-NEXT: fsgnj.d fa0, fa5, fa0909; RV64IFD-NEXT: .LBB19_2:910; RV64IFD-NEXT: ret911;912; RV32IZFINXZDINX-LABEL: ceil_f64:913; RV32IZFINXZDINX: # %bb.0:914; RV32IZFINXZDINX-NEXT: addi sp, sp, -16915; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill916; RV32IZFINXZDINX-NEXT: call ceil917; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload918; RV32IZFINXZDINX-NEXT: addi sp, sp, 16919; RV32IZFINXZDINX-NEXT: ret920;921; RV64IZFINXZDINX-LABEL: ceil_f64:922; RV64IZFINXZDINX: # %bb.0:923; RV64IZFINXZDINX-NEXT: li a1, 1075924; RV64IZFINXZDINX-NEXT: slli a1, a1, 52925; RV64IZFINXZDINX-NEXT: fabs.d a2, a0926; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1927; RV64IZFINXZDINX-NEXT: beqz a1, .LBB19_2928; RV64IZFINXZDINX-NEXT: # %bb.1:929; RV64IZFINXZDINX-NEXT: fcvt.l.d a1, a0, rup930; RV64IZFINXZDINX-NEXT: fcvt.d.l a1, a1, rup931; RV64IZFINXZDINX-NEXT: fsgnj.d a0, a1, a0932; RV64IZFINXZDINX-NEXT: .LBB19_2:933; RV64IZFINXZDINX-NEXT: ret934;935; RV32I-LABEL: ceil_f64:936; RV32I: # %bb.0:937; RV32I-NEXT: addi sp, sp, -16938; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill939; RV32I-NEXT: call ceil940; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload941; RV32I-NEXT: addi sp, sp, 16942; RV32I-NEXT: ret943;944; RV64I-LABEL: ceil_f64:945; RV64I: # %bb.0:946; RV64I-NEXT: addi sp, sp, -16947; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill948; RV64I-NEXT: call ceil949; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload950; RV64I-NEXT: addi sp, sp, 16951; RV64I-NEXT: ret952 %1 = call double @llvm.ceil.f64(double %a)953 ret double %1954}955 956define double @trunc_f64(double %a) nounwind {957; RV32IFD-LABEL: trunc_f64:958; RV32IFD: # %bb.0:959; RV32IFD-NEXT: tail trunc960;961; RV64IFD-LABEL: trunc_f64:962; RV64IFD: # %bb.0:963; RV64IFD-NEXT: li a0, 1075964; RV64IFD-NEXT: slli a0, a0, 52965; RV64IFD-NEXT: fmv.d.x fa5, a0966; RV64IFD-NEXT: fabs.d fa4, fa0967; RV64IFD-NEXT: flt.d a0, fa4, fa5968; RV64IFD-NEXT: beqz a0, .LBB20_2969; RV64IFD-NEXT: # %bb.1:970; RV64IFD-NEXT: fcvt.l.d a0, fa0, rtz971; RV64IFD-NEXT: fcvt.d.l fa5, a0, rtz972; RV64IFD-NEXT: fsgnj.d fa0, fa5, fa0973; RV64IFD-NEXT: .LBB20_2:974; RV64IFD-NEXT: ret975;976; RV32IZFINXZDINX-LABEL: trunc_f64:977; RV32IZFINXZDINX: # %bb.0:978; RV32IZFINXZDINX-NEXT: addi sp, sp, -16979; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill980; RV32IZFINXZDINX-NEXT: call trunc981; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload982; RV32IZFINXZDINX-NEXT: addi sp, sp, 16983; RV32IZFINXZDINX-NEXT: ret984;985; RV64IZFINXZDINX-LABEL: trunc_f64:986; RV64IZFINXZDINX: # %bb.0:987; RV64IZFINXZDINX-NEXT: li a1, 1075988; RV64IZFINXZDINX-NEXT: slli a1, a1, 52989; RV64IZFINXZDINX-NEXT: fabs.d a2, a0990; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a1991; RV64IZFINXZDINX-NEXT: beqz a1, .LBB20_2992; RV64IZFINXZDINX-NEXT: # %bb.1:993; RV64IZFINXZDINX-NEXT: fcvt.l.d a1, a0, rtz994; RV64IZFINXZDINX-NEXT: fcvt.d.l a1, a1, rtz995; RV64IZFINXZDINX-NEXT: fsgnj.d a0, a1, a0996; RV64IZFINXZDINX-NEXT: .LBB20_2:997; RV64IZFINXZDINX-NEXT: ret998;999; RV32I-LABEL: trunc_f64:1000; RV32I: # %bb.0:1001; RV32I-NEXT: addi sp, sp, -161002; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1003; RV32I-NEXT: call trunc1004; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1005; RV32I-NEXT: addi sp, sp, 161006; RV32I-NEXT: ret1007;1008; RV64I-LABEL: trunc_f64:1009; RV64I: # %bb.0:1010; RV64I-NEXT: addi sp, sp, -161011; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1012; RV64I-NEXT: call trunc1013; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1014; RV64I-NEXT: addi sp, sp, 161015; RV64I-NEXT: ret1016 %1 = call double @llvm.trunc.f64(double %a)1017 ret double %11018}1019 1020define double @rint_f64(double %a) nounwind {1021; RV32IFD-LABEL: rint_f64:1022; RV32IFD: # %bb.0:1023; RV32IFD-NEXT: tail rint1024;1025; RV64IFD-LABEL: rint_f64:1026; RV64IFD: # %bb.0:1027; RV64IFD-NEXT: li a0, 10751028; RV64IFD-NEXT: slli a0, a0, 521029; RV64IFD-NEXT: fmv.d.x fa5, a01030; RV64IFD-NEXT: fabs.d fa4, fa01031; RV64IFD-NEXT: flt.d a0, fa4, fa51032; RV64IFD-NEXT: beqz a0, .LBB21_21033; RV64IFD-NEXT: # %bb.1:1034; RV64IFD-NEXT: fcvt.l.d a0, fa01035; RV64IFD-NEXT: fcvt.d.l fa5, a01036; RV64IFD-NEXT: fsgnj.d fa0, fa5, fa01037; RV64IFD-NEXT: .LBB21_2:1038; RV64IFD-NEXT: ret1039;1040; RV32IZFINXZDINX-LABEL: rint_f64:1041; RV32IZFINXZDINX: # %bb.0:1042; RV32IZFINXZDINX-NEXT: addi sp, sp, -161043; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1044; RV32IZFINXZDINX-NEXT: call rint1045; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1046; RV32IZFINXZDINX-NEXT: addi sp, sp, 161047; RV32IZFINXZDINX-NEXT: ret1048;1049; RV64IZFINXZDINX-LABEL: rint_f64:1050; RV64IZFINXZDINX: # %bb.0:1051; RV64IZFINXZDINX-NEXT: li a1, 10751052; RV64IZFINXZDINX-NEXT: slli a1, a1, 521053; RV64IZFINXZDINX-NEXT: fabs.d a2, a01054; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a11055; RV64IZFINXZDINX-NEXT: beqz a1, .LBB21_21056; RV64IZFINXZDINX-NEXT: # %bb.1:1057; RV64IZFINXZDINX-NEXT: fcvt.l.d a1, a01058; RV64IZFINXZDINX-NEXT: fcvt.d.l a1, a11059; RV64IZFINXZDINX-NEXT: fsgnj.d a0, a1, a01060; RV64IZFINXZDINX-NEXT: .LBB21_2:1061; RV64IZFINXZDINX-NEXT: ret1062;1063; RV32I-LABEL: rint_f64:1064; RV32I: # %bb.0:1065; RV32I-NEXT: addi sp, sp, -161066; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1067; RV32I-NEXT: call rint1068; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1069; RV32I-NEXT: addi sp, sp, 161070; RV32I-NEXT: ret1071;1072; RV64I-LABEL: rint_f64:1073; RV64I: # %bb.0:1074; RV64I-NEXT: addi sp, sp, -161075; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1076; RV64I-NEXT: call rint1077; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1078; RV64I-NEXT: addi sp, sp, 161079; RV64I-NEXT: ret1080 %1 = call double @llvm.rint.f64(double %a)1081 ret double %11082}1083 1084define double @nearbyint_f64(double %a) nounwind {1085; CHECKIFD-LABEL: nearbyint_f64:1086; CHECKIFD: # %bb.0:1087; CHECKIFD-NEXT: tail nearbyint1088;1089; RV32IZFINXZDINX-LABEL: nearbyint_f64:1090; RV32IZFINXZDINX: # %bb.0:1091; RV32IZFINXZDINX-NEXT: addi sp, sp, -161092; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1093; RV32IZFINXZDINX-NEXT: call nearbyint1094; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1095; RV32IZFINXZDINX-NEXT: addi sp, sp, 161096; RV32IZFINXZDINX-NEXT: ret1097;1098; RV64IZFINXZDINX-LABEL: nearbyint_f64:1099; RV64IZFINXZDINX: # %bb.0:1100; RV64IZFINXZDINX-NEXT: tail nearbyint1101;1102; RV32I-LABEL: nearbyint_f64:1103; RV32I: # %bb.0:1104; RV32I-NEXT: addi sp, sp, -161105; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1106; RV32I-NEXT: call nearbyint1107; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1108; RV32I-NEXT: addi sp, sp, 161109; RV32I-NEXT: ret1110;1111; RV64I-LABEL: nearbyint_f64:1112; RV64I: # %bb.0:1113; RV64I-NEXT: addi sp, sp, -161114; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1115; RV64I-NEXT: call nearbyint1116; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1117; RV64I-NEXT: addi sp, sp, 161118; RV64I-NEXT: ret1119 %1 = call double @llvm.nearbyint.f64(double %a)1120 ret double %11121}1122 1123define double @round_f64(double %a) nounwind {1124; RV32IFD-LABEL: round_f64:1125; RV32IFD: # %bb.0:1126; RV32IFD-NEXT: tail round1127;1128; RV64IFD-LABEL: round_f64:1129; RV64IFD: # %bb.0:1130; RV64IFD-NEXT: li a0, 10751131; RV64IFD-NEXT: slli a0, a0, 521132; RV64IFD-NEXT: fmv.d.x fa5, a01133; RV64IFD-NEXT: fabs.d fa4, fa01134; RV64IFD-NEXT: flt.d a0, fa4, fa51135; RV64IFD-NEXT: beqz a0, .LBB23_21136; RV64IFD-NEXT: # %bb.1:1137; RV64IFD-NEXT: fcvt.l.d a0, fa0, rmm1138; RV64IFD-NEXT: fcvt.d.l fa5, a0, rmm1139; RV64IFD-NEXT: fsgnj.d fa0, fa5, fa01140; RV64IFD-NEXT: .LBB23_2:1141; RV64IFD-NEXT: ret1142;1143; RV32IZFINXZDINX-LABEL: round_f64:1144; RV32IZFINXZDINX: # %bb.0:1145; RV32IZFINXZDINX-NEXT: addi sp, sp, -161146; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1147; RV32IZFINXZDINX-NEXT: call round1148; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1149; RV32IZFINXZDINX-NEXT: addi sp, sp, 161150; RV32IZFINXZDINX-NEXT: ret1151;1152; RV64IZFINXZDINX-LABEL: round_f64:1153; RV64IZFINXZDINX: # %bb.0:1154; RV64IZFINXZDINX-NEXT: li a1, 10751155; RV64IZFINXZDINX-NEXT: slli a1, a1, 521156; RV64IZFINXZDINX-NEXT: fabs.d a2, a01157; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a11158; RV64IZFINXZDINX-NEXT: beqz a1, .LBB23_21159; RV64IZFINXZDINX-NEXT: # %bb.1:1160; RV64IZFINXZDINX-NEXT: fcvt.l.d a1, a0, rmm1161; RV64IZFINXZDINX-NEXT: fcvt.d.l a1, a1, rmm1162; RV64IZFINXZDINX-NEXT: fsgnj.d a0, a1, a01163; RV64IZFINXZDINX-NEXT: .LBB23_2:1164; RV64IZFINXZDINX-NEXT: ret1165;1166; RV32I-LABEL: round_f64:1167; RV32I: # %bb.0:1168; RV32I-NEXT: addi sp, sp, -161169; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1170; RV32I-NEXT: call round1171; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1172; RV32I-NEXT: addi sp, sp, 161173; RV32I-NEXT: ret1174;1175; RV64I-LABEL: round_f64:1176; RV64I: # %bb.0:1177; RV64I-NEXT: addi sp, sp, -161178; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1179; RV64I-NEXT: call round1180; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1181; RV64I-NEXT: addi sp, sp, 161182; RV64I-NEXT: ret1183 %1 = call double @llvm.round.f64(double %a)1184 ret double %11185}1186 1187define double @roundeven_f64(double %a) nounwind {1188; RV32IFD-LABEL: roundeven_f64:1189; RV32IFD: # %bb.0:1190; RV32IFD-NEXT: tail roundeven1191;1192; RV64IFD-LABEL: roundeven_f64:1193; RV64IFD: # %bb.0:1194; RV64IFD-NEXT: li a0, 10751195; RV64IFD-NEXT: slli a0, a0, 521196; RV64IFD-NEXT: fmv.d.x fa5, a01197; RV64IFD-NEXT: fabs.d fa4, fa01198; RV64IFD-NEXT: flt.d a0, fa4, fa51199; RV64IFD-NEXT: beqz a0, .LBB24_21200; RV64IFD-NEXT: # %bb.1:1201; RV64IFD-NEXT: fcvt.l.d a0, fa0, rne1202; RV64IFD-NEXT: fcvt.d.l fa5, a0, rne1203; RV64IFD-NEXT: fsgnj.d fa0, fa5, fa01204; RV64IFD-NEXT: .LBB24_2:1205; RV64IFD-NEXT: ret1206;1207; RV32IZFINXZDINX-LABEL: roundeven_f64:1208; RV32IZFINXZDINX: # %bb.0:1209; RV32IZFINXZDINX-NEXT: addi sp, sp, -161210; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1211; RV32IZFINXZDINX-NEXT: call roundeven1212; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1213; RV32IZFINXZDINX-NEXT: addi sp, sp, 161214; RV32IZFINXZDINX-NEXT: ret1215;1216; RV64IZFINXZDINX-LABEL: roundeven_f64:1217; RV64IZFINXZDINX: # %bb.0:1218; RV64IZFINXZDINX-NEXT: li a1, 10751219; RV64IZFINXZDINX-NEXT: slli a1, a1, 521220; RV64IZFINXZDINX-NEXT: fabs.d a2, a01221; RV64IZFINXZDINX-NEXT: flt.d a1, a2, a11222; RV64IZFINXZDINX-NEXT: beqz a1, .LBB24_21223; RV64IZFINXZDINX-NEXT: # %bb.1:1224; RV64IZFINXZDINX-NEXT: fcvt.l.d a1, a0, rne1225; RV64IZFINXZDINX-NEXT: fcvt.d.l a1, a1, rne1226; RV64IZFINXZDINX-NEXT: fsgnj.d a0, a1, a01227; RV64IZFINXZDINX-NEXT: .LBB24_2:1228; RV64IZFINXZDINX-NEXT: ret1229;1230; RV32I-LABEL: roundeven_f64:1231; RV32I: # %bb.0:1232; RV32I-NEXT: addi sp, sp, -161233; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1234; RV32I-NEXT: call roundeven1235; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1236; RV32I-NEXT: addi sp, sp, 161237; RV32I-NEXT: ret1238;1239; RV64I-LABEL: roundeven_f64:1240; RV64I: # %bb.0:1241; RV64I-NEXT: addi sp, sp, -161242; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1243; RV64I-NEXT: call roundeven1244; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1245; RV64I-NEXT: addi sp, sp, 161246; RV64I-NEXT: ret1247 %1 = call double @llvm.roundeven.f64(double %a)1248 ret double %11249}1250 1251define iXLen @lrint_f64(double %a) nounwind {1252; RV32IFD-LABEL: lrint_f64:1253; RV32IFD: # %bb.0:1254; RV32IFD-NEXT: fcvt.w.d a0, fa01255; RV32IFD-NEXT: ret1256;1257; RV64IFD-LABEL: lrint_f64:1258; RV64IFD: # %bb.0:1259; RV64IFD-NEXT: fcvt.l.d a0, fa01260; RV64IFD-NEXT: ret1261;1262; RV32IZFINXZDINX-LABEL: lrint_f64:1263; RV32IZFINXZDINX: # %bb.0:1264; RV32IZFINXZDINX-NEXT: fcvt.w.d a0, a01265; RV32IZFINXZDINX-NEXT: ret1266;1267; RV64IZFINXZDINX-LABEL: lrint_f64:1268; RV64IZFINXZDINX: # %bb.0:1269; RV64IZFINXZDINX-NEXT: fcvt.l.d a0, a01270; RV64IZFINXZDINX-NEXT: ret1271;1272; RV32I-LABEL: lrint_f64:1273; RV32I: # %bb.0:1274; RV32I-NEXT: addi sp, sp, -161275; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1276; RV32I-NEXT: call lrint1277; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1278; RV32I-NEXT: addi sp, sp, 161279; RV32I-NEXT: ret1280;1281; RV64I-LABEL: lrint_f64:1282; RV64I: # %bb.0:1283; RV64I-NEXT: addi sp, sp, -161284; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1285; RV64I-NEXT: call lrint1286; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1287; RV64I-NEXT: addi sp, sp, 161288; RV64I-NEXT: ret1289 %1 = call iXLen @llvm.lrint.iXLen.f64(double %a)1290 ret iXLen %11291}1292 1293define iXLen @lround_f64(double %a) nounwind {1294; RV32IFD-LABEL: lround_f64:1295; RV32IFD: # %bb.0:1296; RV32IFD-NEXT: fcvt.w.d a0, fa0, rmm1297; RV32IFD-NEXT: ret1298;1299; RV64IFD-LABEL: lround_f64:1300; RV64IFD: # %bb.0:1301; RV64IFD-NEXT: fcvt.l.d a0, fa0, rmm1302; RV64IFD-NEXT: ret1303;1304; RV32IZFINXZDINX-LABEL: lround_f64:1305; RV32IZFINXZDINX: # %bb.0:1306; RV32IZFINXZDINX-NEXT: fcvt.w.d a0, a0, rmm1307; RV32IZFINXZDINX-NEXT: ret1308;1309; RV64IZFINXZDINX-LABEL: lround_f64:1310; RV64IZFINXZDINX: # %bb.0:1311; RV64IZFINXZDINX-NEXT: fcvt.l.d a0, a0, rmm1312; RV64IZFINXZDINX-NEXT: ret1313;1314; RV32I-LABEL: lround_f64:1315; RV32I: # %bb.0:1316; RV32I-NEXT: addi sp, sp, -161317; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1318; RV32I-NEXT: call lround1319; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1320; RV32I-NEXT: addi sp, sp, 161321; RV32I-NEXT: ret1322;1323; RV64I-LABEL: lround_f64:1324; RV64I: # %bb.0:1325; RV64I-NEXT: addi sp, sp, -161326; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1327; RV64I-NEXT: call lround1328; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1329; RV64I-NEXT: addi sp, sp, 161330; RV64I-NEXT: ret1331 %1 = call iXLen @llvm.lround.iXLen.f64(double %a)1332 ret iXLen %11333}1334 1335define i32 @lround_i32_f64(double %a) nounwind {1336; CHECKIFD-LABEL: lround_i32_f64:1337; CHECKIFD: # %bb.0:1338; CHECKIFD-NEXT: fcvt.w.d a0, fa0, rmm1339; CHECKIFD-NEXT: ret1340;1341; RV32IZFINXZDINX-LABEL: lround_i32_f64:1342; RV32IZFINXZDINX: # %bb.0:1343; RV32IZFINXZDINX-NEXT: fcvt.w.d a0, a0, rmm1344; RV32IZFINXZDINX-NEXT: ret1345;1346; RV64IZFINXZDINX-LABEL: lround_i32_f64:1347; RV64IZFINXZDINX: # %bb.0:1348; RV64IZFINXZDINX-NEXT: fcvt.w.d a0, a0, rmm1349; RV64IZFINXZDINX-NEXT: ret1350;1351; RV32I-LABEL: lround_i32_f64:1352; RV32I: # %bb.0:1353; RV32I-NEXT: addi sp, sp, -161354; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1355; RV32I-NEXT: call lround1356; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1357; RV32I-NEXT: addi sp, sp, 161358; RV32I-NEXT: ret1359;1360; RV64I-LABEL: lround_i32_f64:1361; RV64I: # %bb.0:1362; RV64I-NEXT: addi sp, sp, -161363; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1364; RV64I-NEXT: call lround1365; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1366; RV64I-NEXT: addi sp, sp, 161367; RV64I-NEXT: ret1368 %1 = call i32 @llvm.lround.i32.f64(double %a)1369 ret i32 %11370}1371 1372define i64 @llrint_f64(double %a) nounwind {1373; RV32IFD-LABEL: llrint_f64:1374; RV32IFD: # %bb.0:1375; RV32IFD-NEXT: addi sp, sp, -161376; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1377; RV32IFD-NEXT: call llrint1378; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1379; RV32IFD-NEXT: addi sp, sp, 161380; RV32IFD-NEXT: ret1381;1382; RV64IFD-LABEL: llrint_f64:1383; RV64IFD: # %bb.0:1384; RV64IFD-NEXT: fcvt.l.d a0, fa01385; RV64IFD-NEXT: ret1386;1387; RV32IZFINXZDINX-LABEL: llrint_f64:1388; RV32IZFINXZDINX: # %bb.0:1389; RV32IZFINXZDINX-NEXT: addi sp, sp, -161390; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1391; RV32IZFINXZDINX-NEXT: call llrint1392; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1393; RV32IZFINXZDINX-NEXT: addi sp, sp, 161394; RV32IZFINXZDINX-NEXT: ret1395;1396; RV64IZFINXZDINX-LABEL: llrint_f64:1397; RV64IZFINXZDINX: # %bb.0:1398; RV64IZFINXZDINX-NEXT: fcvt.l.d a0, a01399; RV64IZFINXZDINX-NEXT: ret1400;1401; RV32I-LABEL: llrint_f64:1402; RV32I: # %bb.0:1403; RV32I-NEXT: addi sp, sp, -161404; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1405; RV32I-NEXT: call llrint1406; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1407; RV32I-NEXT: addi sp, sp, 161408; RV32I-NEXT: ret1409;1410; RV64I-LABEL: llrint_f64:1411; RV64I: # %bb.0:1412; RV64I-NEXT: addi sp, sp, -161413; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1414; RV64I-NEXT: call llrint1415; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1416; RV64I-NEXT: addi sp, sp, 161417; RV64I-NEXT: ret1418 %1 = call i64 @llvm.llrint.i64.f64(double %a)1419 ret i64 %11420}1421 1422define i64 @llround_f64(double %a) nounwind {1423; RV32IFD-LABEL: llround_f64:1424; RV32IFD: # %bb.0:1425; RV32IFD-NEXT: addi sp, sp, -161426; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1427; RV32IFD-NEXT: call llround1428; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1429; RV32IFD-NEXT: addi sp, sp, 161430; RV32IFD-NEXT: ret1431;1432; RV64IFD-LABEL: llround_f64:1433; RV64IFD: # %bb.0:1434; RV64IFD-NEXT: fcvt.l.d a0, fa0, rmm1435; RV64IFD-NEXT: ret1436;1437; RV32IZFINXZDINX-LABEL: llround_f64:1438; RV32IZFINXZDINX: # %bb.0:1439; RV32IZFINXZDINX-NEXT: addi sp, sp, -161440; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1441; RV32IZFINXZDINX-NEXT: call llround1442; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1443; RV32IZFINXZDINX-NEXT: addi sp, sp, 161444; RV32IZFINXZDINX-NEXT: ret1445;1446; RV64IZFINXZDINX-LABEL: llround_f64:1447; RV64IZFINXZDINX: # %bb.0:1448; RV64IZFINXZDINX-NEXT: fcvt.l.d a0, a0, rmm1449; RV64IZFINXZDINX-NEXT: ret1450;1451; RV32I-LABEL: llround_f64:1452; RV32I: # %bb.0:1453; RV32I-NEXT: addi sp, sp, -161454; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1455; RV32I-NEXT: call llround1456; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1457; RV32I-NEXT: addi sp, sp, 161458; RV32I-NEXT: ret1459;1460; RV64I-LABEL: llround_f64:1461; RV64I: # %bb.0:1462; RV64I-NEXT: addi sp, sp, -161463; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1464; RV64I-NEXT: call llround1465; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1466; RV64I-NEXT: addi sp, sp, 161467; RV64I-NEXT: ret1468 %1 = call i64 @llvm.llround.i64.f64(double %a)1469 ret i64 %11470}1471 1472define i1 @isnan_d_fpclass(double %x) {1473; CHECKIFD-LABEL: isnan_d_fpclass:1474; CHECKIFD: # %bb.0:1475; CHECKIFD-NEXT: fclass.d a0, fa01476; CHECKIFD-NEXT: andi a0, a0, 7681477; CHECKIFD-NEXT: snez a0, a01478; CHECKIFD-NEXT: ret1479;1480; RV32IZFINXZDINX-LABEL: isnan_d_fpclass:1481; RV32IZFINXZDINX: # %bb.0:1482; RV32IZFINXZDINX-NEXT: fclass.d a0, a01483; RV32IZFINXZDINX-NEXT: andi a0, a0, 7681484; RV32IZFINXZDINX-NEXT: snez a0, a01485; RV32IZFINXZDINX-NEXT: ret1486;1487; RV64IZFINXZDINX-LABEL: isnan_d_fpclass:1488; RV64IZFINXZDINX: # %bb.0:1489; RV64IZFINXZDINX-NEXT: fclass.d a0, a01490; RV64IZFINXZDINX-NEXT: andi a0, a0, 7681491; RV64IZFINXZDINX-NEXT: snez a0, a01492; RV64IZFINXZDINX-NEXT: ret1493;1494; RV32I-LABEL: isnan_d_fpclass:1495; RV32I: # %bb.0:1496; RV32I-NEXT: slli a1, a1, 11497; RV32I-NEXT: srli a1, a1, 11498; RV32I-NEXT: lui a2, 5240321499; RV32I-NEXT: beq a1, a2, .LBB30_21500; RV32I-NEXT: # %bb.1:1501; RV32I-NEXT: slt a0, a2, a11502; RV32I-NEXT: ret1503; RV32I-NEXT: .LBB30_2:1504; RV32I-NEXT: snez a0, a01505; RV32I-NEXT: ret1506;1507; RV64I-LABEL: isnan_d_fpclass:1508; RV64I: # %bb.0:1509; RV64I-NEXT: slli a0, a0, 11510; RV64I-NEXT: li a1, 20471511; RV64I-NEXT: srli a0, a0, 11512; RV64I-NEXT: slli a1, a1, 521513; RV64I-NEXT: slt a0, a1, a01514; RV64I-NEXT: ret1515 %1 = call i1 @llvm.is.fpclass.f64(double %x, i32 3) ; nan1516 ret i1 %11517}1518 1519define double @tan_f64(double %a) nounwind {1520; CHECKIFD-LABEL: tan_f64:1521; CHECKIFD: # %bb.0:1522; CHECKIFD-NEXT: tail tan1523;1524; RV32IZFINXZDINX-LABEL: tan_f64:1525; RV32IZFINXZDINX: # %bb.0:1526; RV32IZFINXZDINX-NEXT: addi sp, sp, -161527; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1528; RV32IZFINXZDINX-NEXT: call tan1529; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1530; RV32IZFINXZDINX-NEXT: addi sp, sp, 161531; RV32IZFINXZDINX-NEXT: ret1532;1533; RV64IZFINXZDINX-LABEL: tan_f64:1534; RV64IZFINXZDINX: # %bb.0:1535; RV64IZFINXZDINX-NEXT: tail tan1536;1537; RV32I-LABEL: tan_f64:1538; RV32I: # %bb.0:1539; RV32I-NEXT: addi sp, sp, -161540; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1541; RV32I-NEXT: call tan1542; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1543; RV32I-NEXT: addi sp, sp, 161544; RV32I-NEXT: ret1545;1546; RV64I-LABEL: tan_f64:1547; RV64I: # %bb.0:1548; RV64I-NEXT: addi sp, sp, -161549; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1550; RV64I-NEXT: call tan1551; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1552; RV64I-NEXT: addi sp, sp, 161553; RV64I-NEXT: ret1554 %1 = call double @llvm.tan.f64(double %a)1555 ret double %11556}1557 1558define double @maximumnum_double(double %x, double %y) {1559; CHECKIFD-LABEL: maximumnum_double:1560; CHECKIFD: # %bb.0:1561; CHECKIFD-NEXT: fmax.d fa0, fa0, fa11562; CHECKIFD-NEXT: ret1563;1564; RV32IZFINXZDINX-LABEL: maximumnum_double:1565; RV32IZFINXZDINX: # %bb.0:1566; RV32IZFINXZDINX-NEXT: fmax.d a0, a0, a21567; RV32IZFINXZDINX-NEXT: ret1568;1569; RV64IZFINXZDINX-LABEL: maximumnum_double:1570; RV64IZFINXZDINX: # %bb.0:1571; RV64IZFINXZDINX-NEXT: fmax.d a0, a0, a11572; RV64IZFINXZDINX-NEXT: ret1573;1574; RV32I-LABEL: maximumnum_double:1575; RV32I: # %bb.0:1576; RV32I-NEXT: addi sp, sp, -161577; RV32I-NEXT: .cfi_def_cfa_offset 161578; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1579; RV32I-NEXT: .cfi_offset ra, -41580; RV32I-NEXT: call fmaximum_num1581; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1582; RV32I-NEXT: .cfi_restore ra1583; RV32I-NEXT: addi sp, sp, 161584; RV32I-NEXT: .cfi_def_cfa_offset 01585; RV32I-NEXT: ret1586;1587; RV64I-LABEL: maximumnum_double:1588; RV64I: # %bb.0:1589; RV64I-NEXT: addi sp, sp, -161590; RV64I-NEXT: .cfi_def_cfa_offset 161591; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1592; RV64I-NEXT: .cfi_offset ra, -81593; RV64I-NEXT: call fmaximum_num1594; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1595; RV64I-NEXT: .cfi_restore ra1596; RV64I-NEXT: addi sp, sp, 161597; RV64I-NEXT: .cfi_def_cfa_offset 01598; RV64I-NEXT: ret1599 %z = call double @llvm.maximumnum.f64(double %x, double %y)1600 ret double %z1601}1602 1603define double @minimumnum_double(double %x, double %y) {1604; CHECKIFD-LABEL: minimumnum_double:1605; CHECKIFD: # %bb.0:1606; CHECKIFD-NEXT: fmin.d fa0, fa0, fa11607; CHECKIFD-NEXT: ret1608;1609; RV32IZFINXZDINX-LABEL: minimumnum_double:1610; RV32IZFINXZDINX: # %bb.0:1611; RV32IZFINXZDINX-NEXT: fmin.d a0, a0, a21612; RV32IZFINXZDINX-NEXT: ret1613;1614; RV64IZFINXZDINX-LABEL: minimumnum_double:1615; RV64IZFINXZDINX: # %bb.0:1616; RV64IZFINXZDINX-NEXT: fmin.d a0, a0, a11617; RV64IZFINXZDINX-NEXT: ret1618;1619; RV32I-LABEL: minimumnum_double:1620; RV32I: # %bb.0:1621; RV32I-NEXT: addi sp, sp, -161622; RV32I-NEXT: .cfi_def_cfa_offset 161623; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1624; RV32I-NEXT: .cfi_offset ra, -41625; RV32I-NEXT: call fminimum_num1626; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1627; RV32I-NEXT: .cfi_restore ra1628; RV32I-NEXT: addi sp, sp, 161629; RV32I-NEXT: .cfi_def_cfa_offset 01630; RV32I-NEXT: ret1631;1632; RV64I-LABEL: minimumnum_double:1633; RV64I: # %bb.0:1634; RV64I-NEXT: addi sp, sp, -161635; RV64I-NEXT: .cfi_def_cfa_offset 161636; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1637; RV64I-NEXT: .cfi_offset ra, -81638; RV64I-NEXT: call fminimum_num1639; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1640; RV64I-NEXT: .cfi_restore ra1641; RV64I-NEXT: addi sp, sp, 161642; RV64I-NEXT: .cfi_def_cfa_offset 01643; RV64I-NEXT: ret1644 %z = call double @llvm.minimumnum.f64(double %x, double %y)1645 ret double %z1646}1647 1648define double @ldexp_double(double %x, i32 signext %y) nounwind {1649; RV32IFD-LABEL: ldexp_double:1650; RV32IFD: # %bb.0:1651; RV32IFD-NEXT: tail ldexp1652;1653; RV64IFD-LABEL: ldexp_double:1654; RV64IFD: # %bb.0:1655; RV64IFD-NEXT: addi sp, sp, -161656; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1657; RV64IFD-NEXT: call ldexp1658; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1659; RV64IFD-NEXT: addi sp, sp, 161660; RV64IFD-NEXT: ret1661;1662; RV32IZFINXZDINX-LABEL: ldexp_double:1663; RV32IZFINXZDINX: # %bb.0:1664; RV32IZFINXZDINX-NEXT: addi sp, sp, -161665; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1666; RV32IZFINXZDINX-NEXT: call ldexp1667; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1668; RV32IZFINXZDINX-NEXT: addi sp, sp, 161669; RV32IZFINXZDINX-NEXT: ret1670;1671; RV64IZFINXZDINX-LABEL: ldexp_double:1672; RV64IZFINXZDINX: # %bb.0:1673; RV64IZFINXZDINX-NEXT: addi sp, sp, -161674; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1675; RV64IZFINXZDINX-NEXT: call ldexp1676; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1677; RV64IZFINXZDINX-NEXT: addi sp, sp, 161678; RV64IZFINXZDINX-NEXT: ret1679;1680; RV32I-LABEL: ldexp_double:1681; RV32I: # %bb.0:1682; RV32I-NEXT: addi sp, sp, -161683; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1684; RV32I-NEXT: call ldexp1685; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1686; RV32I-NEXT: addi sp, sp, 161687; RV32I-NEXT: ret1688;1689; RV64I-LABEL: ldexp_double:1690; RV64I: # %bb.0:1691; RV64I-NEXT: addi sp, sp, -161692; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1693; RV64I-NEXT: call ldexp1694; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1695; RV64I-NEXT: addi sp, sp, 161696; RV64I-NEXT: ret1697 %z = call double @llvm.ldexp.f64.i32(double %x, i32 %y)1698 ret double %z1699}1700 1701define {double, i32} @frexp_double(double %x) nounwind {1702; RV32IFD-LABEL: frexp_double:1703; RV32IFD: # %bb.0:1704; RV32IFD-NEXT: addi sp, sp, -161705; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1706; RV32IFD-NEXT: addi a0, sp, 81707; RV32IFD-NEXT: call frexp1708; RV32IFD-NEXT: lw a0, 8(sp)1709; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1710; RV32IFD-NEXT: addi sp, sp, 161711; RV32IFD-NEXT: ret1712;1713; RV64IFD-LABEL: frexp_double:1714; RV64IFD: # %bb.0:1715; RV64IFD-NEXT: addi sp, sp, -161716; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1717; RV64IFD-NEXT: mv a0, sp1718; RV64IFD-NEXT: call frexp1719; RV64IFD-NEXT: ld a0, 0(sp)1720; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1721; RV64IFD-NEXT: addi sp, sp, 161722; RV64IFD-NEXT: ret1723;1724; RV32IZFINXZDINX-LABEL: frexp_double:1725; RV32IZFINXZDINX: # %bb.0:1726; RV32IZFINXZDINX-NEXT: addi sp, sp, -161727; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1728; RV32IZFINXZDINX-NEXT: addi a2, sp, 81729; RV32IZFINXZDINX-NEXT: call frexp1730; RV32IZFINXZDINX-NEXT: lw a2, 8(sp)1731; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1732; RV32IZFINXZDINX-NEXT: addi sp, sp, 161733; RV32IZFINXZDINX-NEXT: ret1734;1735; RV64IZFINXZDINX-LABEL: frexp_double:1736; RV64IZFINXZDINX: # %bb.0:1737; RV64IZFINXZDINX-NEXT: addi sp, sp, -161738; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1739; RV64IZFINXZDINX-NEXT: mv a1, sp1740; RV64IZFINXZDINX-NEXT: call frexp1741; RV64IZFINXZDINX-NEXT: ld a1, 0(sp)1742; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1743; RV64IZFINXZDINX-NEXT: addi sp, sp, 161744; RV64IZFINXZDINX-NEXT: ret1745;1746; RV32I-LABEL: frexp_double:1747; RV32I: # %bb.0:1748; RV32I-NEXT: addi sp, sp, -161749; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1750; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1751; RV32I-NEXT: mv a3, a21752; RV32I-NEXT: mv s0, a01753; RV32I-NEXT: addi a2, sp, 41754; RV32I-NEXT: mv a0, a11755; RV32I-NEXT: mv a1, a31756; RV32I-NEXT: call frexp1757; RV32I-NEXT: lw a2, 4(sp)1758; RV32I-NEXT: sw a0, 0(s0)1759; RV32I-NEXT: sw a1, 4(s0)1760; RV32I-NEXT: sw a2, 8(s0)1761; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1762; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1763; RV32I-NEXT: addi sp, sp, 161764; RV32I-NEXT: ret1765;1766; RV64I-LABEL: frexp_double:1767; RV64I: # %bb.0:1768; RV64I-NEXT: addi sp, sp, -161769; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1770; RV64I-NEXT: addi a1, sp, 41771; RV64I-NEXT: call frexp1772; RV64I-NEXT: lw a1, 4(sp)1773; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1774; RV64I-NEXT: addi sp, sp, 161775; RV64I-NEXT: ret1776 %a = call {double, i32} @llvm.frexp.f64.i32(double %x)1777 ret {double, i32} %a1778}1779 1780define double @asin_f64(double %a) nounwind {1781; CHECKIFD-LABEL: asin_f64:1782; CHECKIFD: # %bb.0:1783; CHECKIFD-NEXT: tail asin1784;1785; RV32IZFINXZDINX-LABEL: asin_f64:1786; RV32IZFINXZDINX: # %bb.0:1787; RV32IZFINXZDINX-NEXT: addi sp, sp, -161788; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1789; RV32IZFINXZDINX-NEXT: call asin1790; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1791; RV32IZFINXZDINX-NEXT: addi sp, sp, 161792; RV32IZFINXZDINX-NEXT: ret1793;1794; RV64IZFINXZDINX-LABEL: asin_f64:1795; RV64IZFINXZDINX: # %bb.0:1796; RV64IZFINXZDINX-NEXT: tail asin1797;1798; RV32I-LABEL: asin_f64:1799; RV32I: # %bb.0:1800; RV32I-NEXT: addi sp, sp, -161801; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1802; RV32I-NEXT: call asin1803; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1804; RV32I-NEXT: addi sp, sp, 161805; RV32I-NEXT: ret1806;1807; RV64I-LABEL: asin_f64:1808; RV64I: # %bb.0:1809; RV64I-NEXT: addi sp, sp, -161810; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1811; RV64I-NEXT: call asin1812; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1813; RV64I-NEXT: addi sp, sp, 161814; RV64I-NEXT: ret1815 %1 = call double @llvm.asin.f64(double %a)1816 ret double %11817}1818 1819define double @acos_f64(double %a) nounwind {1820; CHECKIFD-LABEL: acos_f64:1821; CHECKIFD: # %bb.0:1822; CHECKIFD-NEXT: tail acos1823;1824; RV32IZFINXZDINX-LABEL: acos_f64:1825; RV32IZFINXZDINX: # %bb.0:1826; RV32IZFINXZDINX-NEXT: addi sp, sp, -161827; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1828; RV32IZFINXZDINX-NEXT: call acos1829; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1830; RV32IZFINXZDINX-NEXT: addi sp, sp, 161831; RV32IZFINXZDINX-NEXT: ret1832;1833; RV64IZFINXZDINX-LABEL: acos_f64:1834; RV64IZFINXZDINX: # %bb.0:1835; RV64IZFINXZDINX-NEXT: tail acos1836;1837; RV32I-LABEL: acos_f64:1838; RV32I: # %bb.0:1839; RV32I-NEXT: addi sp, sp, -161840; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1841; RV32I-NEXT: call acos1842; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1843; RV32I-NEXT: addi sp, sp, 161844; RV32I-NEXT: ret1845;1846; RV64I-LABEL: acos_f64:1847; RV64I: # %bb.0:1848; RV64I-NEXT: addi sp, sp, -161849; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1850; RV64I-NEXT: call acos1851; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1852; RV64I-NEXT: addi sp, sp, 161853; RV64I-NEXT: ret1854 %1 = call double @llvm.acos.f64(double %a)1855 ret double %11856}1857 1858define double @atan_f64(double %a) nounwind {1859; CHECKIFD-LABEL: atan_f64:1860; CHECKIFD: # %bb.0:1861; CHECKIFD-NEXT: tail atan1862;1863; RV32IZFINXZDINX-LABEL: atan_f64:1864; RV32IZFINXZDINX: # %bb.0:1865; RV32IZFINXZDINX-NEXT: addi sp, sp, -161866; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1867; RV32IZFINXZDINX-NEXT: call atan1868; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1869; RV32IZFINXZDINX-NEXT: addi sp, sp, 161870; RV32IZFINXZDINX-NEXT: ret1871;1872; RV64IZFINXZDINX-LABEL: atan_f64:1873; RV64IZFINXZDINX: # %bb.0:1874; RV64IZFINXZDINX-NEXT: tail atan1875;1876; RV32I-LABEL: atan_f64:1877; RV32I: # %bb.0:1878; RV32I-NEXT: addi sp, sp, -161879; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1880; RV32I-NEXT: call atan1881; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1882; RV32I-NEXT: addi sp, sp, 161883; RV32I-NEXT: ret1884;1885; RV64I-LABEL: atan_f64:1886; RV64I: # %bb.0:1887; RV64I-NEXT: addi sp, sp, -161888; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1889; RV64I-NEXT: call atan1890; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1891; RV64I-NEXT: addi sp, sp, 161892; RV64I-NEXT: ret1893 %1 = call double @llvm.atan.f64(double %a)1894 ret double %11895}1896 1897define double @atan2_f64(double %a, double %b) nounwind {1898; CHECKIFD-LABEL: atan2_f64:1899; CHECKIFD: # %bb.0:1900; CHECKIFD-NEXT: tail atan21901;1902; RV32IZFINXZDINX-LABEL: atan2_f64:1903; RV32IZFINXZDINX: # %bb.0:1904; RV32IZFINXZDINX-NEXT: addi sp, sp, -161905; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1906; RV32IZFINXZDINX-NEXT: call atan21907; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1908; RV32IZFINXZDINX-NEXT: addi sp, sp, 161909; RV32IZFINXZDINX-NEXT: ret1910;1911; RV64IZFINXZDINX-LABEL: atan2_f64:1912; RV64IZFINXZDINX: # %bb.0:1913; RV64IZFINXZDINX-NEXT: tail atan21914;1915; RV32I-LABEL: atan2_f64:1916; RV32I: # %bb.0:1917; RV32I-NEXT: addi sp, sp, -161918; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1919; RV32I-NEXT: call atan21920; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1921; RV32I-NEXT: addi sp, sp, 161922; RV32I-NEXT: ret1923;1924; RV64I-LABEL: atan2_f64:1925; RV64I: # %bb.0:1926; RV64I-NEXT: addi sp, sp, -161927; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1928; RV64I-NEXT: call atan21929; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1930; RV64I-NEXT: addi sp, sp, 161931; RV64I-NEXT: ret1932 %1 = call double @llvm.atan2.f64(double %a, double %b)1933 ret double %11934}1935 1936define double @sinh_f64(double %a) nounwind {1937; CHECKIFD-LABEL: sinh_f64:1938; CHECKIFD: # %bb.0:1939; CHECKIFD-NEXT: tail sinh1940;1941; RV32IZFINXZDINX-LABEL: sinh_f64:1942; RV32IZFINXZDINX: # %bb.0:1943; RV32IZFINXZDINX-NEXT: addi sp, sp, -161944; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1945; RV32IZFINXZDINX-NEXT: call sinh1946; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1947; RV32IZFINXZDINX-NEXT: addi sp, sp, 161948; RV32IZFINXZDINX-NEXT: ret1949;1950; RV64IZFINXZDINX-LABEL: sinh_f64:1951; RV64IZFINXZDINX: # %bb.0:1952; RV64IZFINXZDINX-NEXT: tail sinh1953;1954; RV32I-LABEL: sinh_f64:1955; RV32I: # %bb.0:1956; RV32I-NEXT: addi sp, sp, -161957; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1958; RV32I-NEXT: call sinh1959; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1960; RV32I-NEXT: addi sp, sp, 161961; RV32I-NEXT: ret1962;1963; RV64I-LABEL: sinh_f64:1964; RV64I: # %bb.0:1965; RV64I-NEXT: addi sp, sp, -161966; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1967; RV64I-NEXT: call sinh1968; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1969; RV64I-NEXT: addi sp, sp, 161970; RV64I-NEXT: ret1971 %1 = call double @llvm.sinh.f64(double %a)1972 ret double %11973}1974 1975define double @cosh_f64(double %a) nounwind {1976; CHECKIFD-LABEL: cosh_f64:1977; CHECKIFD: # %bb.0:1978; CHECKIFD-NEXT: tail cosh1979;1980; RV32IZFINXZDINX-LABEL: cosh_f64:1981; RV32IZFINXZDINX: # %bb.0:1982; RV32IZFINXZDINX-NEXT: addi sp, sp, -161983; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1984; RV32IZFINXZDINX-NEXT: call cosh1985; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1986; RV32IZFINXZDINX-NEXT: addi sp, sp, 161987; RV32IZFINXZDINX-NEXT: ret1988;1989; RV64IZFINXZDINX-LABEL: cosh_f64:1990; RV64IZFINXZDINX: # %bb.0:1991; RV64IZFINXZDINX-NEXT: tail cosh1992;1993; RV32I-LABEL: cosh_f64:1994; RV32I: # %bb.0:1995; RV32I-NEXT: addi sp, sp, -161996; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1997; RV32I-NEXT: call cosh1998; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1999; RV32I-NEXT: addi sp, sp, 162000; RV32I-NEXT: ret2001;2002; RV64I-LABEL: cosh_f64:2003; RV64I: # %bb.0:2004; RV64I-NEXT: addi sp, sp, -162005; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2006; RV64I-NEXT: call cosh2007; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2008; RV64I-NEXT: addi sp, sp, 162009; RV64I-NEXT: ret2010 %1 = call double @llvm.cosh.f64(double %a)2011 ret double %12012}2013 2014define double @tanh_f64(double %a) nounwind {2015; CHECKIFD-LABEL: tanh_f64:2016; CHECKIFD: # %bb.0:2017; CHECKIFD-NEXT: tail tanh2018;2019; RV32IZFINXZDINX-LABEL: tanh_f64:2020; RV32IZFINXZDINX: # %bb.0:2021; RV32IZFINXZDINX-NEXT: addi sp, sp, -162022; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2023; RV32IZFINXZDINX-NEXT: call tanh2024; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2025; RV32IZFINXZDINX-NEXT: addi sp, sp, 162026; RV32IZFINXZDINX-NEXT: ret2027;2028; RV64IZFINXZDINX-LABEL: tanh_f64:2029; RV64IZFINXZDINX: # %bb.0:2030; RV64IZFINXZDINX-NEXT: tail tanh2031;2032; RV32I-LABEL: tanh_f64:2033; RV32I: # %bb.0:2034; RV32I-NEXT: addi sp, sp, -162035; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2036; RV32I-NEXT: call tanh2037; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2038; RV32I-NEXT: addi sp, sp, 162039; RV32I-NEXT: ret2040;2041; RV64I-LABEL: tanh_f64:2042; RV64I: # %bb.0:2043; RV64I-NEXT: addi sp, sp, -162044; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2045; RV64I-NEXT: call tanh2046; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2047; RV64I-NEXT: addi sp, sp, 162048; RV64I-NEXT: ret2049 %1 = call double @llvm.tanh.f64(double %a)2050 ret double %12051}2052 2053define { double, double } @test_modf_f64(double %a) nounwind {2054; RV32IFD-LABEL: test_modf_f64:2055; RV32IFD: # %bb.0:2056; RV32IFD-NEXT: addi sp, sp, -162057; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2058; RV32IFD-NEXT: mv a0, sp2059; RV32IFD-NEXT: call modf2060; RV32IFD-NEXT: fld fa1, 0(sp)2061; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2062; RV32IFD-NEXT: addi sp, sp, 162063; RV32IFD-NEXT: ret2064;2065; RV64IFD-LABEL: test_modf_f64:2066; RV64IFD: # %bb.0:2067; RV64IFD-NEXT: addi sp, sp, -162068; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2069; RV64IFD-NEXT: mv a0, sp2070; RV64IFD-NEXT: call modf2071; RV64IFD-NEXT: fld fa1, 0(sp)2072; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2073; RV64IFD-NEXT: addi sp, sp, 162074; RV64IFD-NEXT: ret2075;2076; RV32IZFINXZDINX-LABEL: test_modf_f64:2077; RV32IZFINXZDINX: # %bb.0:2078; RV32IZFINXZDINX-NEXT: addi sp, sp, -162079; RV32IZFINXZDINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2080; RV32IZFINXZDINX-NEXT: mv a2, sp2081; RV32IZFINXZDINX-NEXT: call modf2082; RV32IZFINXZDINX-NEXT: lw a2, 0(sp)2083; RV32IZFINXZDINX-NEXT: lw a3, 4(sp)2084; RV32IZFINXZDINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2085; RV32IZFINXZDINX-NEXT: addi sp, sp, 162086; RV32IZFINXZDINX-NEXT: ret2087;2088; RV64IZFINXZDINX-LABEL: test_modf_f64:2089; RV64IZFINXZDINX: # %bb.0:2090; RV64IZFINXZDINX-NEXT: addi sp, sp, -162091; RV64IZFINXZDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2092; RV64IZFINXZDINX-NEXT: mv a1, sp2093; RV64IZFINXZDINX-NEXT: call modf2094; RV64IZFINXZDINX-NEXT: ld a1, 0(sp)2095; RV64IZFINXZDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2096; RV64IZFINXZDINX-NEXT: addi sp, sp, 162097; RV64IZFINXZDINX-NEXT: ret2098;2099; RV32I-LABEL: test_modf_f64:2100; RV32I: # %bb.0:2101; RV32I-NEXT: addi sp, sp, -162102; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2103; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill2104; RV32I-NEXT: mv a3, a22105; RV32I-NEXT: mv s0, a02106; RV32I-NEXT: mv a2, sp2107; RV32I-NEXT: mv a0, a12108; RV32I-NEXT: mv a1, a32109; RV32I-NEXT: call modf2110; RV32I-NEXT: lw a2, 0(sp)2111; RV32I-NEXT: lw a3, 4(sp)2112; RV32I-NEXT: sw a0, 0(s0)2113; RV32I-NEXT: sw a1, 4(s0)2114; RV32I-NEXT: sw a2, 8(s0)2115; RV32I-NEXT: sw a3, 12(s0)2116; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2117; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload2118; RV32I-NEXT: addi sp, sp, 162119; RV32I-NEXT: ret2120;2121; RV64I-LABEL: test_modf_f64:2122; RV64I: # %bb.0:2123; RV64I-NEXT: addi sp, sp, -162124; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2125; RV64I-NEXT: mv a1, sp2126; RV64I-NEXT: call modf2127; RV64I-NEXT: ld a1, 0(sp)2128; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2129; RV64I-NEXT: addi sp, sp, 162130; RV64I-NEXT: ret2131 %result = call { double, double } @llvm.modf.f64(double %a)2132 ret { double, double } %result2133}2134