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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+f -target-abi=ilp32 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32F %s4; RUN: llc -mtriple=riscv32 -mattr=+zfinx -target-abi=ilp32 -verify-machineinstrs < %s \5; RUN: | FileCheck -check-prefix=RV32ZFINX %s6; RUN: llc -mtriple=riscv32 -mattr=+f,+d -target-abi=ilp32 -verify-machineinstrs < %s \7; RUN: | FileCheck -check-prefix=RV32FD %s8; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi=lp64 -verify-machineinstrs < %s \9; RUN: | FileCheck -check-prefix=RV64F %s10; RUN: llc -mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs < %s \11; RUN: | FileCheck -check-prefix=RV64ZFINX %s12; RUN: llc -mtriple=riscv64 -mattr=+f,+d -target-abi=lp64 -verify-machineinstrs < %s \13; RUN: | FileCheck -check-prefix=RV64FD %s14 15; These functions perform extra work to ensure that `%a3` starts in a16; floating-point register, if the machine has them, and the result of17; the bitwise operation is then needed in a floating-point register.18; This should mean the optimisations will fire even if you're using the19; soft-float ABI on a machine with hardware floating-point support.20 21define float @bitcast_and(float %a1, float %a2) nounwind {22; RV32F-LABEL: bitcast_and:23; RV32F: # %bb.0:24; RV32F-NEXT: fmv.w.x fa5, a125; RV32F-NEXT: fmv.w.x fa4, a026; RV32F-NEXT: fadd.s fa5, fa4, fa527; RV32F-NEXT: fabs.s fa5, fa528; RV32F-NEXT: fadd.s fa5, fa4, fa529; RV32F-NEXT: fmv.x.w a0, fa530; RV32F-NEXT: ret31;32; RV32ZFINX-LABEL: bitcast_and:33; RV32ZFINX: # %bb.0:34; RV32ZFINX-NEXT: fadd.s a1, a0, a135; RV32ZFINX-NEXT: fabs.s a1, a136; RV32ZFINX-NEXT: fadd.s a0, a0, a137; RV32ZFINX-NEXT: ret38;39; RV32FD-LABEL: bitcast_and:40; RV32FD: # %bb.0:41; RV32FD-NEXT: fmv.w.x fa5, a142; RV32FD-NEXT: fmv.w.x fa4, a043; RV32FD-NEXT: fadd.s fa5, fa4, fa544; RV32FD-NEXT: fabs.s fa5, fa545; RV32FD-NEXT: fadd.s fa5, fa4, fa546; RV32FD-NEXT: fmv.x.w a0, fa547; RV32FD-NEXT: ret48;49; RV64F-LABEL: bitcast_and:50; RV64F: # %bb.0:51; RV64F-NEXT: fmv.w.x fa5, a152; RV64F-NEXT: fmv.w.x fa4, a053; RV64F-NEXT: fadd.s fa5, fa4, fa554; RV64F-NEXT: fabs.s fa5, fa555; RV64F-NEXT: fadd.s fa5, fa4, fa556; RV64F-NEXT: fmv.x.w a0, fa557; RV64F-NEXT: ret58;59; RV64ZFINX-LABEL: bitcast_and:60; RV64ZFINX: # %bb.0:61; RV64ZFINX-NEXT: fadd.s a1, a0, a162; RV64ZFINX-NEXT: fabs.s a1, a163; RV64ZFINX-NEXT: fadd.s a0, a0, a164; RV64ZFINX-NEXT: ret65;66; RV64FD-LABEL: bitcast_and:67; RV64FD: # %bb.0:68; RV64FD-NEXT: fmv.w.x fa5, a169; RV64FD-NEXT: fmv.w.x fa4, a070; RV64FD-NEXT: fadd.s fa5, fa4, fa571; RV64FD-NEXT: fabs.s fa5, fa572; RV64FD-NEXT: fadd.s fa5, fa4, fa573; RV64FD-NEXT: fmv.x.w a0, fa574; RV64FD-NEXT: ret75 %a3 = fadd float %a1, %a276 %bc1 = bitcast float %a3 to i3277 %and = and i32 %bc1, 214748364778 %bc2 = bitcast i32 %and to float79 %a4 = fadd float %a1, %bc280 ret float %a481}82 83define double @bitcast_double_and(double %a1, double %a2) nounwind {84; RV32F-LABEL: bitcast_double_and:85; RV32F: # %bb.0:86; RV32F-NEXT: addi sp, sp, -1687; RV32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill88; RV32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill89; RV32F-NEXT: sw s1, 4(sp) # 4-byte Folded Spill90; RV32F-NEXT: mv s0, a191; RV32F-NEXT: mv s1, a092; RV32F-NEXT: call __adddf393; RV32F-NEXT: mv a2, a094; RV32F-NEXT: slli a1, a1, 195; RV32F-NEXT: srli a3, a1, 196; RV32F-NEXT: mv a0, s197; RV32F-NEXT: mv a1, s098; RV32F-NEXT: call __adddf399; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload100; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload101; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload102; RV32F-NEXT: addi sp, sp, 16103; RV32F-NEXT: ret104;105; RV32ZFINX-LABEL: bitcast_double_and:106; RV32ZFINX: # %bb.0:107; RV32ZFINX-NEXT: addi sp, sp, -16108; RV32ZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill109; RV32ZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill110; RV32ZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill111; RV32ZFINX-NEXT: mv s0, a1112; RV32ZFINX-NEXT: mv s1, a0113; RV32ZFINX-NEXT: call __adddf3114; RV32ZFINX-NEXT: mv a2, a0115; RV32ZFINX-NEXT: slli a1, a1, 1116; RV32ZFINX-NEXT: srli a3, a1, 1117; RV32ZFINX-NEXT: mv a0, s1118; RV32ZFINX-NEXT: mv a1, s0119; RV32ZFINX-NEXT: call __adddf3120; RV32ZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload121; RV32ZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload122; RV32ZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload123; RV32ZFINX-NEXT: addi sp, sp, 16124; RV32ZFINX-NEXT: ret125;126; RV32FD-LABEL: bitcast_double_and:127; RV32FD: # %bb.0:128; RV32FD-NEXT: addi sp, sp, -16129; RV32FD-NEXT: sw a2, 8(sp)130; RV32FD-NEXT: sw a3, 12(sp)131; RV32FD-NEXT: fld fa5, 8(sp)132; RV32FD-NEXT: sw a0, 8(sp)133; RV32FD-NEXT: sw a1, 12(sp)134; RV32FD-NEXT: fld fa4, 8(sp)135; RV32FD-NEXT: fadd.d fa5, fa4, fa5136; RV32FD-NEXT: fabs.d fa5, fa5137; RV32FD-NEXT: fadd.d fa5, fa4, fa5138; RV32FD-NEXT: fsd fa5, 8(sp)139; RV32FD-NEXT: lw a0, 8(sp)140; RV32FD-NEXT: lw a1, 12(sp)141; RV32FD-NEXT: addi sp, sp, 16142; RV32FD-NEXT: ret143;144; RV64F-LABEL: bitcast_double_and:145; RV64F: # %bb.0:146; RV64F-NEXT: addi sp, sp, -16147; RV64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill148; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill149; RV64F-NEXT: mv s0, a0150; RV64F-NEXT: call __adddf3151; RV64F-NEXT: slli a0, a0, 1152; RV64F-NEXT: srli a1, a0, 1153; RV64F-NEXT: mv a0, s0154; RV64F-NEXT: call __adddf3155; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload156; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload157; RV64F-NEXT: addi sp, sp, 16158; RV64F-NEXT: ret159;160; RV64ZFINX-LABEL: bitcast_double_and:161; RV64ZFINX: # %bb.0:162; RV64ZFINX-NEXT: addi sp, sp, -16163; RV64ZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill164; RV64ZFINX-NEXT: sd s0, 0(sp) # 8-byte Folded Spill165; RV64ZFINX-NEXT: mv s0, a0166; RV64ZFINX-NEXT: call __adddf3167; RV64ZFINX-NEXT: slli a0, a0, 1168; RV64ZFINX-NEXT: srli a1, a0, 1169; RV64ZFINX-NEXT: mv a0, s0170; RV64ZFINX-NEXT: call __adddf3171; RV64ZFINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload172; RV64ZFINX-NEXT: ld s0, 0(sp) # 8-byte Folded Reload173; RV64ZFINX-NEXT: addi sp, sp, 16174; RV64ZFINX-NEXT: ret175;176; RV64FD-LABEL: bitcast_double_and:177; RV64FD: # %bb.0:178; RV64FD-NEXT: fmv.d.x fa5, a1179; RV64FD-NEXT: fmv.d.x fa4, a0180; RV64FD-NEXT: fadd.d fa5, fa4, fa5181; RV64FD-NEXT: fabs.d fa5, fa5182; RV64FD-NEXT: fadd.d fa5, fa4, fa5183; RV64FD-NEXT: fmv.x.d a0, fa5184; RV64FD-NEXT: ret185 %a3 = fadd double %a1, %a2186 %bc1 = bitcast double %a3 to i64187 %and = and i64 %bc1, 9223372036854775807188 %bc2 = bitcast i64 %and to double189 %a4 = fadd double %a1, %bc2190 ret double %a4191}192 193 194define float @bitcast_xor(float %a1, float %a2) nounwind {195; RV32F-LABEL: bitcast_xor:196; RV32F: # %bb.0:197; RV32F-NEXT: fmv.w.x fa5, a1198; RV32F-NEXT: fmv.w.x fa4, a0199; RV32F-NEXT: fmul.s fa5, fa4, fa5200; RV32F-NEXT: fmul.s fa5, fa4, fa5201; RV32F-NEXT: fmv.x.w a0, fa5202; RV32F-NEXT: lui a1, 524288203; RV32F-NEXT: xor a0, a0, a1204; RV32F-NEXT: ret205;206; RV32ZFINX-LABEL: bitcast_xor:207; RV32ZFINX: # %bb.0:208; RV32ZFINX-NEXT: fmul.s a1, a0, a1209; RV32ZFINX-NEXT: fmul.s a0, a0, a1210; RV32ZFINX-NEXT: fneg.s a0, a0211; RV32ZFINX-NEXT: ret212;213; RV32FD-LABEL: bitcast_xor:214; RV32FD: # %bb.0:215; RV32FD-NEXT: fmv.w.x fa5, a1216; RV32FD-NEXT: fmv.w.x fa4, a0217; RV32FD-NEXT: fmul.s fa5, fa4, fa5218; RV32FD-NEXT: fmul.s fa5, fa4, fa5219; RV32FD-NEXT: fmv.x.w a0, fa5220; RV32FD-NEXT: lui a1, 524288221; RV32FD-NEXT: xor a0, a0, a1222; RV32FD-NEXT: ret223;224; RV64F-LABEL: bitcast_xor:225; RV64F: # %bb.0:226; RV64F-NEXT: fmv.w.x fa5, a1227; RV64F-NEXT: fmv.w.x fa4, a0228; RV64F-NEXT: fmul.s fa5, fa4, fa5229; RV64F-NEXT: fmul.s fa5, fa4, fa5230; RV64F-NEXT: fmv.x.w a0, fa5231; RV64F-NEXT: lui a1, 524288232; RV64F-NEXT: xor a0, a0, a1233; RV64F-NEXT: ret234;235; RV64ZFINX-LABEL: bitcast_xor:236; RV64ZFINX: # %bb.0:237; RV64ZFINX-NEXT: fmul.s a1, a0, a1238; RV64ZFINX-NEXT: fmul.s a0, a0, a1239; RV64ZFINX-NEXT: fneg.s a0, a0240; RV64ZFINX-NEXT: ret241;242; RV64FD-LABEL: bitcast_xor:243; RV64FD: # %bb.0:244; RV64FD-NEXT: fmv.w.x fa5, a1245; RV64FD-NEXT: fmv.w.x fa4, a0246; RV64FD-NEXT: fmul.s fa5, fa4, fa5247; RV64FD-NEXT: fmul.s fa5, fa4, fa5248; RV64FD-NEXT: fmv.x.w a0, fa5249; RV64FD-NEXT: lui a1, 524288250; RV64FD-NEXT: xor a0, a0, a1251; RV64FD-NEXT: ret252 %a3 = fmul float %a1, %a2253 %bc1 = bitcast float %a3 to i32254 %and = xor i32 %bc1, 2147483648255 %bc2 = bitcast i32 %and to float256 %a4 = fmul float %a1, %bc2257 ret float %a4258}259 260define double @bitcast_double_xor(double %a1, double %a2) nounwind {261; RV32F-LABEL: bitcast_double_xor:262; RV32F: # %bb.0:263; RV32F-NEXT: addi sp, sp, -16264; RV32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill265; RV32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill266; RV32F-NEXT: sw s1, 4(sp) # 4-byte Folded Spill267; RV32F-NEXT: mv s0, a1268; RV32F-NEXT: mv s1, a0269; RV32F-NEXT: call __muldf3270; RV32F-NEXT: mv a2, a0271; RV32F-NEXT: mv a3, a1272; RV32F-NEXT: mv a0, s1273; RV32F-NEXT: mv a1, s0274; RV32F-NEXT: call __muldf3275; RV32F-NEXT: lui a2, 524288276; RV32F-NEXT: xor a1, a1, a2277; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload278; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload279; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload280; RV32F-NEXT: addi sp, sp, 16281; RV32F-NEXT: ret282;283; RV32ZFINX-LABEL: bitcast_double_xor:284; RV32ZFINX: # %bb.0:285; RV32ZFINX-NEXT: addi sp, sp, -16286; RV32ZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill287; RV32ZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill288; RV32ZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill289; RV32ZFINX-NEXT: mv s0, a1290; RV32ZFINX-NEXT: mv s1, a0291; RV32ZFINX-NEXT: call __muldf3292; RV32ZFINX-NEXT: mv a2, a0293; RV32ZFINX-NEXT: mv a3, a1294; RV32ZFINX-NEXT: mv a0, s1295; RV32ZFINX-NEXT: mv a1, s0296; RV32ZFINX-NEXT: call __muldf3297; RV32ZFINX-NEXT: lui a2, 524288298; RV32ZFINX-NEXT: xor a1, a1, a2299; RV32ZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload300; RV32ZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload301; RV32ZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload302; RV32ZFINX-NEXT: addi sp, sp, 16303; RV32ZFINX-NEXT: ret304;305; RV32FD-LABEL: bitcast_double_xor:306; RV32FD: # %bb.0:307; RV32FD-NEXT: addi sp, sp, -16308; RV32FD-NEXT: sw a2, 8(sp)309; RV32FD-NEXT: sw a3, 12(sp)310; RV32FD-NEXT: fld fa5, 8(sp)311; RV32FD-NEXT: sw a0, 8(sp)312; RV32FD-NEXT: sw a1, 12(sp)313; RV32FD-NEXT: fld fa4, 8(sp)314; RV32FD-NEXT: fmul.d fa5, fa4, fa5315; RV32FD-NEXT: fmul.d fa5, fa4, fa5316; RV32FD-NEXT: fsd fa5, 8(sp)317; RV32FD-NEXT: lw a1, 12(sp)318; RV32FD-NEXT: lw a0, 8(sp)319; RV32FD-NEXT: lui a2, 524288320; RV32FD-NEXT: xor a1, a1, a2321; RV32FD-NEXT: addi sp, sp, 16322; RV32FD-NEXT: ret323;324; RV64F-LABEL: bitcast_double_xor:325; RV64F: # %bb.0:326; RV64F-NEXT: addi sp, sp, -16327; RV64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill328; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill329; RV64F-NEXT: mv s0, a0330; RV64F-NEXT: call __muldf3331; RV64F-NEXT: mv a1, a0332; RV64F-NEXT: mv a0, s0333; RV64F-NEXT: call __muldf3334; RV64F-NEXT: li a1, -1335; RV64F-NEXT: slli a1, a1, 63336; RV64F-NEXT: xor a0, a0, a1337; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload338; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload339; RV64F-NEXT: addi sp, sp, 16340; RV64F-NEXT: ret341;342; RV64ZFINX-LABEL: bitcast_double_xor:343; RV64ZFINX: # %bb.0:344; RV64ZFINX-NEXT: addi sp, sp, -16345; RV64ZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill346; RV64ZFINX-NEXT: sd s0, 0(sp) # 8-byte Folded Spill347; RV64ZFINX-NEXT: mv s0, a0348; RV64ZFINX-NEXT: call __muldf3349; RV64ZFINX-NEXT: mv a1, a0350; RV64ZFINX-NEXT: mv a0, s0351; RV64ZFINX-NEXT: call __muldf3352; RV64ZFINX-NEXT: li a1, -1353; RV64ZFINX-NEXT: slli a1, a1, 63354; RV64ZFINX-NEXT: xor a0, a0, a1355; RV64ZFINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload356; RV64ZFINX-NEXT: ld s0, 0(sp) # 8-byte Folded Reload357; RV64ZFINX-NEXT: addi sp, sp, 16358; RV64ZFINX-NEXT: ret359;360; RV64FD-LABEL: bitcast_double_xor:361; RV64FD: # %bb.0:362; RV64FD-NEXT: fmv.d.x fa5, a1363; RV64FD-NEXT: fmv.d.x fa4, a0364; RV64FD-NEXT: li a0, -1365; RV64FD-NEXT: fmul.d fa5, fa4, fa5366; RV64FD-NEXT: fmul.d fa5, fa4, fa5367; RV64FD-NEXT: fmv.x.d a1, fa5368; RV64FD-NEXT: slli a0, a0, 63369; RV64FD-NEXT: xor a0, a1, a0370; RV64FD-NEXT: ret371 %a3 = fmul double %a1, %a2372 %bc1 = bitcast double %a3 to i64373 %and = xor i64 %bc1, 9223372036854775808374 %bc2 = bitcast i64 %and to double375 %a4 = fmul double %a1, %bc2376 ret double %a4377}378 379define float @bitcast_or(float %a1, float %a2) nounwind {380; RV32F-LABEL: bitcast_or:381; RV32F: # %bb.0:382; RV32F-NEXT: fmv.w.x fa5, a1383; RV32F-NEXT: fmv.w.x fa4, a0384; RV32F-NEXT: fmul.s fa5, fa4, fa5385; RV32F-NEXT: fabs.s fa5, fa5386; RV32F-NEXT: fmul.s fa5, fa4, fa5387; RV32F-NEXT: fmv.x.w a0, fa5388; RV32F-NEXT: lui a1, 524288389; RV32F-NEXT: xor a0, a0, a1390; RV32F-NEXT: ret391;392; RV32ZFINX-LABEL: bitcast_or:393; RV32ZFINX: # %bb.0:394; RV32ZFINX-NEXT: fmul.s a1, a0, a1395; RV32ZFINX-NEXT: fabs.s a1, a1396; RV32ZFINX-NEXT: fmul.s a0, a0, a1397; RV32ZFINX-NEXT: fneg.s a0, a0398; RV32ZFINX-NEXT: ret399;400; RV32FD-LABEL: bitcast_or:401; RV32FD: # %bb.0:402; RV32FD-NEXT: fmv.w.x fa5, a1403; RV32FD-NEXT: fmv.w.x fa4, a0404; RV32FD-NEXT: fmul.s fa5, fa4, fa5405; RV32FD-NEXT: fabs.s fa5, fa5406; RV32FD-NEXT: fmul.s fa5, fa4, fa5407; RV32FD-NEXT: fmv.x.w a0, fa5408; RV32FD-NEXT: lui a1, 524288409; RV32FD-NEXT: xor a0, a0, a1410; RV32FD-NEXT: ret411;412; RV64F-LABEL: bitcast_or:413; RV64F: # %bb.0:414; RV64F-NEXT: fmv.w.x fa5, a1415; RV64F-NEXT: fmv.w.x fa4, a0416; RV64F-NEXT: fmul.s fa5, fa4, fa5417; RV64F-NEXT: fabs.s fa5, fa5418; RV64F-NEXT: fmul.s fa5, fa4, fa5419; RV64F-NEXT: fmv.x.w a0, fa5420; RV64F-NEXT: lui a1, 524288421; RV64F-NEXT: xor a0, a0, a1422; RV64F-NEXT: ret423;424; RV64ZFINX-LABEL: bitcast_or:425; RV64ZFINX: # %bb.0:426; RV64ZFINX-NEXT: fmul.s a1, a0, a1427; RV64ZFINX-NEXT: fabs.s a1, a1428; RV64ZFINX-NEXT: fmul.s a0, a0, a1429; RV64ZFINX-NEXT: fneg.s a0, a0430; RV64ZFINX-NEXT: ret431;432; RV64FD-LABEL: bitcast_or:433; RV64FD: # %bb.0:434; RV64FD-NEXT: fmv.w.x fa5, a1435; RV64FD-NEXT: fmv.w.x fa4, a0436; RV64FD-NEXT: fmul.s fa5, fa4, fa5437; RV64FD-NEXT: fabs.s fa5, fa5438; RV64FD-NEXT: fmul.s fa5, fa4, fa5439; RV64FD-NEXT: fmv.x.w a0, fa5440; RV64FD-NEXT: lui a1, 524288441; RV64FD-NEXT: xor a0, a0, a1442; RV64FD-NEXT: ret443 %a3 = fmul float %a1, %a2444 %bc1 = bitcast float %a3 to i32445 %and = or i32 %bc1, 2147483648446 %bc2 = bitcast i32 %and to float447 %a4 = fmul float %a1, %bc2448 ret float %a4449}450 451define double @bitcast_double_or(double %a1, double %a2) nounwind {452; RV32F-LABEL: bitcast_double_or:453; RV32F: # %bb.0:454; RV32F-NEXT: addi sp, sp, -16455; RV32F-NEXT: sw ra, 12(sp) # 4-byte Folded Spill456; RV32F-NEXT: sw s0, 8(sp) # 4-byte Folded Spill457; RV32F-NEXT: sw s1, 4(sp) # 4-byte Folded Spill458; RV32F-NEXT: mv s0, a1459; RV32F-NEXT: mv s1, a0460; RV32F-NEXT: call __muldf3461; RV32F-NEXT: mv a2, a0462; RV32F-NEXT: slli a1, a1, 1463; RV32F-NEXT: srli a3, a1, 1464; RV32F-NEXT: mv a0, s1465; RV32F-NEXT: mv a1, s0466; RV32F-NEXT: call __muldf3467; RV32F-NEXT: lui a2, 524288468; RV32F-NEXT: xor a1, a1, a2469; RV32F-NEXT: lw ra, 12(sp) # 4-byte Folded Reload470; RV32F-NEXT: lw s0, 8(sp) # 4-byte Folded Reload471; RV32F-NEXT: lw s1, 4(sp) # 4-byte Folded Reload472; RV32F-NEXT: addi sp, sp, 16473; RV32F-NEXT: ret474;475; RV32ZFINX-LABEL: bitcast_double_or:476; RV32ZFINX: # %bb.0:477; RV32ZFINX-NEXT: addi sp, sp, -16478; RV32ZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill479; RV32ZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill480; RV32ZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill481; RV32ZFINX-NEXT: mv s0, a1482; RV32ZFINX-NEXT: mv s1, a0483; RV32ZFINX-NEXT: call __muldf3484; RV32ZFINX-NEXT: mv a2, a0485; RV32ZFINX-NEXT: slli a1, a1, 1486; RV32ZFINX-NEXT: srli a3, a1, 1487; RV32ZFINX-NEXT: mv a0, s1488; RV32ZFINX-NEXT: mv a1, s0489; RV32ZFINX-NEXT: call __muldf3490; RV32ZFINX-NEXT: lui a2, 524288491; RV32ZFINX-NEXT: xor a1, a1, a2492; RV32ZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload493; RV32ZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload494; RV32ZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload495; RV32ZFINX-NEXT: addi sp, sp, 16496; RV32ZFINX-NEXT: ret497;498; RV32FD-LABEL: bitcast_double_or:499; RV32FD: # %bb.0:500; RV32FD-NEXT: addi sp, sp, -16501; RV32FD-NEXT: sw a2, 8(sp)502; RV32FD-NEXT: sw a3, 12(sp)503; RV32FD-NEXT: fld fa5, 8(sp)504; RV32FD-NEXT: sw a0, 8(sp)505; RV32FD-NEXT: sw a1, 12(sp)506; RV32FD-NEXT: fld fa4, 8(sp)507; RV32FD-NEXT: fmul.d fa5, fa4, fa5508; RV32FD-NEXT: fabs.d fa5, fa5509; RV32FD-NEXT: fmul.d fa5, fa4, fa5510; RV32FD-NEXT: fsd fa5, 8(sp)511; RV32FD-NEXT: lw a1, 12(sp)512; RV32FD-NEXT: lw a0, 8(sp)513; RV32FD-NEXT: lui a2, 524288514; RV32FD-NEXT: xor a1, a1, a2515; RV32FD-NEXT: addi sp, sp, 16516; RV32FD-NEXT: ret517;518; RV64F-LABEL: bitcast_double_or:519; RV64F: # %bb.0:520; RV64F-NEXT: addi sp, sp, -16521; RV64F-NEXT: sd ra, 8(sp) # 8-byte Folded Spill522; RV64F-NEXT: sd s0, 0(sp) # 8-byte Folded Spill523; RV64F-NEXT: mv s0, a0524; RV64F-NEXT: call __muldf3525; RV64F-NEXT: slli a0, a0, 1526; RV64F-NEXT: srli a1, a0, 1527; RV64F-NEXT: mv a0, s0528; RV64F-NEXT: call __muldf3529; RV64F-NEXT: li a1, -1530; RV64F-NEXT: slli a1, a1, 63531; RV64F-NEXT: xor a0, a0, a1532; RV64F-NEXT: ld ra, 8(sp) # 8-byte Folded Reload533; RV64F-NEXT: ld s0, 0(sp) # 8-byte Folded Reload534; RV64F-NEXT: addi sp, sp, 16535; RV64F-NEXT: ret536;537; RV64ZFINX-LABEL: bitcast_double_or:538; RV64ZFINX: # %bb.0:539; RV64ZFINX-NEXT: addi sp, sp, -16540; RV64ZFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill541; RV64ZFINX-NEXT: sd s0, 0(sp) # 8-byte Folded Spill542; RV64ZFINX-NEXT: mv s0, a0543; RV64ZFINX-NEXT: call __muldf3544; RV64ZFINX-NEXT: slli a0, a0, 1545; RV64ZFINX-NEXT: srli a1, a0, 1546; RV64ZFINX-NEXT: mv a0, s0547; RV64ZFINX-NEXT: call __muldf3548; RV64ZFINX-NEXT: li a1, -1549; RV64ZFINX-NEXT: slli a1, a1, 63550; RV64ZFINX-NEXT: xor a0, a0, a1551; RV64ZFINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload552; RV64ZFINX-NEXT: ld s0, 0(sp) # 8-byte Folded Reload553; RV64ZFINX-NEXT: addi sp, sp, 16554; RV64ZFINX-NEXT: ret555;556; RV64FD-LABEL: bitcast_double_or:557; RV64FD: # %bb.0:558; RV64FD-NEXT: fmv.d.x fa5, a1559; RV64FD-NEXT: fmv.d.x fa4, a0560; RV64FD-NEXT: li a0, -1561; RV64FD-NEXT: fmul.d fa5, fa4, fa5562; RV64FD-NEXT: fabs.d fa5, fa5563; RV64FD-NEXT: fmul.d fa5, fa4, fa5564; RV64FD-NEXT: fmv.x.d a1, fa5565; RV64FD-NEXT: slli a0, a0, 63566; RV64FD-NEXT: xor a0, a1, a0567; RV64FD-NEXT: ret568 %a3 = fmul double %a1, %a2569 %bc1 = bitcast double %a3 to i64570 %and = or i64 %bc1, 9223372036854775808571 %bc2 = bitcast i64 %and to double572 %a4 = fmul double %a1, %bc2573 ret double %a4574}575