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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \3; RUN: -disable-strictnode-mutation -target-abi=ilp32f \4; RUN: | FileCheck -check-prefix=CHECKIF %s5; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \6; RUN: -disable-strictnode-mutation -target-abi=lp64f \7; RUN: | FileCheck -check-prefix=CHECKIF %s8; RUN: llc -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs < %s \9; RUN: -disable-strictnode-mutation -target-abi=ilp32 \10; RUN: | FileCheck -check-prefix=CHECKIZFINX %s11; RUN: llc -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs < %s \12; RUN: -disable-strictnode-mutation -target-abi=lp64 \13; RUN: | FileCheck -check-prefix=CHECKIZFINX %s14; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \15; RUN: -disable-strictnode-mutation | FileCheck -check-prefix=RV32I %s16; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \17; RUN: -disable-strictnode-mutation | FileCheck -check-prefix=RV64I %s18 19define i32 @fcmp_oeq(float %a, float %b) nounwind strictfp {20; CHECKIF-LABEL: fcmp_oeq:21; CHECKIF: # %bb.0:22; CHECKIF-NEXT: feq.s a0, fa0, fa123; CHECKIF-NEXT: ret24;25; CHECKIZFINX-LABEL: fcmp_oeq:26; CHECKIZFINX: # %bb.0:27; CHECKIZFINX-NEXT: feq.s a0, a0, a128; CHECKIZFINX-NEXT: ret29;30; RV32I-LABEL: fcmp_oeq:31; RV32I: # %bb.0:32; RV32I-NEXT: addi sp, sp, -1633; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill34; RV32I-NEXT: call __eqsf235; RV32I-NEXT: seqz a0, a036; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload37; RV32I-NEXT: addi sp, sp, 1638; RV32I-NEXT: ret39;40; RV64I-LABEL: fcmp_oeq:41; RV64I: # %bb.0:42; RV64I-NEXT: addi sp, sp, -1643; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill44; RV64I-NEXT: call __eqsf245; RV64I-NEXT: seqz a0, a046; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload47; RV64I-NEXT: addi sp, sp, 1648; RV64I-NEXT: ret49 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"oeq", metadata !"fpexcept.strict") strictfp50 %2 = zext i1 %1 to i3251 ret i32 %252}53 54define i32 @fcmp_ogt(float %a, float %b) nounwind strictfp {55; CHECKIF-LABEL: fcmp_ogt:56; CHECKIF: # %bb.0:57; CHECKIF-NEXT: frflags a158; CHECKIF-NEXT: flt.s a0, fa1, fa059; CHECKIF-NEXT: fsflags a160; CHECKIF-NEXT: feq.s zero, fa1, fa061; CHECKIF-NEXT: ret62;63; CHECKIZFINX-LABEL: fcmp_ogt:64; CHECKIZFINX: # %bb.0:65; CHECKIZFINX-NEXT: frflags a366; CHECKIZFINX-NEXT: flt.s a2, a1, a067; CHECKIZFINX-NEXT: fsflags a368; CHECKIZFINX-NEXT: feq.s zero, a1, a069; CHECKIZFINX-NEXT: mv a0, a270; CHECKIZFINX-NEXT: ret71;72; RV32I-LABEL: fcmp_ogt:73; RV32I: # %bb.0:74; RV32I-NEXT: addi sp, sp, -1675; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill76; RV32I-NEXT: call __gtsf277; RV32I-NEXT: sgtz a0, a078; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload79; RV32I-NEXT: addi sp, sp, 1680; RV32I-NEXT: ret81;82; RV64I-LABEL: fcmp_ogt:83; RV64I: # %bb.0:84; RV64I-NEXT: addi sp, sp, -1685; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill86; RV64I-NEXT: call __gtsf287; RV64I-NEXT: sgtz a0, a088; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload89; RV64I-NEXT: addi sp, sp, 1690; RV64I-NEXT: ret91 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ogt", metadata !"fpexcept.strict") strictfp92 %2 = zext i1 %1 to i3293 ret i32 %294}95 96define i32 @fcmp_oge(float %a, float %b) nounwind strictfp {97; CHECKIF-LABEL: fcmp_oge:98; CHECKIF: # %bb.0:99; CHECKIF-NEXT: frflags a1100; CHECKIF-NEXT: fle.s a0, fa1, fa0101; CHECKIF-NEXT: fsflags a1102; CHECKIF-NEXT: feq.s zero, fa1, fa0103; CHECKIF-NEXT: ret104;105; CHECKIZFINX-LABEL: fcmp_oge:106; CHECKIZFINX: # %bb.0:107; CHECKIZFINX-NEXT: frflags a3108; CHECKIZFINX-NEXT: fle.s a2, a1, a0109; CHECKIZFINX-NEXT: fsflags a3110; CHECKIZFINX-NEXT: feq.s zero, a1, a0111; CHECKIZFINX-NEXT: mv a0, a2112; CHECKIZFINX-NEXT: ret113;114; RV32I-LABEL: fcmp_oge:115; RV32I: # %bb.0:116; RV32I-NEXT: addi sp, sp, -16117; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill118; RV32I-NEXT: call __gesf2119; RV32I-NEXT: srli a0, a0, 31120; RV32I-NEXT: xori a0, a0, 1121; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload122; RV32I-NEXT: addi sp, sp, 16123; RV32I-NEXT: ret124;125; RV64I-LABEL: fcmp_oge:126; RV64I: # %bb.0:127; RV64I-NEXT: addi sp, sp, -16128; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill129; RV64I-NEXT: call __gesf2130; RV64I-NEXT: srli a0, a0, 63131; RV64I-NEXT: xori a0, a0, 1132; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload133; RV64I-NEXT: addi sp, sp, 16134; RV64I-NEXT: ret135 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"oge", metadata !"fpexcept.strict") strictfp136 %2 = zext i1 %1 to i32137 ret i32 %2138}139 140define i32 @fcmp_olt(float %a, float %b) nounwind strictfp {141; CHECKIF-LABEL: fcmp_olt:142; CHECKIF: # %bb.0:143; CHECKIF-NEXT: frflags a1144; CHECKIF-NEXT: flt.s a0, fa0, fa1145; CHECKIF-NEXT: fsflags a1146; CHECKIF-NEXT: feq.s zero, fa0, fa1147; CHECKIF-NEXT: ret148;149; CHECKIZFINX-LABEL: fcmp_olt:150; CHECKIZFINX: # %bb.0:151; CHECKIZFINX-NEXT: frflags a3152; CHECKIZFINX-NEXT: flt.s a2, a0, a1153; CHECKIZFINX-NEXT: fsflags a3154; CHECKIZFINX-NEXT: feq.s zero, a0, a1155; CHECKIZFINX-NEXT: mv a0, a2156; CHECKIZFINX-NEXT: ret157;158; RV32I-LABEL: fcmp_olt:159; RV32I: # %bb.0:160; RV32I-NEXT: addi sp, sp, -16161; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill162; RV32I-NEXT: call __ltsf2163; RV32I-NEXT: srli a0, a0, 31164; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload165; RV32I-NEXT: addi sp, sp, 16166; RV32I-NEXT: ret167;168; RV64I-LABEL: fcmp_olt:169; RV64I: # %bb.0:170; RV64I-NEXT: addi sp, sp, -16171; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill172; RV64I-NEXT: call __ltsf2173; RV64I-NEXT: srli a0, a0, 63174; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload175; RV64I-NEXT: addi sp, sp, 16176; RV64I-NEXT: ret177 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"olt", metadata !"fpexcept.strict") strictfp178 %2 = zext i1 %1 to i32179 ret i32 %2180}181 182define i32 @fcmp_ole(float %a, float %b) nounwind strictfp {183; CHECKIF-LABEL: fcmp_ole:184; CHECKIF: # %bb.0:185; CHECKIF-NEXT: frflags a1186; CHECKIF-NEXT: fle.s a0, fa0, fa1187; CHECKIF-NEXT: fsflags a1188; CHECKIF-NEXT: feq.s zero, fa0, fa1189; CHECKIF-NEXT: ret190;191; CHECKIZFINX-LABEL: fcmp_ole:192; CHECKIZFINX: # %bb.0:193; CHECKIZFINX-NEXT: frflags a3194; CHECKIZFINX-NEXT: fle.s a2, a0, a1195; CHECKIZFINX-NEXT: fsflags a3196; CHECKIZFINX-NEXT: feq.s zero, a0, a1197; CHECKIZFINX-NEXT: mv a0, a2198; CHECKIZFINX-NEXT: ret199;200; RV32I-LABEL: fcmp_ole:201; RV32I: # %bb.0:202; RV32I-NEXT: addi sp, sp, -16203; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill204; RV32I-NEXT: call __lesf2205; RV32I-NEXT: slti a0, a0, 1206; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload207; RV32I-NEXT: addi sp, sp, 16208; RV32I-NEXT: ret209;210; RV64I-LABEL: fcmp_ole:211; RV64I: # %bb.0:212; RV64I-NEXT: addi sp, sp, -16213; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill214; RV64I-NEXT: call __lesf2215; RV64I-NEXT: slti a0, a0, 1216; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload217; RV64I-NEXT: addi sp, sp, 16218; RV64I-NEXT: ret219 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ole", metadata !"fpexcept.strict") strictfp220 %2 = zext i1 %1 to i32221 ret i32 %2222}223 224; FIXME: We only need one frflags before the two flts and one fsflags after the225; two flts.226define i32 @fcmp_one(float %a, float %b) nounwind strictfp {227; CHECKIF-LABEL: fcmp_one:228; CHECKIF: # %bb.0:229; CHECKIF-NEXT: frflags a0230; CHECKIF-NEXT: flt.s a1, fa0, fa1231; CHECKIF-NEXT: fsflags a0232; CHECKIF-NEXT: feq.s zero, fa0, fa1233; CHECKIF-NEXT: frflags a0234; CHECKIF-NEXT: flt.s a2, fa1, fa0235; CHECKIF-NEXT: fsflags a0236; CHECKIF-NEXT: or a0, a2, a1237; CHECKIF-NEXT: feq.s zero, fa1, fa0238; CHECKIF-NEXT: ret239;240; CHECKIZFINX-LABEL: fcmp_one:241; CHECKIZFINX: # %bb.0:242; CHECKIZFINX-NEXT: frflags a2243; CHECKIZFINX-NEXT: flt.s a3, a0, a1244; CHECKIZFINX-NEXT: fsflags a2245; CHECKIZFINX-NEXT: feq.s zero, a0, a1246; CHECKIZFINX-NEXT: frflags a2247; CHECKIZFINX-NEXT: flt.s a4, a1, a0248; CHECKIZFINX-NEXT: fsflags a2249; CHECKIZFINX-NEXT: or a2, a4, a3250; CHECKIZFINX-NEXT: feq.s zero, a1, a0251; CHECKIZFINX-NEXT: mv a0, a2252; CHECKIZFINX-NEXT: ret253;254; RV32I-LABEL: fcmp_one:255; RV32I: # %bb.0:256; RV32I-NEXT: addi sp, sp, -16257; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill258; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill259; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill260; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill261; RV32I-NEXT: mv s0, a1262; RV32I-NEXT: mv s1, a0263; RV32I-NEXT: call __eqsf2264; RV32I-NEXT: snez s2, a0265; RV32I-NEXT: mv a0, s1266; RV32I-NEXT: mv a1, s0267; RV32I-NEXT: call __unordsf2268; RV32I-NEXT: seqz a0, a0269; RV32I-NEXT: and a0, a0, s2270; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload271; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload272; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload273; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload274; RV32I-NEXT: addi sp, sp, 16275; RV32I-NEXT: ret276;277; RV64I-LABEL: fcmp_one:278; RV64I: # %bb.0:279; RV64I-NEXT: addi sp, sp, -32280; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill281; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill282; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill283; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill284; RV64I-NEXT: mv s0, a1285; RV64I-NEXT: mv s1, a0286; RV64I-NEXT: call __eqsf2287; RV64I-NEXT: snez s2, a0288; RV64I-NEXT: mv a0, s1289; RV64I-NEXT: mv a1, s0290; RV64I-NEXT: call __unordsf2291; RV64I-NEXT: seqz a0, a0292; RV64I-NEXT: and a0, a0, s2293; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload294; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload295; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload296; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload297; RV64I-NEXT: addi sp, sp, 32298; RV64I-NEXT: ret299 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"one", metadata !"fpexcept.strict") strictfp300 %2 = zext i1 %1 to i32301 ret i32 %2302}303 304define i32 @fcmp_ord(float %a, float %b) nounwind strictfp {305; CHECKIF-LABEL: fcmp_ord:306; CHECKIF: # %bb.0:307; CHECKIF-NEXT: feq.s a0, fa1, fa1308; CHECKIF-NEXT: feq.s a1, fa0, fa0309; CHECKIF-NEXT: and a0, a1, a0310; CHECKIF-NEXT: ret311;312; CHECKIZFINX-LABEL: fcmp_ord:313; CHECKIZFINX: # %bb.0:314; CHECKIZFINX-NEXT: feq.s a1, a1, a1315; CHECKIZFINX-NEXT: feq.s a0, a0, a0316; CHECKIZFINX-NEXT: and a0, a0, a1317; CHECKIZFINX-NEXT: ret318;319; RV32I-LABEL: fcmp_ord:320; RV32I: # %bb.0:321; RV32I-NEXT: addi sp, sp, -16322; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill323; RV32I-NEXT: call __unordsf2324; RV32I-NEXT: seqz a0, a0325; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload326; RV32I-NEXT: addi sp, sp, 16327; RV32I-NEXT: ret328;329; RV64I-LABEL: fcmp_ord:330; RV64I: # %bb.0:331; RV64I-NEXT: addi sp, sp, -16332; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill333; RV64I-NEXT: call __unordsf2334; RV64I-NEXT: seqz a0, a0335; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload336; RV64I-NEXT: addi sp, sp, 16337; RV64I-NEXT: ret338 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ord", metadata !"fpexcept.strict") strictfp339 %2 = zext i1 %1 to i32340 ret i32 %2341}342 343; FIXME: We only need one frflags before the two flts and one fsflags after the344; two flts.345define i32 @fcmp_ueq(float %a, float %b) nounwind strictfp {346; CHECKIF-LABEL: fcmp_ueq:347; CHECKIF: # %bb.0:348; CHECKIF-NEXT: frflags a0349; CHECKIF-NEXT: flt.s a1, fa0, fa1350; CHECKIF-NEXT: fsflags a0351; CHECKIF-NEXT: feq.s zero, fa0, fa1352; CHECKIF-NEXT: frflags a0353; CHECKIF-NEXT: flt.s a2, fa1, fa0354; CHECKIF-NEXT: fsflags a0355; CHECKIF-NEXT: or a1, a2, a1356; CHECKIF-NEXT: xori a0, a1, 1357; CHECKIF-NEXT: feq.s zero, fa1, fa0358; CHECKIF-NEXT: ret359;360; CHECKIZFINX-LABEL: fcmp_ueq:361; CHECKIZFINX: # %bb.0:362; CHECKIZFINX-NEXT: frflags a2363; CHECKIZFINX-NEXT: flt.s a3, a0, a1364; CHECKIZFINX-NEXT: fsflags a2365; CHECKIZFINX-NEXT: feq.s zero, a0, a1366; CHECKIZFINX-NEXT: frflags a2367; CHECKIZFINX-NEXT: flt.s a4, a1, a0368; CHECKIZFINX-NEXT: fsflags a2369; CHECKIZFINX-NEXT: or a3, a4, a3370; CHECKIZFINX-NEXT: xori a2, a3, 1371; CHECKIZFINX-NEXT: feq.s zero, a1, a0372; CHECKIZFINX-NEXT: mv a0, a2373; CHECKIZFINX-NEXT: ret374;375; RV32I-LABEL: fcmp_ueq:376; RV32I: # %bb.0:377; RV32I-NEXT: addi sp, sp, -16378; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill379; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill380; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill381; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill382; RV32I-NEXT: mv s0, a1383; RV32I-NEXT: mv s1, a0384; RV32I-NEXT: call __unordsf2385; RV32I-NEXT: mv s2, a0386; RV32I-NEXT: mv a0, s1387; RV32I-NEXT: mv a1, s0388; RV32I-NEXT: call __eqsf2389; RV32I-NEXT: seqz a0, a0390; RV32I-NEXT: or a0, s2, a0391; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload392; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload393; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload394; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload395; RV32I-NEXT: addi sp, sp, 16396; RV32I-NEXT: ret397;398; RV64I-LABEL: fcmp_ueq:399; RV64I: # %bb.0:400; RV64I-NEXT: addi sp, sp, -32401; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill402; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill403; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill404; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill405; RV64I-NEXT: mv s0, a1406; RV64I-NEXT: mv s1, a0407; RV64I-NEXT: call __unordsf2408; RV64I-NEXT: mv s2, a0409; RV64I-NEXT: mv a0, s1410; RV64I-NEXT: mv a1, s0411; RV64I-NEXT: call __eqsf2412; RV64I-NEXT: seqz a0, a0413; RV64I-NEXT: or a0, s2, a0414; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload415; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload416; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload417; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload418; RV64I-NEXT: addi sp, sp, 32419; RV64I-NEXT: ret420 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ueq", metadata !"fpexcept.strict") strictfp421 %2 = zext i1 %1 to i32422 ret i32 %2423}424 425define i32 @fcmp_ugt(float %a, float %b) nounwind strictfp {426; CHECKIF-LABEL: fcmp_ugt:427; CHECKIF: # %bb.0:428; CHECKIF-NEXT: frflags a0429; CHECKIF-NEXT: fle.s a1, fa0, fa1430; CHECKIF-NEXT: fsflags a0431; CHECKIF-NEXT: xori a0, a1, 1432; CHECKIF-NEXT: feq.s zero, fa0, fa1433; CHECKIF-NEXT: ret434;435; CHECKIZFINX-LABEL: fcmp_ugt:436; CHECKIZFINX: # %bb.0:437; CHECKIZFINX-NEXT: frflags a2438; CHECKIZFINX-NEXT: fle.s a3, a0, a1439; CHECKIZFINX-NEXT: fsflags a2440; CHECKIZFINX-NEXT: xori a2, a3, 1441; CHECKIZFINX-NEXT: feq.s zero, a0, a1442; CHECKIZFINX-NEXT: mv a0, a2443; CHECKIZFINX-NEXT: ret444;445; RV32I-LABEL: fcmp_ugt:446; RV32I: # %bb.0:447; RV32I-NEXT: addi sp, sp, -16448; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill449; RV32I-NEXT: call __lesf2450; RV32I-NEXT: sgtz a0, a0451; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload452; RV32I-NEXT: addi sp, sp, 16453; RV32I-NEXT: ret454;455; RV64I-LABEL: fcmp_ugt:456; RV64I: # %bb.0:457; RV64I-NEXT: addi sp, sp, -16458; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill459; RV64I-NEXT: call __lesf2460; RV64I-NEXT: sgtz a0, a0461; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload462; RV64I-NEXT: addi sp, sp, 16463; RV64I-NEXT: ret464 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ugt", metadata !"fpexcept.strict") strictfp465 %2 = zext i1 %1 to i32466 ret i32 %2467}468 469define i32 @fcmp_uge(float %a, float %b) nounwind strictfp {470; CHECKIF-LABEL: fcmp_uge:471; CHECKIF: # %bb.0:472; CHECKIF-NEXT: frflags a0473; CHECKIF-NEXT: flt.s a1, fa0, fa1474; CHECKIF-NEXT: fsflags a0475; CHECKIF-NEXT: xori a0, a1, 1476; CHECKIF-NEXT: feq.s zero, fa0, fa1477; CHECKIF-NEXT: ret478;479; CHECKIZFINX-LABEL: fcmp_uge:480; CHECKIZFINX: # %bb.0:481; CHECKIZFINX-NEXT: frflags a2482; CHECKIZFINX-NEXT: flt.s a3, a0, a1483; CHECKIZFINX-NEXT: fsflags a2484; CHECKIZFINX-NEXT: xori a2, a3, 1485; CHECKIZFINX-NEXT: feq.s zero, a0, a1486; CHECKIZFINX-NEXT: mv a0, a2487; CHECKIZFINX-NEXT: ret488;489; RV32I-LABEL: fcmp_uge:490; RV32I: # %bb.0:491; RV32I-NEXT: addi sp, sp, -16492; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill493; RV32I-NEXT: call __ltsf2494; RV32I-NEXT: srli a0, a0, 31495; RV32I-NEXT: xori a0, a0, 1496; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload497; RV32I-NEXT: addi sp, sp, 16498; RV32I-NEXT: ret499;500; RV64I-LABEL: fcmp_uge:501; RV64I: # %bb.0:502; RV64I-NEXT: addi sp, sp, -16503; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill504; RV64I-NEXT: call __ltsf2505; RV64I-NEXT: srli a0, a0, 63506; RV64I-NEXT: xori a0, a0, 1507; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload508; RV64I-NEXT: addi sp, sp, 16509; RV64I-NEXT: ret510 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"uge", metadata !"fpexcept.strict") strictfp511 %2 = zext i1 %1 to i32512 ret i32 %2513}514 515define i32 @fcmp_ult(float %a, float %b) nounwind strictfp {516; CHECKIF-LABEL: fcmp_ult:517; CHECKIF: # %bb.0:518; CHECKIF-NEXT: frflags a0519; CHECKIF-NEXT: fle.s a1, fa1, fa0520; CHECKIF-NEXT: fsflags a0521; CHECKIF-NEXT: xori a0, a1, 1522; CHECKIF-NEXT: feq.s zero, fa1, fa0523; CHECKIF-NEXT: ret524;525; CHECKIZFINX-LABEL: fcmp_ult:526; CHECKIZFINX: # %bb.0:527; CHECKIZFINX-NEXT: frflags a2528; CHECKIZFINX-NEXT: fle.s a3, a1, a0529; CHECKIZFINX-NEXT: fsflags a2530; CHECKIZFINX-NEXT: xori a2, a3, 1531; CHECKIZFINX-NEXT: feq.s zero, a1, a0532; CHECKIZFINX-NEXT: mv a0, a2533; CHECKIZFINX-NEXT: ret534;535; RV32I-LABEL: fcmp_ult:536; RV32I: # %bb.0:537; RV32I-NEXT: addi sp, sp, -16538; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill539; RV32I-NEXT: call __gesf2540; RV32I-NEXT: srli a0, a0, 31541; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload542; RV32I-NEXT: addi sp, sp, 16543; RV32I-NEXT: ret544;545; RV64I-LABEL: fcmp_ult:546; RV64I: # %bb.0:547; RV64I-NEXT: addi sp, sp, -16548; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill549; RV64I-NEXT: call __gesf2550; RV64I-NEXT: srli a0, a0, 63551; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload552; RV64I-NEXT: addi sp, sp, 16553; RV64I-NEXT: ret554 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ult", metadata !"fpexcept.strict") strictfp555 %2 = zext i1 %1 to i32556 ret i32 %2557}558 559define i32 @fcmp_ule(float %a, float %b) nounwind strictfp {560; CHECKIF-LABEL: fcmp_ule:561; CHECKIF: # %bb.0:562; CHECKIF-NEXT: frflags a0563; CHECKIF-NEXT: flt.s a1, fa1, fa0564; CHECKIF-NEXT: fsflags a0565; CHECKIF-NEXT: xori a0, a1, 1566; CHECKIF-NEXT: feq.s zero, fa1, fa0567; CHECKIF-NEXT: ret568;569; CHECKIZFINX-LABEL: fcmp_ule:570; CHECKIZFINX: # %bb.0:571; CHECKIZFINX-NEXT: frflags a2572; CHECKIZFINX-NEXT: flt.s a3, a1, a0573; CHECKIZFINX-NEXT: fsflags a2574; CHECKIZFINX-NEXT: xori a2, a3, 1575; CHECKIZFINX-NEXT: feq.s zero, a1, a0576; CHECKIZFINX-NEXT: mv a0, a2577; CHECKIZFINX-NEXT: ret578;579; RV32I-LABEL: fcmp_ule:580; RV32I: # %bb.0:581; RV32I-NEXT: addi sp, sp, -16582; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill583; RV32I-NEXT: call __gtsf2584; RV32I-NEXT: slti a0, a0, 1585; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload586; RV32I-NEXT: addi sp, sp, 16587; RV32I-NEXT: ret588;589; RV64I-LABEL: fcmp_ule:590; RV64I: # %bb.0:591; RV64I-NEXT: addi sp, sp, -16592; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill593; RV64I-NEXT: call __gtsf2594; RV64I-NEXT: slti a0, a0, 1595; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload596; RV64I-NEXT: addi sp, sp, 16597; RV64I-NEXT: ret598 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"ule", metadata !"fpexcept.strict") strictfp599 %2 = zext i1 %1 to i32600 ret i32 %2601}602 603define i32 @fcmp_une(float %a, float %b) nounwind strictfp {604; CHECKIF-LABEL: fcmp_une:605; CHECKIF: # %bb.0:606; CHECKIF-NEXT: feq.s a0, fa0, fa1607; CHECKIF-NEXT: xori a0, a0, 1608; CHECKIF-NEXT: ret609;610; CHECKIZFINX-LABEL: fcmp_une:611; CHECKIZFINX: # %bb.0:612; CHECKIZFINX-NEXT: feq.s a0, a0, a1613; CHECKIZFINX-NEXT: xori a0, a0, 1614; CHECKIZFINX-NEXT: ret615;616; RV32I-LABEL: fcmp_une:617; RV32I: # %bb.0:618; RV32I-NEXT: addi sp, sp, -16619; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill620; RV32I-NEXT: call __nesf2621; RV32I-NEXT: snez a0, a0622; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload623; RV32I-NEXT: addi sp, sp, 16624; RV32I-NEXT: ret625;626; RV64I-LABEL: fcmp_une:627; RV64I: # %bb.0:628; RV64I-NEXT: addi sp, sp, -16629; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill630; RV64I-NEXT: call __nesf2631; RV64I-NEXT: snez a0, a0632; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload633; RV64I-NEXT: addi sp, sp, 16634; RV64I-NEXT: ret635 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"une", metadata !"fpexcept.strict") strictfp636 %2 = zext i1 %1 to i32637 ret i32 %2638}639 640define i32 @fcmp_uno(float %a, float %b) nounwind strictfp {641; CHECKIF-LABEL: fcmp_uno:642; CHECKIF: # %bb.0:643; CHECKIF-NEXT: feq.s a0, fa1, fa1644; CHECKIF-NEXT: feq.s a1, fa0, fa0645; CHECKIF-NEXT: and a0, a1, a0646; CHECKIF-NEXT: xori a0, a0, 1647; CHECKIF-NEXT: ret648;649; CHECKIZFINX-LABEL: fcmp_uno:650; CHECKIZFINX: # %bb.0:651; CHECKIZFINX-NEXT: feq.s a1, a1, a1652; CHECKIZFINX-NEXT: feq.s a0, a0, a0653; CHECKIZFINX-NEXT: and a0, a0, a1654; CHECKIZFINX-NEXT: xori a0, a0, 1655; CHECKIZFINX-NEXT: ret656;657; RV32I-LABEL: fcmp_uno:658; RV32I: # %bb.0:659; RV32I-NEXT: addi sp, sp, -16660; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill661; RV32I-NEXT: call __unordsf2662; RV32I-NEXT: snez a0, a0663; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload664; RV32I-NEXT: addi sp, sp, 16665; RV32I-NEXT: ret666;667; RV64I-LABEL: fcmp_uno:668; RV64I: # %bb.0:669; RV64I-NEXT: addi sp, sp, -16670; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill671; RV64I-NEXT: call __unordsf2672; RV64I-NEXT: snez a0, a0673; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload674; RV64I-NEXT: addi sp, sp, 16675; RV64I-NEXT: ret676 %1 = call i1 @llvm.experimental.constrained.fcmp.f32(float %a, float %b, metadata !"uno", metadata !"fpexcept.strict") strictfp677 %2 = zext i1 %1 to i32678 ret i32 %2679}680 681define i32 @fcmps_oeq(float %a, float %b) nounwind strictfp {682; CHECKIF-LABEL: fcmps_oeq:683; CHECKIF: # %bb.0:684; CHECKIF-NEXT: fle.s a0, fa1, fa0685; CHECKIF-NEXT: fle.s a1, fa0, fa1686; CHECKIF-NEXT: and a0, a1, a0687; CHECKIF-NEXT: ret688;689; CHECKIZFINX-LABEL: fcmps_oeq:690; CHECKIZFINX: # %bb.0:691; CHECKIZFINX-NEXT: fle.s a2, a1, a0692; CHECKIZFINX-NEXT: fle.s a0, a0, a1693; CHECKIZFINX-NEXT: and a0, a0, a2694; CHECKIZFINX-NEXT: ret695;696; RV32I-LABEL: fcmps_oeq:697; RV32I: # %bb.0:698; RV32I-NEXT: addi sp, sp, -16699; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill700; RV32I-NEXT: call __eqsf2701; RV32I-NEXT: seqz a0, a0702; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload703; RV32I-NEXT: addi sp, sp, 16704; RV32I-NEXT: ret705;706; RV64I-LABEL: fcmps_oeq:707; RV64I: # %bb.0:708; RV64I-NEXT: addi sp, sp, -16709; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill710; RV64I-NEXT: call __eqsf2711; RV64I-NEXT: seqz a0, a0712; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload713; RV64I-NEXT: addi sp, sp, 16714; RV64I-NEXT: ret715 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"oeq", metadata !"fpexcept.strict") strictfp716 %2 = zext i1 %1 to i32717 ret i32 %2718}719 720define i32 @fcmps_ogt(float %a, float %b) nounwind strictfp {721; CHECKIF-LABEL: fcmps_ogt:722; CHECKIF: # %bb.0:723; CHECKIF-NEXT: flt.s a0, fa1, fa0724; CHECKIF-NEXT: ret725;726; CHECKIZFINX-LABEL: fcmps_ogt:727; CHECKIZFINX: # %bb.0:728; CHECKIZFINX-NEXT: flt.s a0, a1, a0729; CHECKIZFINX-NEXT: ret730;731; RV32I-LABEL: fcmps_ogt:732; RV32I: # %bb.0:733; RV32I-NEXT: addi sp, sp, -16734; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill735; RV32I-NEXT: call __gtsf2736; RV32I-NEXT: sgtz a0, a0737; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload738; RV32I-NEXT: addi sp, sp, 16739; RV32I-NEXT: ret740;741; RV64I-LABEL: fcmps_ogt:742; RV64I: # %bb.0:743; RV64I-NEXT: addi sp, sp, -16744; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill745; RV64I-NEXT: call __gtsf2746; RV64I-NEXT: sgtz a0, a0747; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload748; RV64I-NEXT: addi sp, sp, 16749; RV64I-NEXT: ret750 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ogt", metadata !"fpexcept.strict") strictfp751 %2 = zext i1 %1 to i32752 ret i32 %2753}754 755define i32 @fcmps_oge(float %a, float %b) nounwind strictfp {756; CHECKIF-LABEL: fcmps_oge:757; CHECKIF: # %bb.0:758; CHECKIF-NEXT: fle.s a0, fa1, fa0759; CHECKIF-NEXT: ret760;761; CHECKIZFINX-LABEL: fcmps_oge:762; CHECKIZFINX: # %bb.0:763; CHECKIZFINX-NEXT: fle.s a0, a1, a0764; CHECKIZFINX-NEXT: ret765;766; RV32I-LABEL: fcmps_oge:767; RV32I: # %bb.0:768; RV32I-NEXT: addi sp, sp, -16769; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill770; RV32I-NEXT: call __gesf2771; RV32I-NEXT: srli a0, a0, 31772; RV32I-NEXT: xori a0, a0, 1773; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload774; RV32I-NEXT: addi sp, sp, 16775; RV32I-NEXT: ret776;777; RV64I-LABEL: fcmps_oge:778; RV64I: # %bb.0:779; RV64I-NEXT: addi sp, sp, -16780; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill781; RV64I-NEXT: call __gesf2782; RV64I-NEXT: srli a0, a0, 63783; RV64I-NEXT: xori a0, a0, 1784; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload785; RV64I-NEXT: addi sp, sp, 16786; RV64I-NEXT: ret787 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"oge", metadata !"fpexcept.strict") strictfp788 %2 = zext i1 %1 to i32789 ret i32 %2790}791 792define i32 @fcmps_olt(float %a, float %b) nounwind strictfp {793; CHECKIF-LABEL: fcmps_olt:794; CHECKIF: # %bb.0:795; CHECKIF-NEXT: flt.s a0, fa0, fa1796; CHECKIF-NEXT: ret797;798; CHECKIZFINX-LABEL: fcmps_olt:799; CHECKIZFINX: # %bb.0:800; CHECKIZFINX-NEXT: flt.s a0, a0, a1801; CHECKIZFINX-NEXT: ret802;803; RV32I-LABEL: fcmps_olt:804; RV32I: # %bb.0:805; RV32I-NEXT: addi sp, sp, -16806; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill807; RV32I-NEXT: call __ltsf2808; RV32I-NEXT: srli a0, a0, 31809; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload810; RV32I-NEXT: addi sp, sp, 16811; RV32I-NEXT: ret812;813; RV64I-LABEL: fcmps_olt:814; RV64I: # %bb.0:815; RV64I-NEXT: addi sp, sp, -16816; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill817; RV64I-NEXT: call __ltsf2818; RV64I-NEXT: srli a0, a0, 63819; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload820; RV64I-NEXT: addi sp, sp, 16821; RV64I-NEXT: ret822 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"olt", metadata !"fpexcept.strict") strictfp823 %2 = zext i1 %1 to i32824 ret i32 %2825}826 827define i32 @fcmps_ole(float %a, float %b) nounwind strictfp {828; CHECKIF-LABEL: fcmps_ole:829; CHECKIF: # %bb.0:830; CHECKIF-NEXT: fle.s a0, fa0, fa1831; CHECKIF-NEXT: ret832;833; CHECKIZFINX-LABEL: fcmps_ole:834; CHECKIZFINX: # %bb.0:835; CHECKIZFINX-NEXT: fle.s a0, a0, a1836; CHECKIZFINX-NEXT: ret837;838; RV32I-LABEL: fcmps_ole:839; RV32I: # %bb.0:840; RV32I-NEXT: addi sp, sp, -16841; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill842; RV32I-NEXT: call __lesf2843; RV32I-NEXT: slti a0, a0, 1844; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload845; RV32I-NEXT: addi sp, sp, 16846; RV32I-NEXT: ret847;848; RV64I-LABEL: fcmps_ole:849; RV64I: # %bb.0:850; RV64I-NEXT: addi sp, sp, -16851; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill852; RV64I-NEXT: call __lesf2853; RV64I-NEXT: slti a0, a0, 1854; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload855; RV64I-NEXT: addi sp, sp, 16856; RV64I-NEXT: ret857 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ole", metadata !"fpexcept.strict") strictfp858 %2 = zext i1 %1 to i32859 ret i32 %2860}861 862define i32 @fcmps_one(float %a, float %b) nounwind strictfp {863; CHECKIF-LABEL: fcmps_one:864; CHECKIF: # %bb.0:865; CHECKIF-NEXT: flt.s a0, fa0, fa1866; CHECKIF-NEXT: flt.s a1, fa1, fa0867; CHECKIF-NEXT: or a0, a1, a0868; CHECKIF-NEXT: ret869;870; CHECKIZFINX-LABEL: fcmps_one:871; CHECKIZFINX: # %bb.0:872; CHECKIZFINX-NEXT: flt.s a2, a0, a1873; CHECKIZFINX-NEXT: flt.s a0, a1, a0874; CHECKIZFINX-NEXT: or a0, a0, a2875; CHECKIZFINX-NEXT: ret876;877; RV32I-LABEL: fcmps_one:878; RV32I: # %bb.0:879; RV32I-NEXT: addi sp, sp, -16880; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill881; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill882; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill883; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill884; RV32I-NEXT: mv s0, a1885; RV32I-NEXT: mv s1, a0886; RV32I-NEXT: call __eqsf2887; RV32I-NEXT: snez s2, a0888; RV32I-NEXT: mv a0, s1889; RV32I-NEXT: mv a1, s0890; RV32I-NEXT: call __unordsf2891; RV32I-NEXT: seqz a0, a0892; RV32I-NEXT: and a0, a0, s2893; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload894; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload895; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload896; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload897; RV32I-NEXT: addi sp, sp, 16898; RV32I-NEXT: ret899;900; RV64I-LABEL: fcmps_one:901; RV64I: # %bb.0:902; RV64I-NEXT: addi sp, sp, -32903; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill904; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill905; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill906; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill907; RV64I-NEXT: mv s0, a1908; RV64I-NEXT: mv s1, a0909; RV64I-NEXT: call __eqsf2910; RV64I-NEXT: snez s2, a0911; RV64I-NEXT: mv a0, s1912; RV64I-NEXT: mv a1, s0913; RV64I-NEXT: call __unordsf2914; RV64I-NEXT: seqz a0, a0915; RV64I-NEXT: and a0, a0, s2916; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload917; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload918; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload919; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload920; RV64I-NEXT: addi sp, sp, 32921; RV64I-NEXT: ret922 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"one", metadata !"fpexcept.strict") strictfp923 %2 = zext i1 %1 to i32924 ret i32 %2925}926 927define i32 @fcmps_ord(float %a, float %b) nounwind strictfp {928; CHECKIF-LABEL: fcmps_ord:929; CHECKIF: # %bb.0:930; CHECKIF-NEXT: fle.s a0, fa1, fa1931; CHECKIF-NEXT: fle.s a1, fa0, fa0932; CHECKIF-NEXT: and a0, a1, a0933; CHECKIF-NEXT: ret934;935; CHECKIZFINX-LABEL: fcmps_ord:936; CHECKIZFINX: # %bb.0:937; CHECKIZFINX-NEXT: fle.s a1, a1, a1938; CHECKIZFINX-NEXT: fle.s a0, a0, a0939; CHECKIZFINX-NEXT: and a0, a0, a1940; CHECKIZFINX-NEXT: ret941;942; RV32I-LABEL: fcmps_ord:943; RV32I: # %bb.0:944; RV32I-NEXT: addi sp, sp, -16945; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill946; RV32I-NEXT: call __unordsf2947; RV32I-NEXT: seqz a0, a0948; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload949; RV32I-NEXT: addi sp, sp, 16950; RV32I-NEXT: ret951;952; RV64I-LABEL: fcmps_ord:953; RV64I: # %bb.0:954; RV64I-NEXT: addi sp, sp, -16955; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill956; RV64I-NEXT: call __unordsf2957; RV64I-NEXT: seqz a0, a0958; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload959; RV64I-NEXT: addi sp, sp, 16960; RV64I-NEXT: ret961 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ord", metadata !"fpexcept.strict") strictfp962 %2 = zext i1 %1 to i32963 ret i32 %2964}965 966define i32 @fcmps_ueq(float %a, float %b) nounwind strictfp {967; CHECKIF-LABEL: fcmps_ueq:968; CHECKIF: # %bb.0:969; CHECKIF-NEXT: flt.s a0, fa0, fa1970; CHECKIF-NEXT: flt.s a1, fa1, fa0971; CHECKIF-NEXT: or a0, a1, a0972; CHECKIF-NEXT: xori a0, a0, 1973; CHECKIF-NEXT: ret974;975; CHECKIZFINX-LABEL: fcmps_ueq:976; CHECKIZFINX: # %bb.0:977; CHECKIZFINX-NEXT: flt.s a2, a0, a1978; CHECKIZFINX-NEXT: flt.s a0, a1, a0979; CHECKIZFINX-NEXT: or a0, a0, a2980; CHECKIZFINX-NEXT: xori a0, a0, 1981; CHECKIZFINX-NEXT: ret982;983; RV32I-LABEL: fcmps_ueq:984; RV32I: # %bb.0:985; RV32I-NEXT: addi sp, sp, -16986; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill987; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill988; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill989; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill990; RV32I-NEXT: mv s0, a1991; RV32I-NEXT: mv s1, a0992; RV32I-NEXT: call __unordsf2993; RV32I-NEXT: mv s2, a0994; RV32I-NEXT: mv a0, s1995; RV32I-NEXT: mv a1, s0996; RV32I-NEXT: call __eqsf2997; RV32I-NEXT: seqz a0, a0998; RV32I-NEXT: or a0, s2, a0999; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1000; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1001; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload1002; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload1003; RV32I-NEXT: addi sp, sp, 161004; RV32I-NEXT: ret1005;1006; RV64I-LABEL: fcmps_ueq:1007; RV64I: # %bb.0:1008; RV64I-NEXT: addi sp, sp, -321009; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill1010; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill1011; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill1012; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill1013; RV64I-NEXT: mv s0, a11014; RV64I-NEXT: mv s1, a01015; RV64I-NEXT: call __unordsf21016; RV64I-NEXT: mv s2, a01017; RV64I-NEXT: mv a0, s11018; RV64I-NEXT: mv a1, s01019; RV64I-NEXT: call __eqsf21020; RV64I-NEXT: seqz a0, a01021; RV64I-NEXT: or a0, s2, a01022; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload1023; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload1024; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload1025; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload1026; RV64I-NEXT: addi sp, sp, 321027; RV64I-NEXT: ret1028 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ueq", metadata !"fpexcept.strict") strictfp1029 %2 = zext i1 %1 to i321030 ret i32 %21031}1032 1033define i32 @fcmps_ugt(float %a, float %b) nounwind strictfp {1034; CHECKIF-LABEL: fcmps_ugt:1035; CHECKIF: # %bb.0:1036; CHECKIF-NEXT: fle.s a0, fa0, fa11037; CHECKIF-NEXT: xori a0, a0, 11038; CHECKIF-NEXT: ret1039;1040; CHECKIZFINX-LABEL: fcmps_ugt:1041; CHECKIZFINX: # %bb.0:1042; CHECKIZFINX-NEXT: fle.s a0, a0, a11043; CHECKIZFINX-NEXT: xori a0, a0, 11044; CHECKIZFINX-NEXT: ret1045;1046; RV32I-LABEL: fcmps_ugt:1047; RV32I: # %bb.0:1048; RV32I-NEXT: addi sp, sp, -161049; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1050; RV32I-NEXT: call __lesf21051; RV32I-NEXT: sgtz a0, a01052; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1053; RV32I-NEXT: addi sp, sp, 161054; RV32I-NEXT: ret1055;1056; RV64I-LABEL: fcmps_ugt:1057; RV64I: # %bb.0:1058; RV64I-NEXT: addi sp, sp, -161059; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1060; RV64I-NEXT: call __lesf21061; RV64I-NEXT: sgtz a0, a01062; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1063; RV64I-NEXT: addi sp, sp, 161064; RV64I-NEXT: ret1065 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ugt", metadata !"fpexcept.strict") strictfp1066 %2 = zext i1 %1 to i321067 ret i32 %21068}1069 1070define i32 @fcmps_uge(float %a, float %b) nounwind strictfp {1071; CHECKIF-LABEL: fcmps_uge:1072; CHECKIF: # %bb.0:1073; CHECKIF-NEXT: flt.s a0, fa0, fa11074; CHECKIF-NEXT: xori a0, a0, 11075; CHECKIF-NEXT: ret1076;1077; CHECKIZFINX-LABEL: fcmps_uge:1078; CHECKIZFINX: # %bb.0:1079; CHECKIZFINX-NEXT: flt.s a0, a0, a11080; CHECKIZFINX-NEXT: xori a0, a0, 11081; CHECKIZFINX-NEXT: ret1082;1083; RV32I-LABEL: fcmps_uge:1084; RV32I: # %bb.0:1085; RV32I-NEXT: addi sp, sp, -161086; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1087; RV32I-NEXT: call __ltsf21088; RV32I-NEXT: srli a0, a0, 311089; RV32I-NEXT: xori a0, a0, 11090; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1091; RV32I-NEXT: addi sp, sp, 161092; RV32I-NEXT: ret1093;1094; RV64I-LABEL: fcmps_uge:1095; RV64I: # %bb.0:1096; RV64I-NEXT: addi sp, sp, -161097; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1098; RV64I-NEXT: call __ltsf21099; RV64I-NEXT: srli a0, a0, 631100; RV64I-NEXT: xori a0, a0, 11101; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1102; RV64I-NEXT: addi sp, sp, 161103; RV64I-NEXT: ret1104 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"uge", metadata !"fpexcept.strict") strictfp1105 %2 = zext i1 %1 to i321106 ret i32 %21107}1108 1109define i32 @fcmps_ult(float %a, float %b) nounwind strictfp {1110; CHECKIF-LABEL: fcmps_ult:1111; CHECKIF: # %bb.0:1112; CHECKIF-NEXT: fle.s a0, fa1, fa01113; CHECKIF-NEXT: xori a0, a0, 11114; CHECKIF-NEXT: ret1115;1116; CHECKIZFINX-LABEL: fcmps_ult:1117; CHECKIZFINX: # %bb.0:1118; CHECKIZFINX-NEXT: fle.s a0, a1, a01119; CHECKIZFINX-NEXT: xori a0, a0, 11120; CHECKIZFINX-NEXT: ret1121;1122; RV32I-LABEL: fcmps_ult:1123; RV32I: # %bb.0:1124; RV32I-NEXT: addi sp, sp, -161125; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1126; RV32I-NEXT: call __gesf21127; RV32I-NEXT: srli a0, a0, 311128; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1129; RV32I-NEXT: addi sp, sp, 161130; RV32I-NEXT: ret1131;1132; RV64I-LABEL: fcmps_ult:1133; RV64I: # %bb.0:1134; RV64I-NEXT: addi sp, sp, -161135; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1136; RV64I-NEXT: call __gesf21137; RV64I-NEXT: srli a0, a0, 631138; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1139; RV64I-NEXT: addi sp, sp, 161140; RV64I-NEXT: ret1141 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ult", metadata !"fpexcept.strict") strictfp1142 %2 = zext i1 %1 to i321143 ret i32 %21144}1145 1146define i32 @fcmps_ule(float %a, float %b) nounwind strictfp {1147; CHECKIF-LABEL: fcmps_ule:1148; CHECKIF: # %bb.0:1149; CHECKIF-NEXT: flt.s a0, fa1, fa01150; CHECKIF-NEXT: xori a0, a0, 11151; CHECKIF-NEXT: ret1152;1153; CHECKIZFINX-LABEL: fcmps_ule:1154; CHECKIZFINX: # %bb.0:1155; CHECKIZFINX-NEXT: flt.s a0, a1, a01156; CHECKIZFINX-NEXT: xori a0, a0, 11157; CHECKIZFINX-NEXT: ret1158;1159; RV32I-LABEL: fcmps_ule:1160; RV32I: # %bb.0:1161; RV32I-NEXT: addi sp, sp, -161162; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1163; RV32I-NEXT: call __gtsf21164; RV32I-NEXT: slti a0, a0, 11165; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1166; RV32I-NEXT: addi sp, sp, 161167; RV32I-NEXT: ret1168;1169; RV64I-LABEL: fcmps_ule:1170; RV64I: # %bb.0:1171; RV64I-NEXT: addi sp, sp, -161172; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1173; RV64I-NEXT: call __gtsf21174; RV64I-NEXT: slti a0, a0, 11175; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1176; RV64I-NEXT: addi sp, sp, 161177; RV64I-NEXT: ret1178 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"ule", metadata !"fpexcept.strict") strictfp1179 %2 = zext i1 %1 to i321180 ret i32 %21181}1182 1183define i32 @fcmps_une(float %a, float %b) nounwind strictfp {1184; CHECKIF-LABEL: fcmps_une:1185; CHECKIF: # %bb.0:1186; CHECKIF-NEXT: fle.s a0, fa1, fa01187; CHECKIF-NEXT: fle.s a1, fa0, fa11188; CHECKIF-NEXT: and a0, a1, a01189; CHECKIF-NEXT: xori a0, a0, 11190; CHECKIF-NEXT: ret1191;1192; CHECKIZFINX-LABEL: fcmps_une:1193; CHECKIZFINX: # %bb.0:1194; CHECKIZFINX-NEXT: fle.s a2, a1, a01195; CHECKIZFINX-NEXT: fle.s a0, a0, a11196; CHECKIZFINX-NEXT: and a0, a0, a21197; CHECKIZFINX-NEXT: xori a0, a0, 11198; CHECKIZFINX-NEXT: ret1199;1200; RV32I-LABEL: fcmps_une:1201; RV32I: # %bb.0:1202; RV32I-NEXT: addi sp, sp, -161203; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1204; RV32I-NEXT: call __nesf21205; RV32I-NEXT: snez a0, a01206; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1207; RV32I-NEXT: addi sp, sp, 161208; RV32I-NEXT: ret1209;1210; RV64I-LABEL: fcmps_une:1211; RV64I: # %bb.0:1212; RV64I-NEXT: addi sp, sp, -161213; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1214; RV64I-NEXT: call __nesf21215; RV64I-NEXT: snez a0, a01216; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1217; RV64I-NEXT: addi sp, sp, 161218; RV64I-NEXT: ret1219 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"une", metadata !"fpexcept.strict") strictfp1220 %2 = zext i1 %1 to i321221 ret i32 %21222}1223 1224define i32 @fcmps_uno(float %a, float %b) nounwind strictfp {1225; CHECKIF-LABEL: fcmps_uno:1226; CHECKIF: # %bb.0:1227; CHECKIF-NEXT: fle.s a0, fa1, fa11228; CHECKIF-NEXT: fle.s a1, fa0, fa01229; CHECKIF-NEXT: and a0, a1, a01230; CHECKIF-NEXT: xori a0, a0, 11231; CHECKIF-NEXT: ret1232;1233; CHECKIZFINX-LABEL: fcmps_uno:1234; CHECKIZFINX: # %bb.0:1235; CHECKIZFINX-NEXT: fle.s a1, a1, a11236; CHECKIZFINX-NEXT: fle.s a0, a0, a01237; CHECKIZFINX-NEXT: and a0, a0, a11238; CHECKIZFINX-NEXT: xori a0, a0, 11239; CHECKIZFINX-NEXT: ret1240;1241; RV32I-LABEL: fcmps_uno:1242; RV32I: # %bb.0:1243; RV32I-NEXT: addi sp, sp, -161244; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1245; RV32I-NEXT: call __unordsf21246; RV32I-NEXT: snez a0, a01247; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1248; RV32I-NEXT: addi sp, sp, 161249; RV32I-NEXT: ret1250;1251; RV64I-LABEL: fcmps_uno:1252; RV64I: # %bb.0:1253; RV64I-NEXT: addi sp, sp, -161254; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1255; RV64I-NEXT: call __unordsf21256; RV64I-NEXT: snez a0, a01257; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1258; RV64I-NEXT: addi sp, sp, 161259; RV64I-NEXT: ret1260 %1 = call i1 @llvm.experimental.constrained.fcmps.f32(float %a, float %b, metadata !"uno", metadata !"fpexcept.strict") strictfp1261 %2 = zext i1 %1 to i321262 ret i32 %21263}1264