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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \3; RUN: -target-abi=ilp32f | FileCheck -check-prefix=CHECKIF %s4; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \5; RUN: -target-abi=lp64f | FileCheck -check-prefix=CHECKIF %s6; RUN: llc -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs < %s \7; RUN: -target-abi=ilp32 | FileCheck -check-prefix=CHECKIZFINX %s8; RUN: llc -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs < %s \9; RUN: -target-abi=lp64 | FileCheck -check-prefix=CHECKIZFINX %s10; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \11; RUN: | FileCheck -check-prefix=RV32I %s12; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \13; RUN: | FileCheck -check-prefix=RV64I %s14 15define i32 @fcmp_false(float %a, float %b) nounwind {16; CHECKIF-LABEL: fcmp_false:17; CHECKIF: # %bb.0:18; CHECKIF-NEXT: li a0, 019; CHECKIF-NEXT: ret20;21; CHECKIZFINX-LABEL: fcmp_false:22; CHECKIZFINX: # %bb.0:23; CHECKIZFINX-NEXT: li a0, 024; CHECKIZFINX-NEXT: ret25;26; RV32I-LABEL: fcmp_false:27; RV32I: # %bb.0:28; RV32I-NEXT: li a0, 029; RV32I-NEXT: ret30;31; RV64I-LABEL: fcmp_false:32; RV64I: # %bb.0:33; RV64I-NEXT: li a0, 034; RV64I-NEXT: ret35 %1 = fcmp false float %a, %b36 %2 = zext i1 %1 to i3237 ret i32 %238}39 40define i32 @fcmp_oeq(float %a, float %b) nounwind {41; CHECKIF-LABEL: fcmp_oeq:42; CHECKIF: # %bb.0:43; CHECKIF-NEXT: feq.s a0, fa0, fa144; CHECKIF-NEXT: ret45;46; CHECKIZFINX-LABEL: fcmp_oeq:47; CHECKIZFINX: # %bb.0:48; CHECKIZFINX-NEXT: feq.s a0, a0, a149; CHECKIZFINX-NEXT: ret50;51; RV32I-LABEL: fcmp_oeq:52; RV32I: # %bb.0:53; RV32I-NEXT: addi sp, sp, -1654; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill55; RV32I-NEXT: call __eqsf256; RV32I-NEXT: seqz a0, a057; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload58; RV32I-NEXT: addi sp, sp, 1659; RV32I-NEXT: ret60;61; RV64I-LABEL: fcmp_oeq:62; RV64I: # %bb.0:63; RV64I-NEXT: addi sp, sp, -1664; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill65; RV64I-NEXT: call __eqsf266; RV64I-NEXT: seqz a0, a067; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload68; RV64I-NEXT: addi sp, sp, 1669; RV64I-NEXT: ret70 %1 = fcmp oeq float %a, %b71 %2 = zext i1 %1 to i3272 ret i32 %273}74 75define i32 @fcmp_ogt(float %a, float %b) nounwind {76; CHECKIF-LABEL: fcmp_ogt:77; CHECKIF: # %bb.0:78; CHECKIF-NEXT: flt.s a0, fa1, fa079; CHECKIF-NEXT: ret80;81; CHECKIZFINX-LABEL: fcmp_ogt:82; CHECKIZFINX: # %bb.0:83; CHECKIZFINX-NEXT: flt.s a0, a1, a084; CHECKIZFINX-NEXT: ret85;86; RV32I-LABEL: fcmp_ogt:87; RV32I: # %bb.0:88; RV32I-NEXT: addi sp, sp, -1689; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill90; RV32I-NEXT: call __gtsf291; RV32I-NEXT: sgtz a0, a092; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload93; RV32I-NEXT: addi sp, sp, 1694; RV32I-NEXT: ret95;96; RV64I-LABEL: fcmp_ogt:97; RV64I: # %bb.0:98; RV64I-NEXT: addi sp, sp, -1699; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill100; RV64I-NEXT: call __gtsf2101; RV64I-NEXT: sgtz a0, a0102; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload103; RV64I-NEXT: addi sp, sp, 16104; RV64I-NEXT: ret105 %1 = fcmp ogt float %a, %b106 %2 = zext i1 %1 to i32107 ret i32 %2108}109 110define i32 @fcmp_oge(float %a, float %b) nounwind {111; CHECKIF-LABEL: fcmp_oge:112; CHECKIF: # %bb.0:113; CHECKIF-NEXT: fle.s a0, fa1, fa0114; CHECKIF-NEXT: ret115;116; CHECKIZFINX-LABEL: fcmp_oge:117; CHECKIZFINX: # %bb.0:118; CHECKIZFINX-NEXT: fle.s a0, a1, a0119; CHECKIZFINX-NEXT: ret120;121; RV32I-LABEL: fcmp_oge:122; RV32I: # %bb.0:123; RV32I-NEXT: addi sp, sp, -16124; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill125; RV32I-NEXT: call __gesf2126; RV32I-NEXT: srli a0, a0, 31127; RV32I-NEXT: xori a0, a0, 1128; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload129; RV32I-NEXT: addi sp, sp, 16130; RV32I-NEXT: ret131;132; RV64I-LABEL: fcmp_oge:133; RV64I: # %bb.0:134; RV64I-NEXT: addi sp, sp, -16135; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill136; RV64I-NEXT: call __gesf2137; RV64I-NEXT: srli a0, a0, 63138; RV64I-NEXT: xori a0, a0, 1139; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload140; RV64I-NEXT: addi sp, sp, 16141; RV64I-NEXT: ret142 %1 = fcmp oge float %a, %b143 %2 = zext i1 %1 to i32144 ret i32 %2145}146 147define i32 @fcmp_olt(float %a, float %b) nounwind {148; CHECKIF-LABEL: fcmp_olt:149; CHECKIF: # %bb.0:150; CHECKIF-NEXT: flt.s a0, fa0, fa1151; CHECKIF-NEXT: ret152;153; CHECKIZFINX-LABEL: fcmp_olt:154; CHECKIZFINX: # %bb.0:155; CHECKIZFINX-NEXT: flt.s a0, a0, a1156; CHECKIZFINX-NEXT: ret157;158; RV32I-LABEL: fcmp_olt:159; RV32I: # %bb.0:160; RV32I-NEXT: addi sp, sp, -16161; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill162; RV32I-NEXT: call __ltsf2163; RV32I-NEXT: srli a0, a0, 31164; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload165; RV32I-NEXT: addi sp, sp, 16166; RV32I-NEXT: ret167;168; RV64I-LABEL: fcmp_olt:169; RV64I: # %bb.0:170; RV64I-NEXT: addi sp, sp, -16171; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill172; RV64I-NEXT: call __ltsf2173; RV64I-NEXT: srli a0, a0, 63174; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload175; RV64I-NEXT: addi sp, sp, 16176; RV64I-NEXT: ret177 %1 = fcmp olt float %a, %b178 %2 = zext i1 %1 to i32179 ret i32 %2180}181 182define i32 @fcmp_ole(float %a, float %b) nounwind {183; CHECKIF-LABEL: fcmp_ole:184; CHECKIF: # %bb.0:185; CHECKIF-NEXT: fle.s a0, fa0, fa1186; CHECKIF-NEXT: ret187;188; CHECKIZFINX-LABEL: fcmp_ole:189; CHECKIZFINX: # %bb.0:190; CHECKIZFINX-NEXT: fle.s a0, a0, a1191; CHECKIZFINX-NEXT: ret192;193; RV32I-LABEL: fcmp_ole:194; RV32I: # %bb.0:195; RV32I-NEXT: addi sp, sp, -16196; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill197; RV32I-NEXT: call __lesf2198; RV32I-NEXT: slti a0, a0, 1199; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload200; RV32I-NEXT: addi sp, sp, 16201; RV32I-NEXT: ret202;203; RV64I-LABEL: fcmp_ole:204; RV64I: # %bb.0:205; RV64I-NEXT: addi sp, sp, -16206; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill207; RV64I-NEXT: call __lesf2208; RV64I-NEXT: slti a0, a0, 1209; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload210; RV64I-NEXT: addi sp, sp, 16211; RV64I-NEXT: ret212 %1 = fcmp ole float %a, %b213 %2 = zext i1 %1 to i32214 ret i32 %2215}216 217define i32 @fcmp_one(float %a, float %b) nounwind {218; CHECKIF-LABEL: fcmp_one:219; CHECKIF: # %bb.0:220; CHECKIF-NEXT: flt.s a0, fa0, fa1221; CHECKIF-NEXT: flt.s a1, fa1, fa0222; CHECKIF-NEXT: or a0, a1, a0223; CHECKIF-NEXT: ret224;225; CHECKIZFINX-LABEL: fcmp_one:226; CHECKIZFINX: # %bb.0:227; CHECKIZFINX-NEXT: flt.s a2, a0, a1228; CHECKIZFINX-NEXT: flt.s a0, a1, a0229; CHECKIZFINX-NEXT: or a0, a0, a2230; CHECKIZFINX-NEXT: ret231;232; RV32I-LABEL: fcmp_one:233; RV32I: # %bb.0:234; RV32I-NEXT: addi sp, sp, -16235; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill236; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill237; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill238; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill239; RV32I-NEXT: mv s0, a1240; RV32I-NEXT: mv s1, a0241; RV32I-NEXT: call __eqsf2242; RV32I-NEXT: snez s2, a0243; RV32I-NEXT: mv a0, s1244; RV32I-NEXT: mv a1, s0245; RV32I-NEXT: call __unordsf2246; RV32I-NEXT: seqz a0, a0247; RV32I-NEXT: and a0, a0, s2248; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload249; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload250; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload251; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload252; RV32I-NEXT: addi sp, sp, 16253; RV32I-NEXT: ret254;255; RV64I-LABEL: fcmp_one:256; RV64I: # %bb.0:257; RV64I-NEXT: addi sp, sp, -32258; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill259; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill260; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill261; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill262; RV64I-NEXT: mv s0, a1263; RV64I-NEXT: mv s1, a0264; RV64I-NEXT: call __eqsf2265; RV64I-NEXT: snez s2, a0266; RV64I-NEXT: mv a0, s1267; RV64I-NEXT: mv a1, s0268; RV64I-NEXT: call __unordsf2269; RV64I-NEXT: seqz a0, a0270; RV64I-NEXT: and a0, a0, s2271; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload272; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload273; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload274; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload275; RV64I-NEXT: addi sp, sp, 32276; RV64I-NEXT: ret277 %1 = fcmp one float %a, %b278 %2 = zext i1 %1 to i32279 ret i32 %2280}281 282define i32 @fcmp_ord(float %a, float %b) nounwind {283; CHECKIF-LABEL: fcmp_ord:284; CHECKIF: # %bb.0:285; CHECKIF-NEXT: feq.s a0, fa1, fa1286; CHECKIF-NEXT: feq.s a1, fa0, fa0287; CHECKIF-NEXT: and a0, a1, a0288; CHECKIF-NEXT: ret289;290; CHECKIZFINX-LABEL: fcmp_ord:291; CHECKIZFINX: # %bb.0:292; CHECKIZFINX-NEXT: feq.s a1, a1, a1293; CHECKIZFINX-NEXT: feq.s a0, a0, a0294; CHECKIZFINX-NEXT: and a0, a0, a1295; CHECKIZFINX-NEXT: ret296;297; RV32I-LABEL: fcmp_ord:298; RV32I: # %bb.0:299; RV32I-NEXT: addi sp, sp, -16300; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill301; RV32I-NEXT: call __unordsf2302; RV32I-NEXT: seqz a0, a0303; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload304; RV32I-NEXT: addi sp, sp, 16305; RV32I-NEXT: ret306;307; RV64I-LABEL: fcmp_ord:308; RV64I: # %bb.0:309; RV64I-NEXT: addi sp, sp, -16310; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill311; RV64I-NEXT: call __unordsf2312; RV64I-NEXT: seqz a0, a0313; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload314; RV64I-NEXT: addi sp, sp, 16315; RV64I-NEXT: ret316 %1 = fcmp ord float %a, %b317 %2 = zext i1 %1 to i32318 ret i32 %2319}320 321define i32 @fcmp_ueq(float %a, float %b) nounwind {322; CHECKIF-LABEL: fcmp_ueq:323; CHECKIF: # %bb.0:324; CHECKIF-NEXT: flt.s a0, fa0, fa1325; CHECKIF-NEXT: flt.s a1, fa1, fa0326; CHECKIF-NEXT: or a0, a1, a0327; CHECKIF-NEXT: xori a0, a0, 1328; CHECKIF-NEXT: ret329;330; CHECKIZFINX-LABEL: fcmp_ueq:331; CHECKIZFINX: # %bb.0:332; CHECKIZFINX-NEXT: flt.s a2, a0, a1333; CHECKIZFINX-NEXT: flt.s a0, a1, a0334; CHECKIZFINX-NEXT: or a0, a0, a2335; CHECKIZFINX-NEXT: xori a0, a0, 1336; CHECKIZFINX-NEXT: ret337;338; RV32I-LABEL: fcmp_ueq:339; RV32I: # %bb.0:340; RV32I-NEXT: addi sp, sp, -16341; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill342; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill343; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill344; RV32I-NEXT: sw s2, 0(sp) # 4-byte Folded Spill345; RV32I-NEXT: mv s0, a1346; RV32I-NEXT: mv s1, a0347; RV32I-NEXT: call __unordsf2348; RV32I-NEXT: mv s2, a0349; RV32I-NEXT: mv a0, s1350; RV32I-NEXT: mv a1, s0351; RV32I-NEXT: call __eqsf2352; RV32I-NEXT: seqz a0, a0353; RV32I-NEXT: or a0, s2, a0354; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload355; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload356; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload357; RV32I-NEXT: lw s2, 0(sp) # 4-byte Folded Reload358; RV32I-NEXT: addi sp, sp, 16359; RV32I-NEXT: ret360;361; RV64I-LABEL: fcmp_ueq:362; RV64I: # %bb.0:363; RV64I-NEXT: addi sp, sp, -32364; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill365; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill366; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill367; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill368; RV64I-NEXT: mv s0, a1369; RV64I-NEXT: mv s1, a0370; RV64I-NEXT: call __unordsf2371; RV64I-NEXT: mv s2, a0372; RV64I-NEXT: mv a0, s1373; RV64I-NEXT: mv a1, s0374; RV64I-NEXT: call __eqsf2375; RV64I-NEXT: seqz a0, a0376; RV64I-NEXT: or a0, s2, a0377; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload378; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload379; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload380; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload381; RV64I-NEXT: addi sp, sp, 32382; RV64I-NEXT: ret383 %1 = fcmp ueq float %a, %b384 %2 = zext i1 %1 to i32385 ret i32 %2386}387 388define i32 @fcmp_ugt(float %a, float %b) nounwind {389; CHECKIF-LABEL: fcmp_ugt:390; CHECKIF: # %bb.0:391; CHECKIF-NEXT: fle.s a0, fa0, fa1392; CHECKIF-NEXT: xori a0, a0, 1393; CHECKIF-NEXT: ret394;395; CHECKIZFINX-LABEL: fcmp_ugt:396; CHECKIZFINX: # %bb.0:397; CHECKIZFINX-NEXT: fle.s a0, a0, a1398; CHECKIZFINX-NEXT: xori a0, a0, 1399; CHECKIZFINX-NEXT: ret400;401; RV32I-LABEL: fcmp_ugt:402; RV32I: # %bb.0:403; RV32I-NEXT: addi sp, sp, -16404; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill405; RV32I-NEXT: call __lesf2406; RV32I-NEXT: sgtz a0, a0407; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload408; RV32I-NEXT: addi sp, sp, 16409; RV32I-NEXT: ret410;411; RV64I-LABEL: fcmp_ugt:412; RV64I: # %bb.0:413; RV64I-NEXT: addi sp, sp, -16414; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill415; RV64I-NEXT: call __lesf2416; RV64I-NEXT: sgtz a0, a0417; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload418; RV64I-NEXT: addi sp, sp, 16419; RV64I-NEXT: ret420 %1 = fcmp ugt float %a, %b421 %2 = zext i1 %1 to i32422 ret i32 %2423}424 425define i32 @fcmp_uge(float %a, float %b) nounwind {426; CHECKIF-LABEL: fcmp_uge:427; CHECKIF: # %bb.0:428; CHECKIF-NEXT: flt.s a0, fa0, fa1429; CHECKIF-NEXT: xori a0, a0, 1430; CHECKIF-NEXT: ret431;432; CHECKIZFINX-LABEL: fcmp_uge:433; CHECKIZFINX: # %bb.0:434; CHECKIZFINX-NEXT: flt.s a0, a0, a1435; CHECKIZFINX-NEXT: xori a0, a0, 1436; CHECKIZFINX-NEXT: ret437;438; RV32I-LABEL: fcmp_uge:439; RV32I: # %bb.0:440; RV32I-NEXT: addi sp, sp, -16441; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill442; RV32I-NEXT: call __ltsf2443; RV32I-NEXT: srli a0, a0, 31444; RV32I-NEXT: xori a0, a0, 1445; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload446; RV32I-NEXT: addi sp, sp, 16447; RV32I-NEXT: ret448;449; RV64I-LABEL: fcmp_uge:450; RV64I: # %bb.0:451; RV64I-NEXT: addi sp, sp, -16452; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill453; RV64I-NEXT: call __ltsf2454; RV64I-NEXT: srli a0, a0, 63455; RV64I-NEXT: xori a0, a0, 1456; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload457; RV64I-NEXT: addi sp, sp, 16458; RV64I-NEXT: ret459 %1 = fcmp uge float %a, %b460 %2 = zext i1 %1 to i32461 ret i32 %2462}463 464define i32 @fcmp_ult(float %a, float %b) nounwind {465; CHECKIF-LABEL: fcmp_ult:466; CHECKIF: # %bb.0:467; CHECKIF-NEXT: fle.s a0, fa1, fa0468; CHECKIF-NEXT: xori a0, a0, 1469; CHECKIF-NEXT: ret470;471; CHECKIZFINX-LABEL: fcmp_ult:472; CHECKIZFINX: # %bb.0:473; CHECKIZFINX-NEXT: fle.s a0, a1, a0474; CHECKIZFINX-NEXT: xori a0, a0, 1475; CHECKIZFINX-NEXT: ret476;477; RV32I-LABEL: fcmp_ult:478; RV32I: # %bb.0:479; RV32I-NEXT: addi sp, sp, -16480; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill481; RV32I-NEXT: call __gesf2482; RV32I-NEXT: srli a0, a0, 31483; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload484; RV32I-NEXT: addi sp, sp, 16485; RV32I-NEXT: ret486;487; RV64I-LABEL: fcmp_ult:488; RV64I: # %bb.0:489; RV64I-NEXT: addi sp, sp, -16490; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill491; RV64I-NEXT: call __gesf2492; RV64I-NEXT: srli a0, a0, 63493; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload494; RV64I-NEXT: addi sp, sp, 16495; RV64I-NEXT: ret496 %1 = fcmp ult float %a, %b497 %2 = zext i1 %1 to i32498 ret i32 %2499}500 501define i32 @fcmp_ule(float %a, float %b) nounwind {502; CHECKIF-LABEL: fcmp_ule:503; CHECKIF: # %bb.0:504; CHECKIF-NEXT: flt.s a0, fa1, fa0505; CHECKIF-NEXT: xori a0, a0, 1506; CHECKIF-NEXT: ret507;508; CHECKIZFINX-LABEL: fcmp_ule:509; CHECKIZFINX: # %bb.0:510; CHECKIZFINX-NEXT: flt.s a0, a1, a0511; CHECKIZFINX-NEXT: xori a0, a0, 1512; CHECKIZFINX-NEXT: ret513;514; RV32I-LABEL: fcmp_ule:515; RV32I: # %bb.0:516; RV32I-NEXT: addi sp, sp, -16517; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill518; RV32I-NEXT: call __gtsf2519; RV32I-NEXT: slti a0, a0, 1520; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload521; RV32I-NEXT: addi sp, sp, 16522; RV32I-NEXT: ret523;524; RV64I-LABEL: fcmp_ule:525; RV64I: # %bb.0:526; RV64I-NEXT: addi sp, sp, -16527; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill528; RV64I-NEXT: call __gtsf2529; RV64I-NEXT: slti a0, a0, 1530; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload531; RV64I-NEXT: addi sp, sp, 16532; RV64I-NEXT: ret533 %1 = fcmp ule float %a, %b534 %2 = zext i1 %1 to i32535 ret i32 %2536}537 538define i32 @fcmp_une(float %a, float %b) nounwind {539; CHECKIF-LABEL: fcmp_une:540; CHECKIF: # %bb.0:541; CHECKIF-NEXT: feq.s a0, fa0, fa1542; CHECKIF-NEXT: xori a0, a0, 1543; CHECKIF-NEXT: ret544;545; CHECKIZFINX-LABEL: fcmp_une:546; CHECKIZFINX: # %bb.0:547; CHECKIZFINX-NEXT: feq.s a0, a0, a1548; CHECKIZFINX-NEXT: xori a0, a0, 1549; CHECKIZFINX-NEXT: ret550;551; RV32I-LABEL: fcmp_une:552; RV32I: # %bb.0:553; RV32I-NEXT: addi sp, sp, -16554; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill555; RV32I-NEXT: call __nesf2556; RV32I-NEXT: snez a0, a0557; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload558; RV32I-NEXT: addi sp, sp, 16559; RV32I-NEXT: ret560;561; RV64I-LABEL: fcmp_une:562; RV64I: # %bb.0:563; RV64I-NEXT: addi sp, sp, -16564; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill565; RV64I-NEXT: call __nesf2566; RV64I-NEXT: snez a0, a0567; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload568; RV64I-NEXT: addi sp, sp, 16569; RV64I-NEXT: ret570 %1 = fcmp une float %a, %b571 %2 = zext i1 %1 to i32572 ret i32 %2573}574 575define i32 @fcmp_uno(float %a, float %b) nounwind {576; CHECKIF-LABEL: fcmp_uno:577; CHECKIF: # %bb.0:578; CHECKIF-NEXT: feq.s a0, fa1, fa1579; CHECKIF-NEXT: feq.s a1, fa0, fa0580; CHECKIF-NEXT: and a0, a1, a0581; CHECKIF-NEXT: xori a0, a0, 1582; CHECKIF-NEXT: ret583;584; CHECKIZFINX-LABEL: fcmp_uno:585; CHECKIZFINX: # %bb.0:586; CHECKIZFINX-NEXT: feq.s a1, a1, a1587; CHECKIZFINX-NEXT: feq.s a0, a0, a0588; CHECKIZFINX-NEXT: and a0, a0, a1589; CHECKIZFINX-NEXT: xori a0, a0, 1590; CHECKIZFINX-NEXT: ret591;592; RV32I-LABEL: fcmp_uno:593; RV32I: # %bb.0:594; RV32I-NEXT: addi sp, sp, -16595; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill596; RV32I-NEXT: call __unordsf2597; RV32I-NEXT: snez a0, a0598; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload599; RV32I-NEXT: addi sp, sp, 16600; RV32I-NEXT: ret601;602; RV64I-LABEL: fcmp_uno:603; RV64I: # %bb.0:604; RV64I-NEXT: addi sp, sp, -16605; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill606; RV64I-NEXT: call __unordsf2607; RV64I-NEXT: snez a0, a0608; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload609; RV64I-NEXT: addi sp, sp, 16610; RV64I-NEXT: ret611 %1 = fcmp uno float %a, %b612 %2 = zext i1 %1 to i32613 ret i32 %2614}615 616define i32 @fcmp_true(float %a, float %b) nounwind {617; CHECKIF-LABEL: fcmp_true:618; CHECKIF: # %bb.0:619; CHECKIF-NEXT: li a0, 1620; CHECKIF-NEXT: ret621;622; CHECKIZFINX-LABEL: fcmp_true:623; CHECKIZFINX: # %bb.0:624; CHECKIZFINX-NEXT: li a0, 1625; CHECKIZFINX-NEXT: ret626;627; RV32I-LABEL: fcmp_true:628; RV32I: # %bb.0:629; RV32I-NEXT: li a0, 1630; RV32I-NEXT: ret631;632; RV64I-LABEL: fcmp_true:633; RV64I: # %bb.0:634; RV64I-NEXT: li a0, 1635; RV64I-NEXT: ret636 %1 = fcmp true float %a, %b637 %2 = zext i1 %1 to i32638 ret i32 %2639}640