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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \3; RUN: -target-abi=ilp32f | FileCheck -check-prefixes=CHECKIF,RV32IF %s4; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \5; RUN: -target-abi=lp64f | FileCheck -check-prefixes=CHECKIF,RV64IF %s6; RUN: llc -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs < %s \7; RUN: -target-abi=ilp32 | FileCheck -check-prefixes=CHECKIZFINX,RV32IZFINX %s8; RUN: llc -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs < %s \9; RUN: -target-abi=lp64 | FileCheck -check-prefixes=CHECKIZFINX,RV64IZFINX %s10 11define signext i32 @test_floor_si32(float %x) {12; CHECKIF-LABEL: test_floor_si32:13; CHECKIF: # %bb.0:14; CHECKIF-NEXT: fcvt.w.s a0, fa0, rdn15; CHECKIF-NEXT: feq.s a1, fa0, fa016; CHECKIF-NEXT: seqz a1, a117; CHECKIF-NEXT: addi a1, a1, -118; CHECKIF-NEXT: and a0, a1, a019; CHECKIF-NEXT: ret20;21; CHECKIZFINX-LABEL: test_floor_si32:22; CHECKIZFINX: # %bb.0:23; CHECKIZFINX-NEXT: fcvt.w.s a1, a0, rdn24; CHECKIZFINX-NEXT: feq.s a0, a0, a025; CHECKIZFINX-NEXT: seqz a0, a026; CHECKIZFINX-NEXT: addi a0, a0, -127; CHECKIZFINX-NEXT: and a0, a0, a128; CHECKIZFINX-NEXT: ret29 %a = call float @llvm.floor.f32(float %x)30 %b = call i32 @llvm.fptosi.sat.i32.f32(float %a)31 ret i32 %b32}33 34define i64 @test_floor_si64(float %x) nounwind {35; RV32IF-LABEL: test_floor_si64:36; RV32IF: # %bb.0:37; RV32IF-NEXT: addi sp, sp, -1638; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill39; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill40; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill41; RV32IF-NEXT: fmv.s fs0, fa042; RV32IF-NEXT: lui a0, 30720043; RV32IF-NEXT: fmv.w.x fa5, a044; RV32IF-NEXT: fabs.s fa4, fa045; RV32IF-NEXT: flt.s a0, fa4, fa546; RV32IF-NEXT: beqz a0, .LBB1_247; RV32IF-NEXT: # %bb.1:48; RV32IF-NEXT: fcvt.w.s a0, fs0, rdn49; RV32IF-NEXT: fcvt.s.w fa5, a0, rdn50; RV32IF-NEXT: fsgnj.s fs0, fa5, fs051; RV32IF-NEXT: .LBB1_2:52; RV32IF-NEXT: lui a0, 91340853; RV32IF-NEXT: fmv.w.x fa5, a054; RV32IF-NEXT: fle.s s0, fa5, fs055; RV32IF-NEXT: fmv.s fa0, fs056; RV32IF-NEXT: call __fixsfdi57; RV32IF-NEXT: lui a3, 52428858; RV32IF-NEXT: lui a2, 52428859; RV32IF-NEXT: beqz s0, .LBB1_460; RV32IF-NEXT: # %bb.3:61; RV32IF-NEXT: mv a2, a162; RV32IF-NEXT: .LBB1_4:63; RV32IF-NEXT: lui a1, 38912064; RV32IF-NEXT: addi a1, a1, -165; RV32IF-NEXT: fmv.w.x fa5, a166; RV32IF-NEXT: flt.s a1, fa5, fs067; RV32IF-NEXT: beqz a1, .LBB1_668; RV32IF-NEXT: # %bb.5:69; RV32IF-NEXT: addi a2, a3, -170; RV32IF-NEXT: .LBB1_6:71; RV32IF-NEXT: feq.s a3, fs0, fs072; RV32IF-NEXT: neg a4, s073; RV32IF-NEXT: neg a5, a174; RV32IF-NEXT: neg a3, a375; RV32IF-NEXT: and a0, a4, a076; RV32IF-NEXT: and a1, a3, a277; RV32IF-NEXT: or a0, a5, a078; RV32IF-NEXT: and a0, a3, a079; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload80; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload81; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload82; RV32IF-NEXT: addi sp, sp, 1683; RV32IF-NEXT: ret84;85; RV64IF-LABEL: test_floor_si64:86; RV64IF: # %bb.0:87; RV64IF-NEXT: fcvt.l.s a0, fa0, rdn88; RV64IF-NEXT: feq.s a1, fa0, fa089; RV64IF-NEXT: seqz a1, a190; RV64IF-NEXT: addi a1, a1, -191; RV64IF-NEXT: and a0, a1, a092; RV64IF-NEXT: ret93;94; RV32IZFINX-LABEL: test_floor_si64:95; RV32IZFINX: # %bb.0:96; RV32IZFINX-NEXT: addi sp, sp, -1697; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill98; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill99; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill100; RV32IZFINX-NEXT: mv s0, a0101; RV32IZFINX-NEXT: lui a0, 307200102; RV32IZFINX-NEXT: fabs.s a1, s0103; RV32IZFINX-NEXT: flt.s a0, a1, a0104; RV32IZFINX-NEXT: beqz a0, .LBB1_2105; RV32IZFINX-NEXT: # %bb.1:106; RV32IZFINX-NEXT: fcvt.w.s a0, s0, rdn107; RV32IZFINX-NEXT: fcvt.s.w a0, a0, rdn108; RV32IZFINX-NEXT: fsgnj.s s0, a0, s0109; RV32IZFINX-NEXT: .LBB1_2:110; RV32IZFINX-NEXT: lui a0, 913408111; RV32IZFINX-NEXT: fle.s s1, a0, s0112; RV32IZFINX-NEXT: mv a0, s0113; RV32IZFINX-NEXT: call __fixsfdi114; RV32IZFINX-NEXT: lui a3, 524288115; RV32IZFINX-NEXT: lui a2, 524288116; RV32IZFINX-NEXT: beqz s1, .LBB1_4117; RV32IZFINX-NEXT: # %bb.3:118; RV32IZFINX-NEXT: mv a2, a1119; RV32IZFINX-NEXT: .LBB1_4:120; RV32IZFINX-NEXT: lui a1, 389120121; RV32IZFINX-NEXT: addi a1, a1, -1122; RV32IZFINX-NEXT: flt.s a1, a1, s0123; RV32IZFINX-NEXT: beqz a1, .LBB1_6124; RV32IZFINX-NEXT: # %bb.5:125; RV32IZFINX-NEXT: addi a2, a3, -1126; RV32IZFINX-NEXT: .LBB1_6:127; RV32IZFINX-NEXT: feq.s a3, s0, s0128; RV32IZFINX-NEXT: neg a4, s1129; RV32IZFINX-NEXT: neg a5, a1130; RV32IZFINX-NEXT: neg a3, a3131; RV32IZFINX-NEXT: and a0, a4, a0132; RV32IZFINX-NEXT: and a1, a3, a2133; RV32IZFINX-NEXT: or a0, a5, a0134; RV32IZFINX-NEXT: and a0, a3, a0135; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload136; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload137; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload138; RV32IZFINX-NEXT: addi sp, sp, 16139; RV32IZFINX-NEXT: ret140;141; RV64IZFINX-LABEL: test_floor_si64:142; RV64IZFINX: # %bb.0:143; RV64IZFINX-NEXT: fcvt.l.s a1, a0, rdn144; RV64IZFINX-NEXT: feq.s a0, a0, a0145; RV64IZFINX-NEXT: seqz a0, a0146; RV64IZFINX-NEXT: addi a0, a0, -1147; RV64IZFINX-NEXT: and a0, a0, a1148; RV64IZFINX-NEXT: ret149 %a = call float @llvm.floor.f32(float %x)150 %b = call i64 @llvm.fptosi.sat.i64.f32(float %a)151 ret i64 %b152}153 154define signext i32 @test_floor_ui32(float %x) {155; CHECKIF-LABEL: test_floor_ui32:156; CHECKIF: # %bb.0:157; CHECKIF-NEXT: fcvt.wu.s a0, fa0, rdn158; CHECKIF-NEXT: feq.s a1, fa0, fa0159; CHECKIF-NEXT: seqz a1, a1160; CHECKIF-NEXT: addi a1, a1, -1161; CHECKIF-NEXT: and a0, a1, a0162; CHECKIF-NEXT: ret163;164; CHECKIZFINX-LABEL: test_floor_ui32:165; CHECKIZFINX: # %bb.0:166; CHECKIZFINX-NEXT: fcvt.wu.s a1, a0, rdn167; CHECKIZFINX-NEXT: feq.s a0, a0, a0168; CHECKIZFINX-NEXT: seqz a0, a0169; CHECKIZFINX-NEXT: addi a0, a0, -1170; CHECKIZFINX-NEXT: and a0, a0, a1171; CHECKIZFINX-NEXT: ret172 %a = call float @llvm.floor.f32(float %x)173 %b = call i32 @llvm.fptoui.sat.i32.f32(float %a)174 ret i32 %b175}176 177define i64 @test_floor_ui64(float %x) nounwind {178; RV32IF-LABEL: test_floor_ui64:179; RV32IF: # %bb.0:180; RV32IF-NEXT: addi sp, sp, -16181; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill182; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill183; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill184; RV32IF-NEXT: fmv.s fs0, fa0185; RV32IF-NEXT: lui a0, 307200186; RV32IF-NEXT: fmv.w.x fa5, a0187; RV32IF-NEXT: fabs.s fa4, fa0188; RV32IF-NEXT: flt.s a0, fa4, fa5189; RV32IF-NEXT: beqz a0, .LBB3_2190; RV32IF-NEXT: # %bb.1:191; RV32IF-NEXT: fcvt.w.s a0, fs0, rdn192; RV32IF-NEXT: fcvt.s.w fa5, a0, rdn193; RV32IF-NEXT: fsgnj.s fs0, fa5, fs0194; RV32IF-NEXT: .LBB3_2:195; RV32IF-NEXT: fmv.w.x fa5, zero196; RV32IF-NEXT: fle.s a0, fa5, fs0197; RV32IF-NEXT: neg s0, a0198; RV32IF-NEXT: fmv.s fa0, fs0199; RV32IF-NEXT: call __fixunssfdi200; RV32IF-NEXT: and a0, s0, a0201; RV32IF-NEXT: lui a2, 391168202; RV32IF-NEXT: and a1, s0, a1203; RV32IF-NEXT: addi a2, a2, -1204; RV32IF-NEXT: fmv.w.x fa5, a2205; RV32IF-NEXT: flt.s a2, fa5, fs0206; RV32IF-NEXT: neg a2, a2207; RV32IF-NEXT: or a0, a2, a0208; RV32IF-NEXT: or a1, a2, a1209; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload210; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload211; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload212; RV32IF-NEXT: addi sp, sp, 16213; RV32IF-NEXT: ret214;215; RV64IF-LABEL: test_floor_ui64:216; RV64IF: # %bb.0:217; RV64IF-NEXT: fcvt.lu.s a0, fa0, rdn218; RV64IF-NEXT: feq.s a1, fa0, fa0219; RV64IF-NEXT: seqz a1, a1220; RV64IF-NEXT: addi a1, a1, -1221; RV64IF-NEXT: and a0, a1, a0222; RV64IF-NEXT: ret223;224; RV32IZFINX-LABEL: test_floor_ui64:225; RV32IZFINX: # %bb.0:226; RV32IZFINX-NEXT: addi sp, sp, -16227; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill228; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill229; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill230; RV32IZFINX-NEXT: mv s0, a0231; RV32IZFINX-NEXT: lui a0, 307200232; RV32IZFINX-NEXT: fabs.s a1, s0233; RV32IZFINX-NEXT: flt.s a0, a1, a0234; RV32IZFINX-NEXT: beqz a0, .LBB3_2235; RV32IZFINX-NEXT: # %bb.1:236; RV32IZFINX-NEXT: fcvt.w.s a0, s0, rdn237; RV32IZFINX-NEXT: fcvt.s.w a0, a0, rdn238; RV32IZFINX-NEXT: fsgnj.s s0, a0, s0239; RV32IZFINX-NEXT: .LBB3_2:240; RV32IZFINX-NEXT: fle.s a0, zero, s0241; RV32IZFINX-NEXT: neg s1, a0242; RV32IZFINX-NEXT: mv a0, s0243; RV32IZFINX-NEXT: call __fixunssfdi244; RV32IZFINX-NEXT: and a0, s1, a0245; RV32IZFINX-NEXT: lui a2, 391168246; RV32IZFINX-NEXT: and a1, s1, a1247; RV32IZFINX-NEXT: addi a2, a2, -1248; RV32IZFINX-NEXT: flt.s a2, a2, s0249; RV32IZFINX-NEXT: neg a2, a2250; RV32IZFINX-NEXT: or a0, a2, a0251; RV32IZFINX-NEXT: or a1, a2, a1252; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload253; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload254; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload255; RV32IZFINX-NEXT: addi sp, sp, 16256; RV32IZFINX-NEXT: ret257;258; RV64IZFINX-LABEL: test_floor_ui64:259; RV64IZFINX: # %bb.0:260; RV64IZFINX-NEXT: fcvt.lu.s a1, a0, rdn261; RV64IZFINX-NEXT: feq.s a0, a0, a0262; RV64IZFINX-NEXT: seqz a0, a0263; RV64IZFINX-NEXT: addi a0, a0, -1264; RV64IZFINX-NEXT: and a0, a0, a1265; RV64IZFINX-NEXT: ret266 %a = call float @llvm.floor.f32(float %x)267 %b = call i64 @llvm.fptoui.sat.i64.f32(float %a)268 ret i64 %b269}270 271define signext i32 @test_ceil_si32(float %x) {272; CHECKIF-LABEL: test_ceil_si32:273; CHECKIF: # %bb.0:274; CHECKIF-NEXT: fcvt.w.s a0, fa0, rup275; CHECKIF-NEXT: feq.s a1, fa0, fa0276; CHECKIF-NEXT: seqz a1, a1277; CHECKIF-NEXT: addi a1, a1, -1278; CHECKIF-NEXT: and a0, a1, a0279; CHECKIF-NEXT: ret280;281; CHECKIZFINX-LABEL: test_ceil_si32:282; CHECKIZFINX: # %bb.0:283; CHECKIZFINX-NEXT: fcvt.w.s a1, a0, rup284; CHECKIZFINX-NEXT: feq.s a0, a0, a0285; CHECKIZFINX-NEXT: seqz a0, a0286; CHECKIZFINX-NEXT: addi a0, a0, -1287; CHECKIZFINX-NEXT: and a0, a0, a1288; CHECKIZFINX-NEXT: ret289 %a = call float @llvm.ceil.f32(float %x)290 %b = call i32 @llvm.fptosi.sat.i32.f32(float %a)291 ret i32 %b292}293 294define i64 @test_ceil_si64(float %x) nounwind {295; RV32IF-LABEL: test_ceil_si64:296; RV32IF: # %bb.0:297; RV32IF-NEXT: addi sp, sp, -16298; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill299; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill300; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill301; RV32IF-NEXT: fmv.s fs0, fa0302; RV32IF-NEXT: lui a0, 307200303; RV32IF-NEXT: fmv.w.x fa5, a0304; RV32IF-NEXT: fabs.s fa4, fa0305; RV32IF-NEXT: flt.s a0, fa4, fa5306; RV32IF-NEXT: beqz a0, .LBB5_2307; RV32IF-NEXT: # %bb.1:308; RV32IF-NEXT: fcvt.w.s a0, fs0, rup309; RV32IF-NEXT: fcvt.s.w fa5, a0, rup310; RV32IF-NEXT: fsgnj.s fs0, fa5, fs0311; RV32IF-NEXT: .LBB5_2:312; RV32IF-NEXT: lui a0, 913408313; RV32IF-NEXT: fmv.w.x fa5, a0314; RV32IF-NEXT: fle.s s0, fa5, fs0315; RV32IF-NEXT: fmv.s fa0, fs0316; RV32IF-NEXT: call __fixsfdi317; RV32IF-NEXT: lui a3, 524288318; RV32IF-NEXT: lui a2, 524288319; RV32IF-NEXT: beqz s0, .LBB5_4320; RV32IF-NEXT: # %bb.3:321; RV32IF-NEXT: mv a2, a1322; RV32IF-NEXT: .LBB5_4:323; RV32IF-NEXT: lui a1, 389120324; RV32IF-NEXT: addi a1, a1, -1325; RV32IF-NEXT: fmv.w.x fa5, a1326; RV32IF-NEXT: flt.s a1, fa5, fs0327; RV32IF-NEXT: beqz a1, .LBB5_6328; RV32IF-NEXT: # %bb.5:329; RV32IF-NEXT: addi a2, a3, -1330; RV32IF-NEXT: .LBB5_6:331; RV32IF-NEXT: feq.s a3, fs0, fs0332; RV32IF-NEXT: neg a4, s0333; RV32IF-NEXT: neg a5, a1334; RV32IF-NEXT: neg a3, a3335; RV32IF-NEXT: and a0, a4, a0336; RV32IF-NEXT: and a1, a3, a2337; RV32IF-NEXT: or a0, a5, a0338; RV32IF-NEXT: and a0, a3, a0339; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload340; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload341; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload342; RV32IF-NEXT: addi sp, sp, 16343; RV32IF-NEXT: ret344;345; RV64IF-LABEL: test_ceil_si64:346; RV64IF: # %bb.0:347; RV64IF-NEXT: fcvt.l.s a0, fa0, rup348; RV64IF-NEXT: feq.s a1, fa0, fa0349; RV64IF-NEXT: seqz a1, a1350; RV64IF-NEXT: addi a1, a1, -1351; RV64IF-NEXT: and a0, a1, a0352; RV64IF-NEXT: ret353;354; RV32IZFINX-LABEL: test_ceil_si64:355; RV32IZFINX: # %bb.0:356; RV32IZFINX-NEXT: addi sp, sp, -16357; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill358; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill359; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill360; RV32IZFINX-NEXT: mv s0, a0361; RV32IZFINX-NEXT: lui a0, 307200362; RV32IZFINX-NEXT: fabs.s a1, s0363; RV32IZFINX-NEXT: flt.s a0, a1, a0364; RV32IZFINX-NEXT: beqz a0, .LBB5_2365; RV32IZFINX-NEXT: # %bb.1:366; RV32IZFINX-NEXT: fcvt.w.s a0, s0, rup367; RV32IZFINX-NEXT: fcvt.s.w a0, a0, rup368; RV32IZFINX-NEXT: fsgnj.s s0, a0, s0369; RV32IZFINX-NEXT: .LBB5_2:370; RV32IZFINX-NEXT: lui a0, 913408371; RV32IZFINX-NEXT: fle.s s1, a0, s0372; RV32IZFINX-NEXT: mv a0, s0373; RV32IZFINX-NEXT: call __fixsfdi374; RV32IZFINX-NEXT: lui a3, 524288375; RV32IZFINX-NEXT: lui a2, 524288376; RV32IZFINX-NEXT: beqz s1, .LBB5_4377; RV32IZFINX-NEXT: # %bb.3:378; RV32IZFINX-NEXT: mv a2, a1379; RV32IZFINX-NEXT: .LBB5_4:380; RV32IZFINX-NEXT: lui a1, 389120381; RV32IZFINX-NEXT: addi a1, a1, -1382; RV32IZFINX-NEXT: flt.s a1, a1, s0383; RV32IZFINX-NEXT: beqz a1, .LBB5_6384; RV32IZFINX-NEXT: # %bb.5:385; RV32IZFINX-NEXT: addi a2, a3, -1386; RV32IZFINX-NEXT: .LBB5_6:387; RV32IZFINX-NEXT: feq.s a3, s0, s0388; RV32IZFINX-NEXT: neg a4, s1389; RV32IZFINX-NEXT: neg a5, a1390; RV32IZFINX-NEXT: neg a3, a3391; RV32IZFINX-NEXT: and a0, a4, a0392; RV32IZFINX-NEXT: and a1, a3, a2393; RV32IZFINX-NEXT: or a0, a5, a0394; RV32IZFINX-NEXT: and a0, a3, a0395; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload396; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload397; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload398; RV32IZFINX-NEXT: addi sp, sp, 16399; RV32IZFINX-NEXT: ret400;401; RV64IZFINX-LABEL: test_ceil_si64:402; RV64IZFINX: # %bb.0:403; RV64IZFINX-NEXT: fcvt.l.s a1, a0, rup404; RV64IZFINX-NEXT: feq.s a0, a0, a0405; RV64IZFINX-NEXT: seqz a0, a0406; RV64IZFINX-NEXT: addi a0, a0, -1407; RV64IZFINX-NEXT: and a0, a0, a1408; RV64IZFINX-NEXT: ret409 %a = call float @llvm.ceil.f32(float %x)410 %b = call i64 @llvm.fptosi.sat.i64.f32(float %a)411 ret i64 %b412}413 414define signext i32 @test_ceil_ui32(float %x) {415; CHECKIF-LABEL: test_ceil_ui32:416; CHECKIF: # %bb.0:417; CHECKIF-NEXT: fcvt.wu.s a0, fa0, rup418; CHECKIF-NEXT: feq.s a1, fa0, fa0419; CHECKIF-NEXT: seqz a1, a1420; CHECKIF-NEXT: addi a1, a1, -1421; CHECKIF-NEXT: and a0, a1, a0422; CHECKIF-NEXT: ret423;424; CHECKIZFINX-LABEL: test_ceil_ui32:425; CHECKIZFINX: # %bb.0:426; CHECKIZFINX-NEXT: fcvt.wu.s a1, a0, rup427; CHECKIZFINX-NEXT: feq.s a0, a0, a0428; CHECKIZFINX-NEXT: seqz a0, a0429; CHECKIZFINX-NEXT: addi a0, a0, -1430; CHECKIZFINX-NEXT: and a0, a0, a1431; CHECKIZFINX-NEXT: ret432 %a = call float @llvm.ceil.f32(float %x)433 %b = call i32 @llvm.fptoui.sat.i32.f32(float %a)434 ret i32 %b435}436 437define i64 @test_ceil_ui64(float %x) nounwind {438; RV32IF-LABEL: test_ceil_ui64:439; RV32IF: # %bb.0:440; RV32IF-NEXT: addi sp, sp, -16441; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill442; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill443; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill444; RV32IF-NEXT: fmv.s fs0, fa0445; RV32IF-NEXT: lui a0, 307200446; RV32IF-NEXT: fmv.w.x fa5, a0447; RV32IF-NEXT: fabs.s fa4, fa0448; RV32IF-NEXT: flt.s a0, fa4, fa5449; RV32IF-NEXT: beqz a0, .LBB7_2450; RV32IF-NEXT: # %bb.1:451; RV32IF-NEXT: fcvt.w.s a0, fs0, rup452; RV32IF-NEXT: fcvt.s.w fa5, a0, rup453; RV32IF-NEXT: fsgnj.s fs0, fa5, fs0454; RV32IF-NEXT: .LBB7_2:455; RV32IF-NEXT: fmv.w.x fa5, zero456; RV32IF-NEXT: fle.s a0, fa5, fs0457; RV32IF-NEXT: neg s0, a0458; RV32IF-NEXT: fmv.s fa0, fs0459; RV32IF-NEXT: call __fixunssfdi460; RV32IF-NEXT: and a0, s0, a0461; RV32IF-NEXT: lui a2, 391168462; RV32IF-NEXT: and a1, s0, a1463; RV32IF-NEXT: addi a2, a2, -1464; RV32IF-NEXT: fmv.w.x fa5, a2465; RV32IF-NEXT: flt.s a2, fa5, fs0466; RV32IF-NEXT: neg a2, a2467; RV32IF-NEXT: or a0, a2, a0468; RV32IF-NEXT: or a1, a2, a1469; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload470; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload471; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload472; RV32IF-NEXT: addi sp, sp, 16473; RV32IF-NEXT: ret474;475; RV64IF-LABEL: test_ceil_ui64:476; RV64IF: # %bb.0:477; RV64IF-NEXT: fcvt.lu.s a0, fa0, rup478; RV64IF-NEXT: feq.s a1, fa0, fa0479; RV64IF-NEXT: seqz a1, a1480; RV64IF-NEXT: addi a1, a1, -1481; RV64IF-NEXT: and a0, a1, a0482; RV64IF-NEXT: ret483;484; RV32IZFINX-LABEL: test_ceil_ui64:485; RV32IZFINX: # %bb.0:486; RV32IZFINX-NEXT: addi sp, sp, -16487; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill488; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill489; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill490; RV32IZFINX-NEXT: mv s0, a0491; RV32IZFINX-NEXT: lui a0, 307200492; RV32IZFINX-NEXT: fabs.s a1, s0493; RV32IZFINX-NEXT: flt.s a0, a1, a0494; RV32IZFINX-NEXT: beqz a0, .LBB7_2495; RV32IZFINX-NEXT: # %bb.1:496; RV32IZFINX-NEXT: fcvt.w.s a0, s0, rup497; RV32IZFINX-NEXT: fcvt.s.w a0, a0, rup498; RV32IZFINX-NEXT: fsgnj.s s0, a0, s0499; RV32IZFINX-NEXT: .LBB7_2:500; RV32IZFINX-NEXT: fle.s a0, zero, s0501; RV32IZFINX-NEXT: neg s1, a0502; RV32IZFINX-NEXT: mv a0, s0503; RV32IZFINX-NEXT: call __fixunssfdi504; RV32IZFINX-NEXT: and a0, s1, a0505; RV32IZFINX-NEXT: lui a2, 391168506; RV32IZFINX-NEXT: and a1, s1, a1507; RV32IZFINX-NEXT: addi a2, a2, -1508; RV32IZFINX-NEXT: flt.s a2, a2, s0509; RV32IZFINX-NEXT: neg a2, a2510; RV32IZFINX-NEXT: or a0, a2, a0511; RV32IZFINX-NEXT: or a1, a2, a1512; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload513; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload514; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload515; RV32IZFINX-NEXT: addi sp, sp, 16516; RV32IZFINX-NEXT: ret517;518; RV64IZFINX-LABEL: test_ceil_ui64:519; RV64IZFINX: # %bb.0:520; RV64IZFINX-NEXT: fcvt.lu.s a1, a0, rup521; RV64IZFINX-NEXT: feq.s a0, a0, a0522; RV64IZFINX-NEXT: seqz a0, a0523; RV64IZFINX-NEXT: addi a0, a0, -1524; RV64IZFINX-NEXT: and a0, a0, a1525; RV64IZFINX-NEXT: ret526 %a = call float @llvm.ceil.f32(float %x)527 %b = call i64 @llvm.fptoui.sat.i64.f32(float %a)528 ret i64 %b529}530 531define signext i32 @test_trunc_si32(float %x) {532; CHECKIF-LABEL: test_trunc_si32:533; CHECKIF: # %bb.0:534; CHECKIF-NEXT: fcvt.w.s a0, fa0, rtz535; CHECKIF-NEXT: feq.s a1, fa0, fa0536; CHECKIF-NEXT: seqz a1, a1537; CHECKIF-NEXT: addi a1, a1, -1538; CHECKIF-NEXT: and a0, a1, a0539; CHECKIF-NEXT: ret540;541; CHECKIZFINX-LABEL: test_trunc_si32:542; CHECKIZFINX: # %bb.0:543; CHECKIZFINX-NEXT: fcvt.w.s a1, a0, rtz544; CHECKIZFINX-NEXT: feq.s a0, a0, a0545; CHECKIZFINX-NEXT: seqz a0, a0546; CHECKIZFINX-NEXT: addi a0, a0, -1547; CHECKIZFINX-NEXT: and a0, a0, a1548; CHECKIZFINX-NEXT: ret549 %a = call float @llvm.trunc.f32(float %x)550 %b = call i32 @llvm.fptosi.sat.i32.f32(float %a)551 ret i32 %b552}553 554define i64 @test_trunc_si64(float %x) nounwind {555; RV32IF-LABEL: test_trunc_si64:556; RV32IF: # %bb.0:557; RV32IF-NEXT: addi sp, sp, -16558; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill559; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill560; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill561; RV32IF-NEXT: fmv.s fs0, fa0562; RV32IF-NEXT: lui a0, 307200563; RV32IF-NEXT: fmv.w.x fa5, a0564; RV32IF-NEXT: fabs.s fa4, fa0565; RV32IF-NEXT: flt.s a0, fa4, fa5566; RV32IF-NEXT: beqz a0, .LBB9_2567; RV32IF-NEXT: # %bb.1:568; RV32IF-NEXT: fcvt.w.s a0, fs0, rtz569; RV32IF-NEXT: fcvt.s.w fa5, a0, rtz570; RV32IF-NEXT: fsgnj.s fs0, fa5, fs0571; RV32IF-NEXT: .LBB9_2:572; RV32IF-NEXT: lui a0, 913408573; RV32IF-NEXT: fmv.w.x fa5, a0574; RV32IF-NEXT: fle.s s0, fa5, fs0575; RV32IF-NEXT: fmv.s fa0, fs0576; RV32IF-NEXT: call __fixsfdi577; RV32IF-NEXT: lui a3, 524288578; RV32IF-NEXT: lui a2, 524288579; RV32IF-NEXT: beqz s0, .LBB9_4580; RV32IF-NEXT: # %bb.3:581; RV32IF-NEXT: mv a2, a1582; RV32IF-NEXT: .LBB9_4:583; RV32IF-NEXT: lui a1, 389120584; RV32IF-NEXT: addi a1, a1, -1585; RV32IF-NEXT: fmv.w.x fa5, a1586; RV32IF-NEXT: flt.s a1, fa5, fs0587; RV32IF-NEXT: beqz a1, .LBB9_6588; RV32IF-NEXT: # %bb.5:589; RV32IF-NEXT: addi a2, a3, -1590; RV32IF-NEXT: .LBB9_6:591; RV32IF-NEXT: feq.s a3, fs0, fs0592; RV32IF-NEXT: neg a4, s0593; RV32IF-NEXT: neg a5, a1594; RV32IF-NEXT: neg a3, a3595; RV32IF-NEXT: and a0, a4, a0596; RV32IF-NEXT: and a1, a3, a2597; RV32IF-NEXT: or a0, a5, a0598; RV32IF-NEXT: and a0, a3, a0599; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload600; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload601; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload602; RV32IF-NEXT: addi sp, sp, 16603; RV32IF-NEXT: ret604;605; RV64IF-LABEL: test_trunc_si64:606; RV64IF: # %bb.0:607; RV64IF-NEXT: fcvt.l.s a0, fa0, rtz608; RV64IF-NEXT: feq.s a1, fa0, fa0609; RV64IF-NEXT: seqz a1, a1610; RV64IF-NEXT: addi a1, a1, -1611; RV64IF-NEXT: and a0, a1, a0612; RV64IF-NEXT: ret613;614; RV32IZFINX-LABEL: test_trunc_si64:615; RV32IZFINX: # %bb.0:616; RV32IZFINX-NEXT: addi sp, sp, -16617; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill618; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill619; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill620; RV32IZFINX-NEXT: mv s0, a0621; RV32IZFINX-NEXT: lui a0, 307200622; RV32IZFINX-NEXT: fabs.s a1, s0623; RV32IZFINX-NEXT: flt.s a0, a1, a0624; RV32IZFINX-NEXT: beqz a0, .LBB9_2625; RV32IZFINX-NEXT: # %bb.1:626; RV32IZFINX-NEXT: fcvt.w.s a0, s0, rtz627; RV32IZFINX-NEXT: fcvt.s.w a0, a0, rtz628; RV32IZFINX-NEXT: fsgnj.s s0, a0, s0629; RV32IZFINX-NEXT: .LBB9_2:630; RV32IZFINX-NEXT: lui a0, 913408631; RV32IZFINX-NEXT: fle.s s1, a0, s0632; RV32IZFINX-NEXT: mv a0, s0633; RV32IZFINX-NEXT: call __fixsfdi634; RV32IZFINX-NEXT: lui a3, 524288635; RV32IZFINX-NEXT: lui a2, 524288636; RV32IZFINX-NEXT: beqz s1, .LBB9_4637; RV32IZFINX-NEXT: # %bb.3:638; RV32IZFINX-NEXT: mv a2, a1639; RV32IZFINX-NEXT: .LBB9_4:640; RV32IZFINX-NEXT: lui a1, 389120641; RV32IZFINX-NEXT: addi a1, a1, -1642; RV32IZFINX-NEXT: flt.s a1, a1, s0643; RV32IZFINX-NEXT: beqz a1, .LBB9_6644; RV32IZFINX-NEXT: # %bb.5:645; RV32IZFINX-NEXT: addi a2, a3, -1646; RV32IZFINX-NEXT: .LBB9_6:647; RV32IZFINX-NEXT: feq.s a3, s0, s0648; RV32IZFINX-NEXT: neg a4, s1649; RV32IZFINX-NEXT: neg a5, a1650; RV32IZFINX-NEXT: neg a3, a3651; RV32IZFINX-NEXT: and a0, a4, a0652; RV32IZFINX-NEXT: and a1, a3, a2653; RV32IZFINX-NEXT: or a0, a5, a0654; RV32IZFINX-NEXT: and a0, a3, a0655; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload656; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload657; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload658; RV32IZFINX-NEXT: addi sp, sp, 16659; RV32IZFINX-NEXT: ret660;661; RV64IZFINX-LABEL: test_trunc_si64:662; RV64IZFINX: # %bb.0:663; RV64IZFINX-NEXT: fcvt.l.s a1, a0, rtz664; RV64IZFINX-NEXT: feq.s a0, a0, a0665; RV64IZFINX-NEXT: seqz a0, a0666; RV64IZFINX-NEXT: addi a0, a0, -1667; RV64IZFINX-NEXT: and a0, a0, a1668; RV64IZFINX-NEXT: ret669 %a = call float @llvm.trunc.f32(float %x)670 %b = call i64 @llvm.fptosi.sat.i64.f32(float %a)671 ret i64 %b672}673 674define signext i32 @test_trunc_ui32(float %x) {675; CHECKIF-LABEL: test_trunc_ui32:676; CHECKIF: # %bb.0:677; CHECKIF-NEXT: fcvt.wu.s a0, fa0, rtz678; CHECKIF-NEXT: feq.s a1, fa0, fa0679; CHECKIF-NEXT: seqz a1, a1680; CHECKIF-NEXT: addi a1, a1, -1681; CHECKIF-NEXT: and a0, a1, a0682; CHECKIF-NEXT: ret683;684; CHECKIZFINX-LABEL: test_trunc_ui32:685; CHECKIZFINX: # %bb.0:686; CHECKIZFINX-NEXT: fcvt.wu.s a1, a0, rtz687; CHECKIZFINX-NEXT: feq.s a0, a0, a0688; CHECKIZFINX-NEXT: seqz a0, a0689; CHECKIZFINX-NEXT: addi a0, a0, -1690; CHECKIZFINX-NEXT: and a0, a0, a1691; CHECKIZFINX-NEXT: ret692 %a = call float @llvm.trunc.f32(float %x)693 %b = call i32 @llvm.fptoui.sat.i32.f32(float %a)694 ret i32 %b695}696 697define i64 @test_trunc_ui64(float %x) nounwind {698; RV32IF-LABEL: test_trunc_ui64:699; RV32IF: # %bb.0:700; RV32IF-NEXT: addi sp, sp, -16701; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill702; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill703; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill704; RV32IF-NEXT: fmv.s fs0, fa0705; RV32IF-NEXT: lui a0, 307200706; RV32IF-NEXT: fmv.w.x fa5, a0707; RV32IF-NEXT: fabs.s fa4, fa0708; RV32IF-NEXT: flt.s a0, fa4, fa5709; RV32IF-NEXT: beqz a0, .LBB11_2710; RV32IF-NEXT: # %bb.1:711; RV32IF-NEXT: fcvt.w.s a0, fs0, rtz712; RV32IF-NEXT: fcvt.s.w fa5, a0, rtz713; RV32IF-NEXT: fsgnj.s fs0, fa5, fs0714; RV32IF-NEXT: .LBB11_2:715; RV32IF-NEXT: fmv.w.x fa5, zero716; RV32IF-NEXT: fle.s a0, fa5, fs0717; RV32IF-NEXT: neg s0, a0718; RV32IF-NEXT: fmv.s fa0, fs0719; RV32IF-NEXT: call __fixunssfdi720; RV32IF-NEXT: and a0, s0, a0721; RV32IF-NEXT: lui a2, 391168722; RV32IF-NEXT: and a1, s0, a1723; RV32IF-NEXT: addi a2, a2, -1724; RV32IF-NEXT: fmv.w.x fa5, a2725; RV32IF-NEXT: flt.s a2, fa5, fs0726; RV32IF-NEXT: neg a2, a2727; RV32IF-NEXT: or a0, a2, a0728; RV32IF-NEXT: or a1, a2, a1729; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload730; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload731; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload732; RV32IF-NEXT: addi sp, sp, 16733; RV32IF-NEXT: ret734;735; RV64IF-LABEL: test_trunc_ui64:736; RV64IF: # %bb.0:737; RV64IF-NEXT: fcvt.lu.s a0, fa0, rtz738; RV64IF-NEXT: feq.s a1, fa0, fa0739; RV64IF-NEXT: seqz a1, a1740; RV64IF-NEXT: addi a1, a1, -1741; RV64IF-NEXT: and a0, a1, a0742; RV64IF-NEXT: ret743;744; RV32IZFINX-LABEL: test_trunc_ui64:745; RV32IZFINX: # %bb.0:746; RV32IZFINX-NEXT: addi sp, sp, -16747; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill748; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill749; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill750; RV32IZFINX-NEXT: mv s0, a0751; RV32IZFINX-NEXT: lui a0, 307200752; RV32IZFINX-NEXT: fabs.s a1, s0753; RV32IZFINX-NEXT: flt.s a0, a1, a0754; RV32IZFINX-NEXT: beqz a0, .LBB11_2755; RV32IZFINX-NEXT: # %bb.1:756; RV32IZFINX-NEXT: fcvt.w.s a0, s0, rtz757; RV32IZFINX-NEXT: fcvt.s.w a0, a0, rtz758; RV32IZFINX-NEXT: fsgnj.s s0, a0, s0759; RV32IZFINX-NEXT: .LBB11_2:760; RV32IZFINX-NEXT: fle.s a0, zero, s0761; RV32IZFINX-NEXT: neg s1, a0762; RV32IZFINX-NEXT: mv a0, s0763; RV32IZFINX-NEXT: call __fixunssfdi764; RV32IZFINX-NEXT: and a0, s1, a0765; RV32IZFINX-NEXT: lui a2, 391168766; RV32IZFINX-NEXT: and a1, s1, a1767; RV32IZFINX-NEXT: addi a2, a2, -1768; RV32IZFINX-NEXT: flt.s a2, a2, s0769; RV32IZFINX-NEXT: neg a2, a2770; RV32IZFINX-NEXT: or a0, a2, a0771; RV32IZFINX-NEXT: or a1, a2, a1772; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload773; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload774; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload775; RV32IZFINX-NEXT: addi sp, sp, 16776; RV32IZFINX-NEXT: ret777;778; RV64IZFINX-LABEL: test_trunc_ui64:779; RV64IZFINX: # %bb.0:780; RV64IZFINX-NEXT: fcvt.lu.s a1, a0, rtz781; RV64IZFINX-NEXT: feq.s a0, a0, a0782; RV64IZFINX-NEXT: seqz a0, a0783; RV64IZFINX-NEXT: addi a0, a0, -1784; RV64IZFINX-NEXT: and a0, a0, a1785; RV64IZFINX-NEXT: ret786 %a = call float @llvm.trunc.f32(float %x)787 %b = call i64 @llvm.fptoui.sat.i64.f32(float %a)788 ret i64 %b789}790 791define signext i32 @test_round_si32(float %x) {792; CHECKIF-LABEL: test_round_si32:793; CHECKIF: # %bb.0:794; CHECKIF-NEXT: fcvt.w.s a0, fa0, rmm795; CHECKIF-NEXT: feq.s a1, fa0, fa0796; CHECKIF-NEXT: seqz a1, a1797; CHECKIF-NEXT: addi a1, a1, -1798; CHECKIF-NEXT: and a0, a1, a0799; CHECKIF-NEXT: ret800;801; CHECKIZFINX-LABEL: test_round_si32:802; CHECKIZFINX: # %bb.0:803; CHECKIZFINX-NEXT: fcvt.w.s a1, a0, rmm804; CHECKIZFINX-NEXT: feq.s a0, a0, a0805; CHECKIZFINX-NEXT: seqz a0, a0806; CHECKIZFINX-NEXT: addi a0, a0, -1807; CHECKIZFINX-NEXT: and a0, a0, a1808; CHECKIZFINX-NEXT: ret809 %a = call float @llvm.round.f32(float %x)810 %b = call i32 @llvm.fptosi.sat.i32.f32(float %a)811 ret i32 %b812}813 814define i64 @test_round_si64(float %x) nounwind {815; RV32IF-LABEL: test_round_si64:816; RV32IF: # %bb.0:817; RV32IF-NEXT: addi sp, sp, -16818; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill819; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill820; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill821; RV32IF-NEXT: fmv.s fs0, fa0822; RV32IF-NEXT: lui a0, 307200823; RV32IF-NEXT: fmv.w.x fa5, a0824; RV32IF-NEXT: fabs.s fa4, fa0825; RV32IF-NEXT: flt.s a0, fa4, fa5826; RV32IF-NEXT: beqz a0, .LBB13_2827; RV32IF-NEXT: # %bb.1:828; RV32IF-NEXT: fcvt.w.s a0, fs0, rmm829; RV32IF-NEXT: fcvt.s.w fa5, a0, rmm830; RV32IF-NEXT: fsgnj.s fs0, fa5, fs0831; RV32IF-NEXT: .LBB13_2:832; RV32IF-NEXT: lui a0, 913408833; RV32IF-NEXT: fmv.w.x fa5, a0834; RV32IF-NEXT: fle.s s0, fa5, fs0835; RV32IF-NEXT: fmv.s fa0, fs0836; RV32IF-NEXT: call __fixsfdi837; RV32IF-NEXT: lui a3, 524288838; RV32IF-NEXT: lui a2, 524288839; RV32IF-NEXT: beqz s0, .LBB13_4840; RV32IF-NEXT: # %bb.3:841; RV32IF-NEXT: mv a2, a1842; RV32IF-NEXT: .LBB13_4:843; RV32IF-NEXT: lui a1, 389120844; RV32IF-NEXT: addi a1, a1, -1845; RV32IF-NEXT: fmv.w.x fa5, a1846; RV32IF-NEXT: flt.s a1, fa5, fs0847; RV32IF-NEXT: beqz a1, .LBB13_6848; RV32IF-NEXT: # %bb.5:849; RV32IF-NEXT: addi a2, a3, -1850; RV32IF-NEXT: .LBB13_6:851; RV32IF-NEXT: feq.s a3, fs0, fs0852; RV32IF-NEXT: neg a4, s0853; RV32IF-NEXT: neg a5, a1854; RV32IF-NEXT: neg a3, a3855; RV32IF-NEXT: and a0, a4, a0856; RV32IF-NEXT: and a1, a3, a2857; RV32IF-NEXT: or a0, a5, a0858; RV32IF-NEXT: and a0, a3, a0859; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload860; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload861; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload862; RV32IF-NEXT: addi sp, sp, 16863; RV32IF-NEXT: ret864;865; RV64IF-LABEL: test_round_si64:866; RV64IF: # %bb.0:867; RV64IF-NEXT: fcvt.l.s a0, fa0, rmm868; RV64IF-NEXT: feq.s a1, fa0, fa0869; RV64IF-NEXT: seqz a1, a1870; RV64IF-NEXT: addi a1, a1, -1871; RV64IF-NEXT: and a0, a1, a0872; RV64IF-NEXT: ret873;874; RV32IZFINX-LABEL: test_round_si64:875; RV32IZFINX: # %bb.0:876; RV32IZFINX-NEXT: addi sp, sp, -16877; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill878; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill879; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill880; RV32IZFINX-NEXT: mv s0, a0881; RV32IZFINX-NEXT: lui a0, 307200882; RV32IZFINX-NEXT: fabs.s a1, s0883; RV32IZFINX-NEXT: flt.s a0, a1, a0884; RV32IZFINX-NEXT: beqz a0, .LBB13_2885; RV32IZFINX-NEXT: # %bb.1:886; RV32IZFINX-NEXT: fcvt.w.s a0, s0, rmm887; RV32IZFINX-NEXT: fcvt.s.w a0, a0, rmm888; RV32IZFINX-NEXT: fsgnj.s s0, a0, s0889; RV32IZFINX-NEXT: .LBB13_2:890; RV32IZFINX-NEXT: lui a0, 913408891; RV32IZFINX-NEXT: fle.s s1, a0, s0892; RV32IZFINX-NEXT: mv a0, s0893; RV32IZFINX-NEXT: call __fixsfdi894; RV32IZFINX-NEXT: lui a3, 524288895; RV32IZFINX-NEXT: lui a2, 524288896; RV32IZFINX-NEXT: beqz s1, .LBB13_4897; RV32IZFINX-NEXT: # %bb.3:898; RV32IZFINX-NEXT: mv a2, a1899; RV32IZFINX-NEXT: .LBB13_4:900; RV32IZFINX-NEXT: lui a1, 389120901; RV32IZFINX-NEXT: addi a1, a1, -1902; RV32IZFINX-NEXT: flt.s a1, a1, s0903; RV32IZFINX-NEXT: beqz a1, .LBB13_6904; RV32IZFINX-NEXT: # %bb.5:905; RV32IZFINX-NEXT: addi a2, a3, -1906; RV32IZFINX-NEXT: .LBB13_6:907; RV32IZFINX-NEXT: feq.s a3, s0, s0908; RV32IZFINX-NEXT: neg a4, s1909; RV32IZFINX-NEXT: neg a5, a1910; RV32IZFINX-NEXT: neg a3, a3911; RV32IZFINX-NEXT: and a0, a4, a0912; RV32IZFINX-NEXT: and a1, a3, a2913; RV32IZFINX-NEXT: or a0, a5, a0914; RV32IZFINX-NEXT: and a0, a3, a0915; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload916; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload917; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload918; RV32IZFINX-NEXT: addi sp, sp, 16919; RV32IZFINX-NEXT: ret920;921; RV64IZFINX-LABEL: test_round_si64:922; RV64IZFINX: # %bb.0:923; RV64IZFINX-NEXT: fcvt.l.s a1, a0, rmm924; RV64IZFINX-NEXT: feq.s a0, a0, a0925; RV64IZFINX-NEXT: seqz a0, a0926; RV64IZFINX-NEXT: addi a0, a0, -1927; RV64IZFINX-NEXT: and a0, a0, a1928; RV64IZFINX-NEXT: ret929 %a = call float @llvm.round.f32(float %x)930 %b = call i64 @llvm.fptosi.sat.i64.f32(float %a)931 ret i64 %b932}933 934define signext i32 @test_round_ui32(float %x) {935; CHECKIF-LABEL: test_round_ui32:936; CHECKIF: # %bb.0:937; CHECKIF-NEXT: fcvt.wu.s a0, fa0, rmm938; CHECKIF-NEXT: feq.s a1, fa0, fa0939; CHECKIF-NEXT: seqz a1, a1940; CHECKIF-NEXT: addi a1, a1, -1941; CHECKIF-NEXT: and a0, a1, a0942; CHECKIF-NEXT: ret943;944; CHECKIZFINX-LABEL: test_round_ui32:945; CHECKIZFINX: # %bb.0:946; CHECKIZFINX-NEXT: fcvt.wu.s a1, a0, rmm947; CHECKIZFINX-NEXT: feq.s a0, a0, a0948; CHECKIZFINX-NEXT: seqz a0, a0949; CHECKIZFINX-NEXT: addi a0, a0, -1950; CHECKIZFINX-NEXT: and a0, a0, a1951; CHECKIZFINX-NEXT: ret952 %a = call float @llvm.round.f32(float %x)953 %b = call i32 @llvm.fptoui.sat.i32.f32(float %a)954 ret i32 %b955}956 957define i64 @test_round_ui64(float %x) nounwind {958; RV32IF-LABEL: test_round_ui64:959; RV32IF: # %bb.0:960; RV32IF-NEXT: addi sp, sp, -16961; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill962; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill963; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill964; RV32IF-NEXT: fmv.s fs0, fa0965; RV32IF-NEXT: lui a0, 307200966; RV32IF-NEXT: fmv.w.x fa5, a0967; RV32IF-NEXT: fabs.s fa4, fa0968; RV32IF-NEXT: flt.s a0, fa4, fa5969; RV32IF-NEXT: beqz a0, .LBB15_2970; RV32IF-NEXT: # %bb.1:971; RV32IF-NEXT: fcvt.w.s a0, fs0, rmm972; RV32IF-NEXT: fcvt.s.w fa5, a0, rmm973; RV32IF-NEXT: fsgnj.s fs0, fa5, fs0974; RV32IF-NEXT: .LBB15_2:975; RV32IF-NEXT: fmv.w.x fa5, zero976; RV32IF-NEXT: fle.s a0, fa5, fs0977; RV32IF-NEXT: neg s0, a0978; RV32IF-NEXT: fmv.s fa0, fs0979; RV32IF-NEXT: call __fixunssfdi980; RV32IF-NEXT: and a0, s0, a0981; RV32IF-NEXT: lui a2, 391168982; RV32IF-NEXT: and a1, s0, a1983; RV32IF-NEXT: addi a2, a2, -1984; RV32IF-NEXT: fmv.w.x fa5, a2985; RV32IF-NEXT: flt.s a2, fa5, fs0986; RV32IF-NEXT: neg a2, a2987; RV32IF-NEXT: or a0, a2, a0988; RV32IF-NEXT: or a1, a2, a1989; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload990; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload991; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload992; RV32IF-NEXT: addi sp, sp, 16993; RV32IF-NEXT: ret994;995; RV64IF-LABEL: test_round_ui64:996; RV64IF: # %bb.0:997; RV64IF-NEXT: fcvt.lu.s a0, fa0, rmm998; RV64IF-NEXT: feq.s a1, fa0, fa0999; RV64IF-NEXT: seqz a1, a11000; RV64IF-NEXT: addi a1, a1, -11001; RV64IF-NEXT: and a0, a1, a01002; RV64IF-NEXT: ret1003;1004; RV32IZFINX-LABEL: test_round_ui64:1005; RV32IZFINX: # %bb.0:1006; RV32IZFINX-NEXT: addi sp, sp, -161007; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1008; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1009; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill1010; RV32IZFINX-NEXT: mv s0, a01011; RV32IZFINX-NEXT: lui a0, 3072001012; RV32IZFINX-NEXT: fabs.s a1, s01013; RV32IZFINX-NEXT: flt.s a0, a1, a01014; RV32IZFINX-NEXT: beqz a0, .LBB15_21015; RV32IZFINX-NEXT: # %bb.1:1016; RV32IZFINX-NEXT: fcvt.w.s a0, s0, rmm1017; RV32IZFINX-NEXT: fcvt.s.w a0, a0, rmm1018; RV32IZFINX-NEXT: fsgnj.s s0, a0, s01019; RV32IZFINX-NEXT: .LBB15_2:1020; RV32IZFINX-NEXT: fle.s a0, zero, s01021; RV32IZFINX-NEXT: neg s1, a01022; RV32IZFINX-NEXT: mv a0, s01023; RV32IZFINX-NEXT: call __fixunssfdi1024; RV32IZFINX-NEXT: and a0, s1, a01025; RV32IZFINX-NEXT: lui a2, 3911681026; RV32IZFINX-NEXT: and a1, s1, a11027; RV32IZFINX-NEXT: addi a2, a2, -11028; RV32IZFINX-NEXT: flt.s a2, a2, s01029; RV32IZFINX-NEXT: neg a2, a21030; RV32IZFINX-NEXT: or a0, a2, a01031; RV32IZFINX-NEXT: or a1, a2, a11032; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1033; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1034; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload1035; RV32IZFINX-NEXT: addi sp, sp, 161036; RV32IZFINX-NEXT: ret1037;1038; RV64IZFINX-LABEL: test_round_ui64:1039; RV64IZFINX: # %bb.0:1040; RV64IZFINX-NEXT: fcvt.lu.s a1, a0, rmm1041; RV64IZFINX-NEXT: feq.s a0, a0, a01042; RV64IZFINX-NEXT: seqz a0, a01043; RV64IZFINX-NEXT: addi a0, a0, -11044; RV64IZFINX-NEXT: and a0, a0, a11045; RV64IZFINX-NEXT: ret1046 %a = call float @llvm.round.f32(float %x)1047 %b = call i64 @llvm.fptoui.sat.i64.f32(float %a)1048 ret i64 %b1049}1050 1051define signext i32 @test_roundeven_si32(float %x) {1052; CHECKIF-LABEL: test_roundeven_si32:1053; CHECKIF: # %bb.0:1054; CHECKIF-NEXT: fcvt.w.s a0, fa0, rne1055; CHECKIF-NEXT: feq.s a1, fa0, fa01056; CHECKIF-NEXT: seqz a1, a11057; CHECKIF-NEXT: addi a1, a1, -11058; CHECKIF-NEXT: and a0, a1, a01059; CHECKIF-NEXT: ret1060;1061; CHECKIZFINX-LABEL: test_roundeven_si32:1062; CHECKIZFINX: # %bb.0:1063; CHECKIZFINX-NEXT: fcvt.w.s a1, a0, rne1064; CHECKIZFINX-NEXT: feq.s a0, a0, a01065; CHECKIZFINX-NEXT: seqz a0, a01066; CHECKIZFINX-NEXT: addi a0, a0, -11067; CHECKIZFINX-NEXT: and a0, a0, a11068; CHECKIZFINX-NEXT: ret1069 %a = call float @llvm.roundeven.f32(float %x)1070 %b = call i32 @llvm.fptosi.sat.i32.f32(float %a)1071 ret i32 %b1072}1073 1074define i64 @test_roundeven_si64(float %x) nounwind {1075; RV32IF-LABEL: test_roundeven_si64:1076; RV32IF: # %bb.0:1077; RV32IF-NEXT: addi sp, sp, -161078; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1079; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1080; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill1081; RV32IF-NEXT: fmv.s fs0, fa01082; RV32IF-NEXT: lui a0, 3072001083; RV32IF-NEXT: fmv.w.x fa5, a01084; RV32IF-NEXT: fabs.s fa4, fa01085; RV32IF-NEXT: flt.s a0, fa4, fa51086; RV32IF-NEXT: beqz a0, .LBB17_21087; RV32IF-NEXT: # %bb.1:1088; RV32IF-NEXT: fcvt.w.s a0, fs0, rne1089; RV32IF-NEXT: fcvt.s.w fa5, a0, rne1090; RV32IF-NEXT: fsgnj.s fs0, fa5, fs01091; RV32IF-NEXT: .LBB17_2:1092; RV32IF-NEXT: lui a0, 9134081093; RV32IF-NEXT: fmv.w.x fa5, a01094; RV32IF-NEXT: fle.s s0, fa5, fs01095; RV32IF-NEXT: fmv.s fa0, fs01096; RV32IF-NEXT: call __fixsfdi1097; RV32IF-NEXT: lui a3, 5242881098; RV32IF-NEXT: lui a2, 5242881099; RV32IF-NEXT: beqz s0, .LBB17_41100; RV32IF-NEXT: # %bb.3:1101; RV32IF-NEXT: mv a2, a11102; RV32IF-NEXT: .LBB17_4:1103; RV32IF-NEXT: lui a1, 3891201104; RV32IF-NEXT: addi a1, a1, -11105; RV32IF-NEXT: fmv.w.x fa5, a11106; RV32IF-NEXT: flt.s a1, fa5, fs01107; RV32IF-NEXT: beqz a1, .LBB17_61108; RV32IF-NEXT: # %bb.5:1109; RV32IF-NEXT: addi a2, a3, -11110; RV32IF-NEXT: .LBB17_6:1111; RV32IF-NEXT: feq.s a3, fs0, fs01112; RV32IF-NEXT: neg a4, s01113; RV32IF-NEXT: neg a5, a11114; RV32IF-NEXT: neg a3, a31115; RV32IF-NEXT: and a0, a4, a01116; RV32IF-NEXT: and a1, a3, a21117; RV32IF-NEXT: or a0, a5, a01118; RV32IF-NEXT: and a0, a3, a01119; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1120; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1121; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload1122; RV32IF-NEXT: addi sp, sp, 161123; RV32IF-NEXT: ret1124;1125; RV64IF-LABEL: test_roundeven_si64:1126; RV64IF: # %bb.0:1127; RV64IF-NEXT: fcvt.l.s a0, fa0, rne1128; RV64IF-NEXT: feq.s a1, fa0, fa01129; RV64IF-NEXT: seqz a1, a11130; RV64IF-NEXT: addi a1, a1, -11131; RV64IF-NEXT: and a0, a1, a01132; RV64IF-NEXT: ret1133;1134; RV32IZFINX-LABEL: test_roundeven_si64:1135; RV32IZFINX: # %bb.0:1136; RV32IZFINX-NEXT: addi sp, sp, -161137; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1138; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1139; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill1140; RV32IZFINX-NEXT: mv s0, a01141; RV32IZFINX-NEXT: lui a0, 3072001142; RV32IZFINX-NEXT: fabs.s a1, s01143; RV32IZFINX-NEXT: flt.s a0, a1, a01144; RV32IZFINX-NEXT: beqz a0, .LBB17_21145; RV32IZFINX-NEXT: # %bb.1:1146; RV32IZFINX-NEXT: fcvt.w.s a0, s0, rne1147; RV32IZFINX-NEXT: fcvt.s.w a0, a0, rne1148; RV32IZFINX-NEXT: fsgnj.s s0, a0, s01149; RV32IZFINX-NEXT: .LBB17_2:1150; RV32IZFINX-NEXT: lui a0, 9134081151; RV32IZFINX-NEXT: fle.s s1, a0, s01152; RV32IZFINX-NEXT: mv a0, s01153; RV32IZFINX-NEXT: call __fixsfdi1154; RV32IZFINX-NEXT: lui a3, 5242881155; RV32IZFINX-NEXT: lui a2, 5242881156; RV32IZFINX-NEXT: beqz s1, .LBB17_41157; RV32IZFINX-NEXT: # %bb.3:1158; RV32IZFINX-NEXT: mv a2, a11159; RV32IZFINX-NEXT: .LBB17_4:1160; RV32IZFINX-NEXT: lui a1, 3891201161; RV32IZFINX-NEXT: addi a1, a1, -11162; RV32IZFINX-NEXT: flt.s a1, a1, s01163; RV32IZFINX-NEXT: beqz a1, .LBB17_61164; RV32IZFINX-NEXT: # %bb.5:1165; RV32IZFINX-NEXT: addi a2, a3, -11166; RV32IZFINX-NEXT: .LBB17_6:1167; RV32IZFINX-NEXT: feq.s a3, s0, s01168; RV32IZFINX-NEXT: neg a4, s11169; RV32IZFINX-NEXT: neg a5, a11170; RV32IZFINX-NEXT: neg a3, a31171; RV32IZFINX-NEXT: and a0, a4, a01172; RV32IZFINX-NEXT: and a1, a3, a21173; RV32IZFINX-NEXT: or a0, a5, a01174; RV32IZFINX-NEXT: and a0, a3, a01175; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1176; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1177; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload1178; RV32IZFINX-NEXT: addi sp, sp, 161179; RV32IZFINX-NEXT: ret1180;1181; RV64IZFINX-LABEL: test_roundeven_si64:1182; RV64IZFINX: # %bb.0:1183; RV64IZFINX-NEXT: fcvt.l.s a1, a0, rne1184; RV64IZFINX-NEXT: feq.s a0, a0, a01185; RV64IZFINX-NEXT: seqz a0, a01186; RV64IZFINX-NEXT: addi a0, a0, -11187; RV64IZFINX-NEXT: and a0, a0, a11188; RV64IZFINX-NEXT: ret1189 %a = call float @llvm.roundeven.f32(float %x)1190 %b = call i64 @llvm.fptosi.sat.i64.f32(float %a)1191 ret i64 %b1192}1193 1194define signext i32 @test_roundeven_ui32(float %x) {1195; CHECKIF-LABEL: test_roundeven_ui32:1196; CHECKIF: # %bb.0:1197; CHECKIF-NEXT: fcvt.wu.s a0, fa0, rne1198; CHECKIF-NEXT: feq.s a1, fa0, fa01199; CHECKIF-NEXT: seqz a1, a11200; CHECKIF-NEXT: addi a1, a1, -11201; CHECKIF-NEXT: and a0, a1, a01202; CHECKIF-NEXT: ret1203;1204; CHECKIZFINX-LABEL: test_roundeven_ui32:1205; CHECKIZFINX: # %bb.0:1206; CHECKIZFINX-NEXT: fcvt.wu.s a1, a0, rne1207; CHECKIZFINX-NEXT: feq.s a0, a0, a01208; CHECKIZFINX-NEXT: seqz a0, a01209; CHECKIZFINX-NEXT: addi a0, a0, -11210; CHECKIZFINX-NEXT: and a0, a0, a11211; CHECKIZFINX-NEXT: ret1212 %a = call float @llvm.roundeven.f32(float %x)1213 %b = call i32 @llvm.fptoui.sat.i32.f32(float %a)1214 ret i32 %b1215}1216 1217define i64 @test_roundeven_ui64(float %x) nounwind {1218; RV32IF-LABEL: test_roundeven_ui64:1219; RV32IF: # %bb.0:1220; RV32IF-NEXT: addi sp, sp, -161221; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1222; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1223; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill1224; RV32IF-NEXT: fmv.s fs0, fa01225; RV32IF-NEXT: lui a0, 3072001226; RV32IF-NEXT: fmv.w.x fa5, a01227; RV32IF-NEXT: fabs.s fa4, fa01228; RV32IF-NEXT: flt.s a0, fa4, fa51229; RV32IF-NEXT: beqz a0, .LBB19_21230; RV32IF-NEXT: # %bb.1:1231; RV32IF-NEXT: fcvt.w.s a0, fs0, rne1232; RV32IF-NEXT: fcvt.s.w fa5, a0, rne1233; RV32IF-NEXT: fsgnj.s fs0, fa5, fs01234; RV32IF-NEXT: .LBB19_2:1235; RV32IF-NEXT: fmv.w.x fa5, zero1236; RV32IF-NEXT: fle.s a0, fa5, fs01237; RV32IF-NEXT: neg s0, a01238; RV32IF-NEXT: fmv.s fa0, fs01239; RV32IF-NEXT: call __fixunssfdi1240; RV32IF-NEXT: and a0, s0, a01241; RV32IF-NEXT: lui a2, 3911681242; RV32IF-NEXT: and a1, s0, a11243; RV32IF-NEXT: addi a2, a2, -11244; RV32IF-NEXT: fmv.w.x fa5, a21245; RV32IF-NEXT: flt.s a2, fa5, fs01246; RV32IF-NEXT: neg a2, a21247; RV32IF-NEXT: or a0, a2, a01248; RV32IF-NEXT: or a1, a2, a11249; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1250; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1251; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload1252; RV32IF-NEXT: addi sp, sp, 161253; RV32IF-NEXT: ret1254;1255; RV64IF-LABEL: test_roundeven_ui64:1256; RV64IF: # %bb.0:1257; RV64IF-NEXT: fcvt.lu.s a0, fa0, rne1258; RV64IF-NEXT: feq.s a1, fa0, fa01259; RV64IF-NEXT: seqz a1, a11260; RV64IF-NEXT: addi a1, a1, -11261; RV64IF-NEXT: and a0, a1, a01262; RV64IF-NEXT: ret1263;1264; RV32IZFINX-LABEL: test_roundeven_ui64:1265; RV32IZFINX: # %bb.0:1266; RV32IZFINX-NEXT: addi sp, sp, -161267; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1268; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1269; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill1270; RV32IZFINX-NEXT: mv s0, a01271; RV32IZFINX-NEXT: lui a0, 3072001272; RV32IZFINX-NEXT: fabs.s a1, s01273; RV32IZFINX-NEXT: flt.s a0, a1, a01274; RV32IZFINX-NEXT: beqz a0, .LBB19_21275; RV32IZFINX-NEXT: # %bb.1:1276; RV32IZFINX-NEXT: fcvt.w.s a0, s0, rne1277; RV32IZFINX-NEXT: fcvt.s.w a0, a0, rne1278; RV32IZFINX-NEXT: fsgnj.s s0, a0, s01279; RV32IZFINX-NEXT: .LBB19_2:1280; RV32IZFINX-NEXT: fle.s a0, zero, s01281; RV32IZFINX-NEXT: neg s1, a01282; RV32IZFINX-NEXT: mv a0, s01283; RV32IZFINX-NEXT: call __fixunssfdi1284; RV32IZFINX-NEXT: and a0, s1, a01285; RV32IZFINX-NEXT: lui a2, 3911681286; RV32IZFINX-NEXT: and a1, s1, a11287; RV32IZFINX-NEXT: addi a2, a2, -11288; RV32IZFINX-NEXT: flt.s a2, a2, s01289; RV32IZFINX-NEXT: neg a2, a21290; RV32IZFINX-NEXT: or a0, a2, a01291; RV32IZFINX-NEXT: or a1, a2, a11292; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1293; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1294; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload1295; RV32IZFINX-NEXT: addi sp, sp, 161296; RV32IZFINX-NEXT: ret1297;1298; RV64IZFINX-LABEL: test_roundeven_ui64:1299; RV64IZFINX: # %bb.0:1300; RV64IZFINX-NEXT: fcvt.lu.s a1, a0, rne1301; RV64IZFINX-NEXT: feq.s a0, a0, a01302; RV64IZFINX-NEXT: seqz a0, a01303; RV64IZFINX-NEXT: addi a0, a0, -11304; RV64IZFINX-NEXT: and a0, a0, a11305; RV64IZFINX-NEXT: ret1306 %a = call float @llvm.roundeven.f32(float %x)1307 %b = call i64 @llvm.fptoui.sat.i64.f32(float %a)1308 ret i64 %b1309}1310 1311define signext i32 @test_rint_si32(float %x) {1312; CHECKIF-LABEL: test_rint_si32:1313; CHECKIF: # %bb.0:1314; CHECKIF-NEXT: fcvt.w.s a0, fa01315; CHECKIF-NEXT: feq.s a1, fa0, fa01316; CHECKIF-NEXT: seqz a1, a11317; CHECKIF-NEXT: addi a1, a1, -11318; CHECKIF-NEXT: and a0, a1, a01319; CHECKIF-NEXT: ret1320;1321; CHECKIZFINX-LABEL: test_rint_si32:1322; CHECKIZFINX: # %bb.0:1323; CHECKIZFINX-NEXT: fcvt.w.s a1, a01324; CHECKIZFINX-NEXT: feq.s a0, a0, a01325; CHECKIZFINX-NEXT: seqz a0, a01326; CHECKIZFINX-NEXT: addi a0, a0, -11327; CHECKIZFINX-NEXT: and a0, a0, a11328; CHECKIZFINX-NEXT: ret1329 %a = call float @llvm.rint.f32(float %x)1330 %b = call i32 @llvm.fptosi.sat.i32.f32(float %a)1331 ret i32 %b1332}1333 1334define i64 @test_rint_si64(float %x) nounwind {1335; RV32IF-LABEL: test_rint_si64:1336; RV32IF: # %bb.0:1337; RV32IF-NEXT: addi sp, sp, -161338; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1339; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1340; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill1341; RV32IF-NEXT: fmv.s fs0, fa01342; RV32IF-NEXT: lui a0, 3072001343; RV32IF-NEXT: fmv.w.x fa5, a01344; RV32IF-NEXT: fabs.s fa4, fa01345; RV32IF-NEXT: flt.s a0, fa4, fa51346; RV32IF-NEXT: beqz a0, .LBB21_21347; RV32IF-NEXT: # %bb.1:1348; RV32IF-NEXT: fcvt.w.s a0, fs01349; RV32IF-NEXT: fcvt.s.w fa5, a01350; RV32IF-NEXT: fsgnj.s fs0, fa5, fs01351; RV32IF-NEXT: .LBB21_2:1352; RV32IF-NEXT: lui a0, 9134081353; RV32IF-NEXT: fmv.w.x fa5, a01354; RV32IF-NEXT: fle.s s0, fa5, fs01355; RV32IF-NEXT: fmv.s fa0, fs01356; RV32IF-NEXT: call __fixsfdi1357; RV32IF-NEXT: lui a3, 5242881358; RV32IF-NEXT: lui a2, 5242881359; RV32IF-NEXT: beqz s0, .LBB21_41360; RV32IF-NEXT: # %bb.3:1361; RV32IF-NEXT: mv a2, a11362; RV32IF-NEXT: .LBB21_4:1363; RV32IF-NEXT: lui a1, 3891201364; RV32IF-NEXT: addi a1, a1, -11365; RV32IF-NEXT: fmv.w.x fa5, a11366; RV32IF-NEXT: flt.s a1, fa5, fs01367; RV32IF-NEXT: beqz a1, .LBB21_61368; RV32IF-NEXT: # %bb.5:1369; RV32IF-NEXT: addi a2, a3, -11370; RV32IF-NEXT: .LBB21_6:1371; RV32IF-NEXT: feq.s a3, fs0, fs01372; RV32IF-NEXT: neg a4, s01373; RV32IF-NEXT: neg a5, a11374; RV32IF-NEXT: neg a3, a31375; RV32IF-NEXT: and a0, a4, a01376; RV32IF-NEXT: and a1, a3, a21377; RV32IF-NEXT: or a0, a5, a01378; RV32IF-NEXT: and a0, a3, a01379; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1380; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1381; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload1382; RV32IF-NEXT: addi sp, sp, 161383; RV32IF-NEXT: ret1384;1385; RV64IF-LABEL: test_rint_si64:1386; RV64IF: # %bb.0:1387; RV64IF-NEXT: fcvt.l.s a0, fa01388; RV64IF-NEXT: feq.s a1, fa0, fa01389; RV64IF-NEXT: seqz a1, a11390; RV64IF-NEXT: addi a1, a1, -11391; RV64IF-NEXT: and a0, a1, a01392; RV64IF-NEXT: ret1393;1394; RV32IZFINX-LABEL: test_rint_si64:1395; RV32IZFINX: # %bb.0:1396; RV32IZFINX-NEXT: addi sp, sp, -161397; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1398; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1399; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill1400; RV32IZFINX-NEXT: mv s0, a01401; RV32IZFINX-NEXT: lui a0, 3072001402; RV32IZFINX-NEXT: fabs.s a1, s01403; RV32IZFINX-NEXT: flt.s a0, a1, a01404; RV32IZFINX-NEXT: beqz a0, .LBB21_21405; RV32IZFINX-NEXT: # %bb.1:1406; RV32IZFINX-NEXT: fcvt.w.s a0, s01407; RV32IZFINX-NEXT: fcvt.s.w a0, a01408; RV32IZFINX-NEXT: fsgnj.s s0, a0, s01409; RV32IZFINX-NEXT: .LBB21_2:1410; RV32IZFINX-NEXT: lui a0, 9134081411; RV32IZFINX-NEXT: fle.s s1, a0, s01412; RV32IZFINX-NEXT: mv a0, s01413; RV32IZFINX-NEXT: call __fixsfdi1414; RV32IZFINX-NEXT: lui a3, 5242881415; RV32IZFINX-NEXT: lui a2, 5242881416; RV32IZFINX-NEXT: beqz s1, .LBB21_41417; RV32IZFINX-NEXT: # %bb.3:1418; RV32IZFINX-NEXT: mv a2, a11419; RV32IZFINX-NEXT: .LBB21_4:1420; RV32IZFINX-NEXT: lui a1, 3891201421; RV32IZFINX-NEXT: addi a1, a1, -11422; RV32IZFINX-NEXT: flt.s a1, a1, s01423; RV32IZFINX-NEXT: beqz a1, .LBB21_61424; RV32IZFINX-NEXT: # %bb.5:1425; RV32IZFINX-NEXT: addi a2, a3, -11426; RV32IZFINX-NEXT: .LBB21_6:1427; RV32IZFINX-NEXT: feq.s a3, s0, s01428; RV32IZFINX-NEXT: neg a4, s11429; RV32IZFINX-NEXT: neg a5, a11430; RV32IZFINX-NEXT: neg a3, a31431; RV32IZFINX-NEXT: and a0, a4, a01432; RV32IZFINX-NEXT: and a1, a3, a21433; RV32IZFINX-NEXT: or a0, a5, a01434; RV32IZFINX-NEXT: and a0, a3, a01435; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1436; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1437; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload1438; RV32IZFINX-NEXT: addi sp, sp, 161439; RV32IZFINX-NEXT: ret1440;1441; RV64IZFINX-LABEL: test_rint_si64:1442; RV64IZFINX: # %bb.0:1443; RV64IZFINX-NEXT: fcvt.l.s a1, a01444; RV64IZFINX-NEXT: feq.s a0, a0, a01445; RV64IZFINX-NEXT: seqz a0, a01446; RV64IZFINX-NEXT: addi a0, a0, -11447; RV64IZFINX-NEXT: and a0, a0, a11448; RV64IZFINX-NEXT: ret1449 %a = call float @llvm.rint.f32(float %x)1450 %b = call i64 @llvm.fptosi.sat.i64.f32(float %a)1451 ret i64 %b1452}1453 1454define signext i32 @test_rint_ui32(float %x) {1455; CHECKIF-LABEL: test_rint_ui32:1456; CHECKIF: # %bb.0:1457; CHECKIF-NEXT: fcvt.wu.s a0, fa01458; CHECKIF-NEXT: feq.s a1, fa0, fa01459; CHECKIF-NEXT: seqz a1, a11460; CHECKIF-NEXT: addi a1, a1, -11461; CHECKIF-NEXT: and a0, a1, a01462; CHECKIF-NEXT: ret1463;1464; CHECKIZFINX-LABEL: test_rint_ui32:1465; CHECKIZFINX: # %bb.0:1466; CHECKIZFINX-NEXT: fcvt.wu.s a1, a01467; CHECKIZFINX-NEXT: feq.s a0, a0, a01468; CHECKIZFINX-NEXT: seqz a0, a01469; CHECKIZFINX-NEXT: addi a0, a0, -11470; CHECKIZFINX-NEXT: and a0, a0, a11471; CHECKIZFINX-NEXT: ret1472 %a = call float @llvm.rint.f32(float %x)1473 %b = call i32 @llvm.fptoui.sat.i32.f32(float %a)1474 ret i32 %b1475}1476 1477define i64 @test_rint_ui64(float %x) nounwind {1478; RV32IF-LABEL: test_rint_ui64:1479; RV32IF: # %bb.0:1480; RV32IF-NEXT: addi sp, sp, -161481; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1482; RV32IF-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1483; RV32IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill1484; RV32IF-NEXT: fmv.s fs0, fa01485; RV32IF-NEXT: lui a0, 3072001486; RV32IF-NEXT: fmv.w.x fa5, a01487; RV32IF-NEXT: fabs.s fa4, fa01488; RV32IF-NEXT: flt.s a0, fa4, fa51489; RV32IF-NEXT: beqz a0, .LBB23_21490; RV32IF-NEXT: # %bb.1:1491; RV32IF-NEXT: fcvt.w.s a0, fs01492; RV32IF-NEXT: fcvt.s.w fa5, a01493; RV32IF-NEXT: fsgnj.s fs0, fa5, fs01494; RV32IF-NEXT: .LBB23_2:1495; RV32IF-NEXT: fmv.w.x fa5, zero1496; RV32IF-NEXT: fle.s a0, fa5, fs01497; RV32IF-NEXT: neg s0, a01498; RV32IF-NEXT: fmv.s fa0, fs01499; RV32IF-NEXT: call __fixunssfdi1500; RV32IF-NEXT: and a0, s0, a01501; RV32IF-NEXT: lui a2, 3911681502; RV32IF-NEXT: and a1, s0, a11503; RV32IF-NEXT: addi a2, a2, -11504; RV32IF-NEXT: fmv.w.x fa5, a21505; RV32IF-NEXT: flt.s a2, fa5, fs01506; RV32IF-NEXT: neg a2, a21507; RV32IF-NEXT: or a0, a2, a01508; RV32IF-NEXT: or a1, a2, a11509; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1510; RV32IF-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1511; RV32IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload1512; RV32IF-NEXT: addi sp, sp, 161513; RV32IF-NEXT: ret1514;1515; RV64IF-LABEL: test_rint_ui64:1516; RV64IF: # %bb.0:1517; RV64IF-NEXT: fcvt.lu.s a0, fa01518; RV64IF-NEXT: feq.s a1, fa0, fa01519; RV64IF-NEXT: seqz a1, a11520; RV64IF-NEXT: addi a1, a1, -11521; RV64IF-NEXT: and a0, a1, a01522; RV64IF-NEXT: ret1523;1524; RV32IZFINX-LABEL: test_rint_ui64:1525; RV32IZFINX: # %bb.0:1526; RV32IZFINX-NEXT: addi sp, sp, -161527; RV32IZFINX-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1528; RV32IZFINX-NEXT: sw s0, 8(sp) # 4-byte Folded Spill1529; RV32IZFINX-NEXT: sw s1, 4(sp) # 4-byte Folded Spill1530; RV32IZFINX-NEXT: mv s0, a01531; RV32IZFINX-NEXT: lui a0, 3072001532; RV32IZFINX-NEXT: fabs.s a1, s01533; RV32IZFINX-NEXT: flt.s a0, a1, a01534; RV32IZFINX-NEXT: beqz a0, .LBB23_21535; RV32IZFINX-NEXT: # %bb.1:1536; RV32IZFINX-NEXT: fcvt.w.s a0, s01537; RV32IZFINX-NEXT: fcvt.s.w a0, a01538; RV32IZFINX-NEXT: fsgnj.s s0, a0, s01539; RV32IZFINX-NEXT: .LBB23_2:1540; RV32IZFINX-NEXT: fle.s a0, zero, s01541; RV32IZFINX-NEXT: neg s1, a01542; RV32IZFINX-NEXT: mv a0, s01543; RV32IZFINX-NEXT: call __fixunssfdi1544; RV32IZFINX-NEXT: and a0, s1, a01545; RV32IZFINX-NEXT: lui a2, 3911681546; RV32IZFINX-NEXT: and a1, s1, a11547; RV32IZFINX-NEXT: addi a2, a2, -11548; RV32IZFINX-NEXT: flt.s a2, a2, s01549; RV32IZFINX-NEXT: neg a2, a21550; RV32IZFINX-NEXT: or a0, a2, a01551; RV32IZFINX-NEXT: or a1, a2, a11552; RV32IZFINX-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1553; RV32IZFINX-NEXT: lw s0, 8(sp) # 4-byte Folded Reload1554; RV32IZFINX-NEXT: lw s1, 4(sp) # 4-byte Folded Reload1555; RV32IZFINX-NEXT: addi sp, sp, 161556; RV32IZFINX-NEXT: ret1557;1558; RV64IZFINX-LABEL: test_rint_ui64:1559; RV64IZFINX: # %bb.0:1560; RV64IZFINX-NEXT: fcvt.lu.s a1, a01561; RV64IZFINX-NEXT: feq.s a0, a0, a01562; RV64IZFINX-NEXT: seqz a0, a01563; RV64IZFINX-NEXT: addi a0, a0, -11564; RV64IZFINX-NEXT: and a0, a0, a11565; RV64IZFINX-NEXT: ret1566 %a = call float @llvm.rint.f32(float %x)1567 %b = call i64 @llvm.fptoui.sat.i64.f32(float %a)1568 ret i64 %b1569}1570 1571