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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -mattr=+f -verify-machineinstrs < %s \3; RUN: -target-abi=ilp32f | FileCheck %s4; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \5; RUN: -target-abi=lp64f | FileCheck %s6; RUN: llc -mtriple=riscv32 -mattr=+zfinx -verify-machineinstrs < %s \7; RUN: -target-abi=ilp32 | FileCheck --check-prefix=CHECKZFINX %s8; RUN: llc -mtriple=riscv64 -mattr=+zfinx -verify-machineinstrs < %s \9; RUN: -target-abi=lp64 | FileCheck --check-prefix=CHECKZFINX %s10 11define float @select_icmp_eq(i32 signext %a, i32 signext %b, float %c, float %d) {12; CHECK-LABEL: select_icmp_eq:13; CHECK: # %bb.0:14; CHECK-NEXT: beq a0, a1, .LBB0_215; CHECK-NEXT: # %bb.1:16; CHECK-NEXT: fmv.s fa0, fa117; CHECK-NEXT: .LBB0_2:18; CHECK-NEXT: ret19;20; CHECKZFINX-LABEL: select_icmp_eq:21; CHECKZFINX: # %bb.0:22; CHECKZFINX-NEXT: beq a0, a1, .LBB0_223; CHECKZFINX-NEXT: # %bb.1:24; CHECKZFINX-NEXT: mv a2, a325; CHECKZFINX-NEXT: .LBB0_2:26; CHECKZFINX-NEXT: mv a0, a227; CHECKZFINX-NEXT: ret28 %1 = icmp eq i32 %a, %b29 %2 = select i1 %1, float %c, float %d30 ret float %231}32 33define float @select_icmp_ne(i32 signext %a, i32 signext %b, float %c, float %d) {34; CHECK-LABEL: select_icmp_ne:35; CHECK: # %bb.0:36; CHECK-NEXT: bne a0, a1, .LBB1_237; CHECK-NEXT: # %bb.1:38; CHECK-NEXT: fmv.s fa0, fa139; CHECK-NEXT: .LBB1_2:40; CHECK-NEXT: ret41;42; CHECKZFINX-LABEL: select_icmp_ne:43; CHECKZFINX: # %bb.0:44; CHECKZFINX-NEXT: bne a0, a1, .LBB1_245; CHECKZFINX-NEXT: # %bb.1:46; CHECKZFINX-NEXT: mv a2, a347; CHECKZFINX-NEXT: .LBB1_2:48; CHECKZFINX-NEXT: mv a0, a249; CHECKZFINX-NEXT: ret50 %1 = icmp ne i32 %a, %b51 %2 = select i1 %1, float %c, float %d52 ret float %253}54 55define float @select_icmp_ugt(i32 signext %a, i32 signext %b, float %c, float %d) {56; CHECK-LABEL: select_icmp_ugt:57; CHECK: # %bb.0:58; CHECK-NEXT: bltu a1, a0, .LBB2_259; CHECK-NEXT: # %bb.1:60; CHECK-NEXT: fmv.s fa0, fa161; CHECK-NEXT: .LBB2_2:62; CHECK-NEXT: ret63;64; CHECKZFINX-LABEL: select_icmp_ugt:65; CHECKZFINX: # %bb.0:66; CHECKZFINX-NEXT: bltu a1, a0, .LBB2_267; CHECKZFINX-NEXT: # %bb.1:68; CHECKZFINX-NEXT: mv a2, a369; CHECKZFINX-NEXT: .LBB2_2:70; CHECKZFINX-NEXT: mv a0, a271; CHECKZFINX-NEXT: ret72 %1 = icmp ugt i32 %a, %b73 %2 = select i1 %1, float %c, float %d74 ret float %275}76 77define float @select_icmp_uge(i32 signext %a, i32 signext %b, float %c, float %d) {78; CHECK-LABEL: select_icmp_uge:79; CHECK: # %bb.0:80; CHECK-NEXT: bgeu a0, a1, .LBB3_281; CHECK-NEXT: # %bb.1:82; CHECK-NEXT: fmv.s fa0, fa183; CHECK-NEXT: .LBB3_2:84; CHECK-NEXT: ret85;86; CHECKZFINX-LABEL: select_icmp_uge:87; CHECKZFINX: # %bb.0:88; CHECKZFINX-NEXT: bgeu a0, a1, .LBB3_289; CHECKZFINX-NEXT: # %bb.1:90; CHECKZFINX-NEXT: mv a2, a391; CHECKZFINX-NEXT: .LBB3_2:92; CHECKZFINX-NEXT: mv a0, a293; CHECKZFINX-NEXT: ret94 %1 = icmp uge i32 %a, %b95 %2 = select i1 %1, float %c, float %d96 ret float %297}98 99define float @select_icmp_ult(i32 signext %a, i32 signext %b, float %c, float %d) {100; CHECK-LABEL: select_icmp_ult:101; CHECK: # %bb.0:102; CHECK-NEXT: bltu a0, a1, .LBB4_2103; CHECK-NEXT: # %bb.1:104; CHECK-NEXT: fmv.s fa0, fa1105; CHECK-NEXT: .LBB4_2:106; CHECK-NEXT: ret107;108; CHECKZFINX-LABEL: select_icmp_ult:109; CHECKZFINX: # %bb.0:110; CHECKZFINX-NEXT: bltu a0, a1, .LBB4_2111; CHECKZFINX-NEXT: # %bb.1:112; CHECKZFINX-NEXT: mv a2, a3113; CHECKZFINX-NEXT: .LBB4_2:114; CHECKZFINX-NEXT: mv a0, a2115; CHECKZFINX-NEXT: ret116 %1 = icmp ult i32 %a, %b117 %2 = select i1 %1, float %c, float %d118 ret float %2119}120 121define float @select_icmp_ule(i32 signext %a, i32 signext %b, float %c, float %d) {122; CHECK-LABEL: select_icmp_ule:123; CHECK: # %bb.0:124; CHECK-NEXT: bgeu a1, a0, .LBB5_2125; CHECK-NEXT: # %bb.1:126; CHECK-NEXT: fmv.s fa0, fa1127; CHECK-NEXT: .LBB5_2:128; CHECK-NEXT: ret129;130; CHECKZFINX-LABEL: select_icmp_ule:131; CHECKZFINX: # %bb.0:132; CHECKZFINX-NEXT: bgeu a1, a0, .LBB5_2133; CHECKZFINX-NEXT: # %bb.1:134; CHECKZFINX-NEXT: mv a2, a3135; CHECKZFINX-NEXT: .LBB5_2:136; CHECKZFINX-NEXT: mv a0, a2137; CHECKZFINX-NEXT: ret138 %1 = icmp ule i32 %a, %b139 %2 = select i1 %1, float %c, float %d140 ret float %2141}142 143define float @select_icmp_sgt(i32 signext %a, i32 signext %b, float %c, float %d) {144; CHECK-LABEL: select_icmp_sgt:145; CHECK: # %bb.0:146; CHECK-NEXT: blt a1, a0, .LBB6_2147; CHECK-NEXT: # %bb.1:148; CHECK-NEXT: fmv.s fa0, fa1149; CHECK-NEXT: .LBB6_2:150; CHECK-NEXT: ret151;152; CHECKZFINX-LABEL: select_icmp_sgt:153; CHECKZFINX: # %bb.0:154; CHECKZFINX-NEXT: blt a1, a0, .LBB6_2155; CHECKZFINX-NEXT: # %bb.1:156; CHECKZFINX-NEXT: mv a2, a3157; CHECKZFINX-NEXT: .LBB6_2:158; CHECKZFINX-NEXT: mv a0, a2159; CHECKZFINX-NEXT: ret160 %1 = icmp sgt i32 %a, %b161 %2 = select i1 %1, float %c, float %d162 ret float %2163}164 165define float @select_icmp_sge(i32 signext %a, i32 signext %b, float %c, float %d) {166; CHECK-LABEL: select_icmp_sge:167; CHECK: # %bb.0:168; CHECK-NEXT: bge a0, a1, .LBB7_2169; CHECK-NEXT: # %bb.1:170; CHECK-NEXT: fmv.s fa0, fa1171; CHECK-NEXT: .LBB7_2:172; CHECK-NEXT: ret173;174; CHECKZFINX-LABEL: select_icmp_sge:175; CHECKZFINX: # %bb.0:176; CHECKZFINX-NEXT: bge a0, a1, .LBB7_2177; CHECKZFINX-NEXT: # %bb.1:178; CHECKZFINX-NEXT: mv a2, a3179; CHECKZFINX-NEXT: .LBB7_2:180; CHECKZFINX-NEXT: mv a0, a2181; CHECKZFINX-NEXT: ret182 %1 = icmp sge i32 %a, %b183 %2 = select i1 %1, float %c, float %d184 ret float %2185}186 187define float @select_icmp_slt(i32 signext %a, i32 signext %b, float %c, float %d) {188; CHECK-LABEL: select_icmp_slt:189; CHECK: # %bb.0:190; CHECK-NEXT: blt a0, a1, .LBB8_2191; CHECK-NEXT: # %bb.1:192; CHECK-NEXT: fmv.s fa0, fa1193; CHECK-NEXT: .LBB8_2:194; CHECK-NEXT: ret195;196; CHECKZFINX-LABEL: select_icmp_slt:197; CHECKZFINX: # %bb.0:198; CHECKZFINX-NEXT: blt a0, a1, .LBB8_2199; CHECKZFINX-NEXT: # %bb.1:200; CHECKZFINX-NEXT: mv a2, a3201; CHECKZFINX-NEXT: .LBB8_2:202; CHECKZFINX-NEXT: mv a0, a2203; CHECKZFINX-NEXT: ret204 %1 = icmp slt i32 %a, %b205 %2 = select i1 %1, float %c, float %d206 ret float %2207}208 209define float @select_icmp_sle(i32 signext %a, i32 signext %b, float %c, float %d) {210; CHECK-LABEL: select_icmp_sle:211; CHECK: # %bb.0:212; CHECK-NEXT: bge a1, a0, .LBB9_2213; CHECK-NEXT: # %bb.1:214; CHECK-NEXT: fmv.s fa0, fa1215; CHECK-NEXT: .LBB9_2:216; CHECK-NEXT: ret217;218; CHECKZFINX-LABEL: select_icmp_sle:219; CHECKZFINX: # %bb.0:220; CHECKZFINX-NEXT: bge a1, a0, .LBB9_2221; CHECKZFINX-NEXT: # %bb.1:222; CHECKZFINX-NEXT: mv a2, a3223; CHECKZFINX-NEXT: .LBB9_2:224; CHECKZFINX-NEXT: mv a0, a2225; CHECKZFINX-NEXT: ret226 %1 = icmp sle i32 %a, %b227 %2 = select i1 %1, float %c, float %d228 ret float %2229}230 231define float @select_icmp_slt_one(i32 signext %a) {232; CHECK-LABEL: select_icmp_slt_one:233; CHECK: # %bb.0:234; CHECK-NEXT: slti a0, a0, 1235; CHECK-NEXT: fcvt.s.w fa0, a0236; CHECK-NEXT: ret237;238; CHECKZFINX-LABEL: select_icmp_slt_one:239; CHECKZFINX: # %bb.0:240; CHECKZFINX-NEXT: slti a0, a0, 1241; CHECKZFINX-NEXT: fcvt.s.w a0, a0242; CHECKZFINX-NEXT: ret243 %1 = icmp slt i32 %a, 1244 %2 = select i1 %1, float 1.000000e+00, float 0.000000e+00245 ret float %2246}247 248define float @select_icmp_sgt_zero(i32 signext %a) {249; CHECK-LABEL: select_icmp_sgt_zero:250; CHECK: # %bb.0:251; CHECK-NEXT: slti a0, a0, 1252; CHECK-NEXT: fcvt.s.w fa0, a0253; CHECK-NEXT: ret254;255; CHECKZFINX-LABEL: select_icmp_sgt_zero:256; CHECKZFINX: # %bb.0:257; CHECKZFINX-NEXT: slti a0, a0, 1258; CHECKZFINX-NEXT: fcvt.s.w a0, a0259; CHECKZFINX-NEXT: ret260 %1 = icmp sgt i32 %a, 0261 %2 = select i1 %1, float 0.000000e+00, float 1.000000e+00262 ret float %2263}264