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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \3; RUN: | FileCheck -check-prefix=RV32I %s4 5@x = local_unnamed_addr global fp128 0xL00000000000000007FFF000000000000, align 166@y = local_unnamed_addr global fp128 0xL00000000000000007FFF000000000000, align 167 8; Besides anything else, these tests help verify that libcall ABI lowering9; works correctly10 11define i32 @test_load_and_cmp() nounwind {12; RV32I-LABEL: test_load_and_cmp:13; RV32I: # %bb.0:14; RV32I-NEXT: addi sp, sp, -4815; RV32I-NEXT: sw ra, 44(sp) # 4-byte Folded Spill16; RV32I-NEXT: lui a0, %hi(x)17; RV32I-NEXT: lui a1, %hi(y)18; RV32I-NEXT: lw a2, %lo(x)(a0)19; RV32I-NEXT: lw a3, %lo(x+4)(a0)20; RV32I-NEXT: lw a4, %lo(x+8)(a0)21; RV32I-NEXT: lw a5, %lo(x+12)(a0)22; RV32I-NEXT: lw a0, %lo(y)(a1)23; RV32I-NEXT: lw a6, %lo(y+4)(a1)24; RV32I-NEXT: lw a7, %lo(y+8)(a1)25; RV32I-NEXT: lw a1, %lo(y+12)(a1)26; RV32I-NEXT: sw a0, 8(sp)27; RV32I-NEXT: sw a6, 12(sp)28; RV32I-NEXT: sw a7, 16(sp)29; RV32I-NEXT: sw a1, 20(sp)30; RV32I-NEXT: addi a0, sp, 2431; RV32I-NEXT: addi a1, sp, 832; RV32I-NEXT: sw a2, 24(sp)33; RV32I-NEXT: sw a3, 28(sp)34; RV32I-NEXT: sw a4, 32(sp)35; RV32I-NEXT: sw a5, 36(sp)36; RV32I-NEXT: call __netf237; RV32I-NEXT: snez a0, a038; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload39; RV32I-NEXT: addi sp, sp, 4840; RV32I-NEXT: ret41 %1 = load fp128, ptr @x, align 1642 %2 = load fp128, ptr @y, align 1643 %cmp = fcmp une fp128 %1, %244 %3 = zext i1 %cmp to i3245 ret i32 %346}47 48define i32 @test_add_and_fptosi() nounwind {49; RV32I-LABEL: test_add_and_fptosi:50; RV32I: # %bb.0:51; RV32I-NEXT: addi sp, sp, -8052; RV32I-NEXT: sw ra, 76(sp) # 4-byte Folded Spill53; RV32I-NEXT: lui a0, %hi(x)54; RV32I-NEXT: lui a1, %hi(y)55; RV32I-NEXT: lw a3, %lo(x)(a0)56; RV32I-NEXT: lw a4, %lo(x+4)(a0)57; RV32I-NEXT: lw a5, %lo(x+8)(a0)58; RV32I-NEXT: lw a6, %lo(x+12)(a0)59; RV32I-NEXT: lw a0, %lo(y)(a1)60; RV32I-NEXT: lw a2, %lo(y+4)(a1)61; RV32I-NEXT: lw a7, %lo(y+8)(a1)62; RV32I-NEXT: lw a1, %lo(y+12)(a1)63; RV32I-NEXT: sw a0, 24(sp)64; RV32I-NEXT: sw a2, 28(sp)65; RV32I-NEXT: sw a7, 32(sp)66; RV32I-NEXT: sw a1, 36(sp)67; RV32I-NEXT: addi a0, sp, 5668; RV32I-NEXT: addi a1, sp, 4069; RV32I-NEXT: addi a2, sp, 2470; RV32I-NEXT: sw a3, 40(sp)71; RV32I-NEXT: sw a4, 44(sp)72; RV32I-NEXT: sw a5, 48(sp)73; RV32I-NEXT: sw a6, 52(sp)74; RV32I-NEXT: call __addtf375; RV32I-NEXT: lw a1, 56(sp)76; RV32I-NEXT: lw a2, 60(sp)77; RV32I-NEXT: lw a3, 64(sp)78; RV32I-NEXT: lw a4, 68(sp)79; RV32I-NEXT: addi a0, sp, 880; RV32I-NEXT: sw a1, 8(sp)81; RV32I-NEXT: sw a2, 12(sp)82; RV32I-NEXT: sw a3, 16(sp)83; RV32I-NEXT: sw a4, 20(sp)84; RV32I-NEXT: call __fixtfsi85; RV32I-NEXT: lw ra, 76(sp) # 4-byte Folded Reload86; RV32I-NEXT: addi sp, sp, 8087; RV32I-NEXT: ret88 %1 = load fp128, ptr @x, align 1689 %2 = load fp128, ptr @y, align 1690 %3 = fadd fp128 %1, %291 %4 = fptosi fp128 %3 to i3292 ret i32 %493}94 95define fp128 @fmaximum(fp128 %x, fp128 %y) {96; RV32I-LABEL: fmaximum:97; RV32I: # %bb.0:98; RV32I-NEXT: addi sp, sp, -6499; RV32I-NEXT: .cfi_def_cfa_offset 64100; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill101; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill102; RV32I-NEXT: .cfi_offset ra, -4103; RV32I-NEXT: .cfi_offset s0, -8104; RV32I-NEXT: lw a3, 0(a1)105; RV32I-NEXT: lw a4, 4(a1)106; RV32I-NEXT: lw a5, 8(a1)107; RV32I-NEXT: lw a6, 12(a1)108; RV32I-NEXT: lw a1, 0(a2)109; RV32I-NEXT: lw a7, 4(a2)110; RV32I-NEXT: lw t0, 8(a2)111; RV32I-NEXT: lw a2, 12(a2)112; RV32I-NEXT: mv s0, a0113; RV32I-NEXT: sw a1, 8(sp)114; RV32I-NEXT: sw a7, 12(sp)115; RV32I-NEXT: sw t0, 16(sp)116; RV32I-NEXT: sw a2, 20(sp)117; RV32I-NEXT: addi a0, sp, 40118; RV32I-NEXT: addi a1, sp, 24119; RV32I-NEXT: addi a2, sp, 8120; RV32I-NEXT: sw a3, 24(sp)121; RV32I-NEXT: sw a4, 28(sp)122; RV32I-NEXT: sw a5, 32(sp)123; RV32I-NEXT: sw a6, 36(sp)124; RV32I-NEXT: call fmaximuml125; RV32I-NEXT: lw a0, 40(sp)126; RV32I-NEXT: lw a1, 44(sp)127; RV32I-NEXT: lw a2, 48(sp)128; RV32I-NEXT: lw a3, 52(sp)129; RV32I-NEXT: sw a0, 0(s0)130; RV32I-NEXT: sw a1, 4(s0)131; RV32I-NEXT: sw a2, 8(s0)132; RV32I-NEXT: sw a3, 12(s0)133; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload134; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload135; RV32I-NEXT: .cfi_restore ra136; RV32I-NEXT: .cfi_restore s0137; RV32I-NEXT: addi sp, sp, 64138; RV32I-NEXT: .cfi_def_cfa_offset 0139; RV32I-NEXT: ret140 %a = call fp128 @llvm.maximum.fp128(fp128 %x, fp128 %y)141 ret fp128 %a142}143 144define fp128 @fminimum(fp128 %x, fp128 %y) {145; RV32I-LABEL: fminimum:146; RV32I: # %bb.0:147; RV32I-NEXT: addi sp, sp, -64148; RV32I-NEXT: .cfi_def_cfa_offset 64149; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill150; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill151; RV32I-NEXT: .cfi_offset ra, -4152; RV32I-NEXT: .cfi_offset s0, -8153; RV32I-NEXT: lw a3, 0(a1)154; RV32I-NEXT: lw a4, 4(a1)155; RV32I-NEXT: lw a5, 8(a1)156; RV32I-NEXT: lw a6, 12(a1)157; RV32I-NEXT: lw a1, 0(a2)158; RV32I-NEXT: lw a7, 4(a2)159; RV32I-NEXT: lw t0, 8(a2)160; RV32I-NEXT: lw a2, 12(a2)161; RV32I-NEXT: mv s0, a0162; RV32I-NEXT: sw a1, 8(sp)163; RV32I-NEXT: sw a7, 12(sp)164; RV32I-NEXT: sw t0, 16(sp)165; RV32I-NEXT: sw a2, 20(sp)166; RV32I-NEXT: addi a0, sp, 40167; RV32I-NEXT: addi a1, sp, 24168; RV32I-NEXT: addi a2, sp, 8169; RV32I-NEXT: sw a3, 24(sp)170; RV32I-NEXT: sw a4, 28(sp)171; RV32I-NEXT: sw a5, 32(sp)172; RV32I-NEXT: sw a6, 36(sp)173; RV32I-NEXT: call fminimuml174; RV32I-NEXT: lw a0, 40(sp)175; RV32I-NEXT: lw a1, 44(sp)176; RV32I-NEXT: lw a2, 48(sp)177; RV32I-NEXT: lw a3, 52(sp)178; RV32I-NEXT: sw a0, 0(s0)179; RV32I-NEXT: sw a1, 4(s0)180; RV32I-NEXT: sw a2, 8(s0)181; RV32I-NEXT: sw a3, 12(s0)182; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload183; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload184; RV32I-NEXT: .cfi_restore ra185; RV32I-NEXT: .cfi_restore s0186; RV32I-NEXT: addi sp, sp, 64187; RV32I-NEXT: .cfi_def_cfa_offset 0188; RV32I-NEXT: ret189 %a = call fp128 @llvm.minimum.fp128(fp128 %x, fp128 %y)190 ret fp128 %a191}192 193define { fp128, fp128 } @modf(fp128 %a) nounwind {194; RV32I-LABEL: modf:195; RV32I: # %bb.0:196; RV32I-NEXT: addi sp, sp, -64197; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill198; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill199; RV32I-NEXT: lw a3, 0(a1)200; RV32I-NEXT: lw a4, 4(a1)201; RV32I-NEXT: lw a5, 8(a1)202; RV32I-NEXT: lw a6, 12(a1)203; RV32I-NEXT: mv s0, a0204; RV32I-NEXT: addi a0, sp, 24205; RV32I-NEXT: addi a1, sp, 8206; RV32I-NEXT: addi a2, sp, 40207; RV32I-NEXT: sw a3, 8(sp)208; RV32I-NEXT: sw a4, 12(sp)209; RV32I-NEXT: sw a5, 16(sp)210; RV32I-NEXT: sw a6, 20(sp)211; RV32I-NEXT: call modfl212; RV32I-NEXT: lw a0, 24(sp)213; RV32I-NEXT: lw a1, 28(sp)214; RV32I-NEXT: lw a2, 32(sp)215; RV32I-NEXT: lw a3, 36(sp)216; RV32I-NEXT: lw a4, 40(sp)217; RV32I-NEXT: lw a5, 44(sp)218; RV32I-NEXT: lw a6, 48(sp)219; RV32I-NEXT: lw a7, 52(sp)220; RV32I-NEXT: sw a4, 16(s0)221; RV32I-NEXT: sw a5, 20(s0)222; RV32I-NEXT: sw a6, 24(s0)223; RV32I-NEXT: sw a7, 28(s0)224; RV32I-NEXT: sw a0, 0(s0)225; RV32I-NEXT: sw a1, 4(s0)226; RV32I-NEXT: sw a2, 8(s0)227; RV32I-NEXT: sw a3, 12(s0)228; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload229; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload230; RV32I-NEXT: addi sp, sp, 64231; RV32I-NEXT: ret232 %result = call { fp128, fp128 } @llvm.modf.f128(fp128 %a)233 ret { fp128, fp128 } %result234}235